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CHAPTER-1

INTRODUCTION
A remote control vehicle is defined as any mobile device that is controlled by a means that does not
restrict its motion with an origin external to the device. A remote control vehicle differs from a robot in
that the RCV is always controlled by a human and takes no positive action autonomously. In this Proect!
the mobile phone which is in the hands of the user acts as a remote where as the "and Rover acts as a
RCV. #he obective of Video $urveillance is accomplished using this RCV.
1.1 Background:
1) Histor o! r"#ot" contro$$"d %"&ic$"s: #he %irst Remote Control Vehicle I Precision &uided 'eapon
was a propeller(driven radio controlled boat! built by )ikola #esla in *+,+! is the original prototype of all
modern(day uninhabited aerial vehicles and precision guided weapons. It was Powered by lead(acid
batteries and an electric drive motor. #he vessel was designed to be maneuvered alongside a target using
instructions received from a wireless remote( control transmitter.
#here was a prominent use of RCVs in the $econd 'orld 'ar. -uring 'orld 'ar II in the .uropean
#heater the /.$. Air %orce experimented with three basic forms radio( control guided weapons. In each
case! the weapon would be directed to its target by a crew member on a control plane. #he first weapon
was essentially a standard bomb fitted with steering controls. #he next evolution involved the fitting of a
bomb to a glider airframe. #he third class of guided weapon was the remote controlled 0(*1.
2ver the years! RCVs have taken many transformations3 they have used various technologies to meet the
re4uirements of the fast growing technological world. #he present day RCVs employ technologies like R%!
IR! satellite communication etc with a sophisticated technical touch.
1.' DT() T"c&no$og
-ual(tone multi(fre4uency 5-#6%7 signaling is used for telecommunication signaling over
analog telephone lines in the voice(fre4uency band to the call switching center. #he version of -#6% used
for telephone tone dialing is known by the trademarked term #ouch(#one. It is developed as a very reliable
alternative to pulse dialing. #ouch(#one system using the telephone keypad gradually replaced the use of
rotary dial and has become the industry standard for landline service. R% and IR technologies for remote
control have drawbacks of limited working range and limited fre4uency range. #hus! for remote
communication -#6% signal can replace R% and IR signals for the advantage of simplicity! audibility and
working range which is as large as the coverage area of service provider.
1) DT() k"*ad: #he -#6% keypad is laid out in a 898 matrix! with each row representing a low
fre4uency! and each column representing a high fre4uency. #he -#6% signal is a direct algebraic
summation! in real time! of the amplitudes of two sine 5cosine7 waves of two different fre4uencies! one
corresponding to the row and the other corresponding to the column. #he fre4uencies may not vary more
than :*.+; from their nominal fre4uency! or the switching center will ignore the signal. #he multiple
tones are the reason for calling the system multifre4uency. #he -#6% tone assignments are as shown in
%ig.<.

%ig.*. -#6% signal
%ig.< -#6% =eypad
.xample> If the ?*@ key is pressed! then the tone is composed of the fre4uencies A,1BC 5 corresponding to
the row7 and *<D,BC 5corresponding to the column7 as shown in %ig.*.
') Ad%antag"s o! DT() +igna$$ing: #he tone fre4uencies! as defined by the Precise #one Plan! are
selected such that harmonics and intermodulation products will not cause an unreliable signal. )o
fre4uency is a multiple of another! the difference between any two fre4uencies does not e4ual any of the
fre4uencies! and the sum of any two fre4uencies does not e4ual any of the fre4uencies.
1., B-OC. DIA/RA( and (ETHODO-O/0
%ig.E 0lock -iagram
2verall block diagram of the present proect is shown in %ig.E .It is evident from the block diagram
that two mobile phones have been used! one is with the user or operator and the other is in the system i.e.!
"and Rover which may be located at any distance from the user and connected through mobile network.
'hen the user makes a call to the mobile phone of the system! it receives the call as it is kept in auto
receiving mode. #hus the user and the system are connected via mobile network. )ow if user presses any
key on the key pad! -#6% tone is generated which corresponds to the desired movement of the "and
Rover. #his -#6% signal is received by the system mobile phone located at the receiving side. #here it is
decoded by the -#6% decoder. 6icrocontroller receives the decoded data through the input port. It
processes the data according to the control software to generate the control signal for the -C motor to
rotate in the desired direction. #he 6otor -river assists to provide the re4uired current to drive the motors.
III. CIRCUIT DIA/RA(
A. Co#*on"nts us"d
1) +"#iconductors: IC* F B#,*1D -#6% decoder! IC< ( +DG* microcontroller! ICE ( "<,E- motor
driver! IC8 ( 18"$D8 )2# gate! -* ( *)8DD1 rectifier diode
<7 Resistors 5all H(watt! :G; carbon7>R*! R< ( *DD(kilo(ohm! RE ( EED(kilo(ohm! R8(R+ ( *D(kilo(ohm
E7 Capacitors> C* ( D.81I% ceramic disk! C<! CE! CG! CA ( <<p% ceramic disk! C8 ( D.*I% ceramic disk
87 6iscellaneous> J#A"* ( E.G16BC crystal! J#A"< ( *<6BC crystal! $* ( Push(to(on switch3 6*! 6< (
AV! GD(rpm geared -C motor! 0attery ( AV! 8.GAh battery

%ig.8 Circuit -iagram
B. Circuit Diagra# "1*$anation
#he important components of this rover are a -#6% decoder! 6icrocontroller and motor driver.
A B#,*1D series -#6% decoder is used here. All types of the B#,*1D series use digital counting
techni4ues to detect and decode all the *A -#6% tone pairs into a 8(bit code output. #he built(in dial tone
reection circuit eliminates the need for pre(filtering. Input to the -#6% decoder is given through the
audio ack. Bere the #IP corresponds to positive of the audio ack and ring corresponds to negative of the
same. 'hen the input signal given at pin< 5I)(7 correct 8(bit decoded signal of the -#6% tone is
transferred to K* 5pin **7 through K8 5pin *87.#able II shows the -#6% data output table of B#,*1D. K*
through K8 outputs of the -#6% decoder 5IC*7 are connected to port pins PAD ( PAE of +DG*
microcontroller 5IC<7 after inversion by )*( )8 respectively. #he +DG* is a low(power microcontroller
based on the RI$C architecture. 2utputs from port pins P<.D through P<.E and P<.1 of the microcontroller
are fed to inputs I)* through I)8 and enable pins 5.)* and .)<7 of motor driver "<,E- respectively! to
drive two geared -C motors.

#he microcontroller output is not sufficient to drive the -C motors. $o! current drivers are re4uired
for motor rotation. #he "<,E- consists of four drivers. Pins I)* through I)8 and 2/#* through 2/#8
are input and output pins! respectively! of driver * through driver 8. -rivers * and <! and drivers E and 8
are enabled by enable .)* and .)<! respectively. 'hen enable input .)* 5pin*7 is high! drivers * and <
are enabled and the outputs corresponding to their inputs are active. $imilarly! enable input .)< 5pin ,7
enables drivers E and 8. #he direction of movement of individual motors determines the actual movement
of the "and Rover. In this proect! two wheel drive configuration is established since two motors are used.
#he turnings of the Rover are brought out by keeping a motor stationary and rotating the other. %or
example! a left turn is achieved by keeping the left motor stationary and rotating the right motor. #his is
how the control of "and Rover is achieved. 6ethod to achieve Video $urveillance using this "and Rover
is discussed in the subse4uent section.
I2. HARD3ARE CO(PONENT+4 +PECI)ICATION
A. 2o$tag" r"gu$ator
A voltage regulator is designed to automatically maintain a constant voltage level. A voltage
regulator may be a simple Lfeed(forwardL design or may include negative feedback control loops. It may
use an electromechanical mechanism! or electronic components. -epending on the design! it may be used
to regulate one or more AC or -C voltages.
.lectronic voltage regulators are found in devices such as computer power supplies where they
stabiliCe the -C voltages used by the processor and other elements. In automobile alternators and
central power station generator plants! voltage regulators control the output of the plant. In an electric
power distribution system! voltage regulators may be installed at a substation or along distribution lines so
that all customers receive steady voltage independent of how much power is drawn from the line.
*7 ("asur"s o! %o$tag" r"gu$ator 5ua$it: #he output voltage can only be held roughly constant3 the
regulation is specified by two measurements>
"oad regulation is the change in output voltage for a given change in load current 5for example>
Ltypically *G mV! maximum *DD mV for load currents between G mA and *.8 A! at some specified
temperature and input voltageL7.
"ine regulation or input regulation is the degree to which output voltage changes with input
5supply7 voltage changes ( as a ratio of output to input change 5for example Ltypically *E mVMVL7! or
the output voltage change over the entire specified input voltage range 5for example Lplus or minus <;
for input voltages between ,D V and <AD V! GD(AD BCL7.
2ther important parameters are> #emperature coefficient! Initial accuracy! -ropout voltage! Absolute
maximum ratings! 2utput noise! #ransient response.
<7 )i1"d %o$tag" r"gu$ator IC6789: In this proect power supply of Gv is re4uired for the operation of
-#6% fixed output voltage it is designed to provide. 1+DG provides NGV regulated power supply.
Capacitors of suitable values can be connected at input and output pins depending upon the respective
voltage levels! decoder and microcontroller. In order to obtain this voltage level IC1+DG is used.
1+DG is a voltage regulator integrated circuit. It is a member of 1+xx series of fixed linear voltage
regulator ICs. #he voltage source in a circuit may have fluctuations and would not give the fixed
voltage output. #he voltage regulator IC maintains the output voltage at a constant value. #he xx in
1+xx indicates the
%ig.G. IC 1+DG voltage regulator
#A0". I
PI) C2)%I&/RA#I2) 2% IC1+DG
B. DT() d"cod"r
-#6% decoder used in this proect is B#,*1D.
Pin )o %unction )ame
* Input voltage 5GV(*+V7 Input
< &round 5DV7 &round
E Regulated output3 GV 58.+V(
G.<V7
2utput
1) )"atur"s:
2perating voltage> <.GVOG.GV
6inimal external components
)o external filter is re4uired
"ow standby current 5on power down mode7
.xcellent performance
#ristate data output for IC interface
E.G+6BC crystal or ceramic resonator
*AEEBC can be inhibited by the I)B pin
B#,*1D0> *+(pin -IP package
B#,*1D-> *+(pin $2P package
Complete -#6% Receiver
"ow power consumption
Internal gain setting amplifier
Adustable guard time
Central office 4uality
Power(down mode
Inhibit mode
%ig.A.Pin configuration
2) Pin d"scri*tion:
VP (2perational amplifier non(inverting input.
V) (2perational amplifier inverting input.
&$ (2perational amplifier output terminal
VR.% (Reference voltage output! normally V--M<
J*!J< 2$CI""A#2R (#he system oscillator consists of an inverter! a bias resistor and the
necessary load capacitor on chip A standard E.G1,G8G6BC crystal connected to J* and J<
terminals implements the oscillator function.
P'-) (Pull(low Active high. #his enables the device to go into power down mode and inhibits
the oscillator. #his pin input is internally pulled down.
I)B (Pull(low "ogic high. #his inhibits the detection of tones representing characters A! 0! C and
-. #his pin input is internally pulled down.
V$$ ()egative power supply
2. (Pull(high -DO-E output enable! high active
-DO-E F#ristate Receiving data output terminals
-V( -ata valid output when the chip receives a valid tone 5-#6%7 signal! the -V goes high3
otherwise it remains low.
.$# (.arly steering output 5see %unctional -escription of B#,*1D given in appendix
R#M&# (#one ac4uisition time and release time can be set through connection with external resistor
and capacitor.
V-- (Positive power supply! <.GVOG.GV for normal operation
-V0 (2ne(shot type data valid output! normal high! when the chip receives a valid time 5-#6%7
signal! the -V0 goes low for *Dms.

#A0". II
C. NOT /ATE

%ig.A.#raditional )2# &ate 5Inverter7 symbol
#R/#B #A0".
#A0". III
In digital logic! an inverter or )2# gate is a logic gate which implements logical negation. #he truth
table is as shown in the figure. #his represents perfect switching behavior! which is the defining
assumption in -igital electronics. In practice! actual devices have electrical characteristics that must be
carefully considered when designing inverters. In fact! the non(ideal transition region behavior of a C62$
inverter makes it useful in analog electronics as a classA amplifier 5e.g.! as the output stage of an
operational amplifier7.
An inverter circuit outputs a voltage representing the opposite logic(level to its input. Inverters
can be constructed using a single )62$ transistor or a single P62$ transistor coupled with a resistor.
$ince this Presistive(drainP approach uses only a single type of transistor! it can be fabricated at low cost.
Bowever! because current flows through the resistor in one of the two states! the resistive(drain
configuration is disadvantaged for power consumption and processing speed. Alternately! inverters can be
constructed using two complimentary transistors in a C62$ configuration. #his configuration greatly
reduces power consumption since one of the transistors is always off in both logic states. Processing speed
can also be improved due to the relatively low resistance compared to the )62$(only or P62$(only type
devices. Inverters can also be constructed with 0ipolar Qunction #ransistors 50Q#7 in either resistor(
transistor logic 5R#"7 or transistor(transistor logic 5##"7 configuration.

-igital electronics circuits operate at fixed voltage levels corresponding to a logical D or * 5see
0inary7. An inverter circuit serves as the basic logic gate to swap between those two voltage levels.
Implementation determines the actual voltage! but common levels include 5D! NGV7 for ##" circuits.
1) Digita$ :ui$ding :$ock:
%ig.1.pin configuration
#he digital inverter is considered the base building block for all digital electronics. 6emory 5* bit
register7 is built as a latch by feeding the output of two serial inverters together. 6ultiplexers! decoders!
state machines! and other sophisticated digital devices all rely on the basic inverter.
#he Bex Inverter is an integrated circuit that contains six 5hex7 inverters. %or example! the 18D8
##" chip which has *8 pins and the 8D8, C62$ chip which has *A pins! < of which are used for
powerMreferencing! and *< of which are used by the inputs and outputs of the six inverters 5the 8D8, has <
pins with no connection7.
<7 P"r!or#anc" #"asur"#"nt: -igital inverter 4uality is often measured using the Voltage #ransfer
Curve! which is a plot of input vs. output voltage. %rom such a graph! device parameters including
noise tolerance! gain! and operating logic(levels can be obtained.
%ig.+.Voltage #ransfer Curve for a <D Im Inverter
Ideally! the voltage transfer curve 5V#C7 appears as an inverted step(function ( this would indicate
precise switching between on and off ( but in real devices! a gradual transition region exists. #he V#C
indicates that for low input voltage! the circuit outputs high voltage3 for high input! the output tapers off
towards D volts. #he slope of this transition region is a measure of 4uality ( steep 5close to (Infinity7 slopes
yield precise switching.

D. (icrocontro$$"r
#he A#+,CG* is a low(power! high(performance C62$ +(bit microcomputer with 8 =bytes of
%lash Programmable and .rasable Read 2nly 6emory 5P.R267. #he device is manufactured using
AtmelPs high density nonvolatile memory technology and is compatible with the industry standard 6C$(
G*R instruction set and pin out. #he on(chip %lash allows the program memory to be reprogrammed in(
system or by a conventional nonvolatile memory programmer. 0y combining a versatile +(bit CP/ with
%lash on a monolithic chip! the Atmel A#+,CG* is a powerful microcomputer which provides a highly
flexible and cost effective solution to many embedded control applications.
#he A#+,CG* provides the following standard features> 8 =bytes of %lash! *<+ bytes of RA6! E< IM2
lines! two *A(bit timerMcounters! five vector two(level interrupt architecture! a full duplex serial port! and
on(chip oscillator and clock circuitry. In addition! the A#+,CG* is designed with static logic for operation
down to Cero fre4uency and supports two software selectable power saving modes. #he Idle 6ode stops
the CP/ while allowing the RA6! timerMcounters! serial port and interrupt system to continue functioning.
#he Power down 6ode saves the RA6 contents but freeCes the oscillator.
T&" !o$$o;ing $ist gi%"s t&" !"atur"s o! t&" 7891 arc&it"ctur":-
2ptimiCed + bit CP/ for control applications.
.xtensive 0oolean processing capabilities.
A8= Program 6emory address space.
8= byte of R26.
*<+ bytes of on chip -ata 6emory.
E< 0i(directional and individually addressable IM2 lines.
#wo *A bit timerMcounters.
%ull -uplex /AR#.
G(vector interrupts structure with priority levels.
2n chip clock oscillator.
%ig.+. +DG* Architecture
7891 #icrocontro$$"r Pin Diagra# and Pin )unctions:-
A-E<PRO/> Address "atch .nable output pulse for latching the low byte of the address during accesses
to external memory. A". is emitted at a constant rate of *MA of the oscillator fre4uency! for external timing
or clocking purposes! even when there are no accesses to external memory. 5Bowever! one A". pulse is
skipped during each access to external -ata 6emory.7 #his pin is also the program pulse input 5PR2&7
during .PR26 programming.
P+EN: Program $tore .nable is the read strobe to external Program 6emory. 'hen the device is
executing out of external Program 6emory! P$.) is activated twice each machine cycle 5except that two
P$.) activations are skipped during accesses to external -ata 6emory7. P$.) is not activated when the
device is executing out of internal Program 6emory.
EA<2PP: 'hen .A is held high the CP/ executes out of internal Program 6emory 5unless the Program
Counter exceeds D%%%B in the +DCG*7. Bolding .A low forces the CP/ to execute out of external
memory regardless of the Program Counter value. In the +DCE*! .A must be externally wired low. In the
.PR26 devices! this pin also receives the programming supply voltage 5VPP7 during .PR26
programming.
=TA-1: Input to the inverting oscillator amplifier.
=TA-': 2utput from the inverting oscillator amplifier.
Port 8: Port D is an +(bit open drain bidirectional port. As an open drain output port! it can sink eight "$
##" loads. Port D pins that have *s written to them float! and in that state will function as high impedance
inputs. Port D is also the multiplexed low(order address and data bus during accesses to external memory.
In this application it uses strong internal pull(ups when emitting *s. Port D emits code bytes during
program verification. In this application! external pull(ups are re4uired.
Port 1 > Port * is an +(bit bidirectional IM2 port with internal pull(ups. Port * pins that have *s written to
them are pulled high by the internal pull(ups! and in that state can be used as inputs. As inputs! port * pins
that are externally being pulled low will source current because of the internal pull(ups.
Port ': Port < is an +(bit bidirectional IM2 port with internal pull(ups. Port < emits the high(order address
byte during accesses to external memory that use *A(bit addresses. In this application! it uses the strong
internal pull(ups when emitting *s.
Port ,: Port E is an +(bit bidirectional IM2 port with internal pull(ups. It also serves the functions of
various special features of the +DCG* %amily as follows>
Port Pin Alternate %unction
PE.D Rx- 5serial input port7
PE.* #x- 5serial output port7
PE.< I)#D 5external interrupt D7
PE.E I)#* 5external interrupt *7
PE.8 #D 5timer D external input7
PE.G #* 5timer * external input7
PE.A 'R 5external data memory write strobe7
PE.1 R- 5external data memory read strobe7
2CC: $upply voltage
2++: Circuit ground potential
Port +tructur"s and O*"ration:-
All four ports in the +DCG* are bidirectional. .ach consists of a latch 5$pecial %unction Registers PD
through PE7! an output driver! and an input buffer. #he output drivers of Ports D and <! and the input
buffers of Port D! are used in accesses to external memory. In this application! Port D outputs the low byte
of the external memory address! time(multiplexed with the byte being written or read. Port < outputs the
high byte of the external memory address when the address is *A bits wide. 2therwise! the Port < pins
continue to emit the P< $%R content.
All the Port E pins are multifunctional. #hey are not only port pins! but also serve the functions of various
special features as listed below>
Port Pin A$t"rnat" )unction:-
PE.D Rx- 5serial input port7
PE.* #x- 5serial output port7
PE.< I)#D 5external interrupt7
PE.E I)#* 5external interrupt7
PE.8 #D 5#imerMCounter D external input7
PE.G #* 5#imerMCounter * external input7
PE.A 'R 5external -ata 6emory write strobe7
PE.1 R- 5external -ata 6emory read strobe7
#he alternate functions can only be activated if the corresponding bit latch in the port $%R contains a *.
2therwise the port pin remains at D.
+*"cia$ )unction R"gist"rs >+)Rs):-
A 6ap of the on(chip memory area called the $pecial %unction Register 5$%R7 space is shown in
%igure.
In the $%Rs not all of the addresses are occupied. /noccupied addresses are not implemented on the
chip. Read accesses to these addresses will in general return random data! and write accesses will have no
effect. /ser software should not write *s to these unimplemented locations! since they may be used in
other +DCG* %amily derivative products to invoke new features. #he functions of the $%Rs are described
in the text that follows.
Accu#u$ator:
ACC is the Accumulator register. #he mnemonics for Accumulator($pecific instructions! however!
refer to the Accumulator simply as A.
B R"gist"r:
#he 0 register is used during multiply and divide operations. %or other instructions it can be treated as
another scratch pad register.
Progra# +tatus 3ord:
#he P$' register contains program status information as detailed in %igure.
BIT +0(BO- )UNCTION:-
P$'.1 CS Carry flag.
P$'.A AC Auxiliary Carry flag. 5%or 0C- operations.7
P$'.G %D %lag D. 5Available to the user for general purposes.7
P$'.8 R$* Register bank select control bit *.
$etMcleared by software to determine working register bank.
P$'.E R$D Register bank select control bit D.
$etMcleared by software to determine working register bank.
P$'.< 2V 2verflow flag.
P$'.* T /ser(definable flag.
P$'.D P Parity flag.
$etMcleared by hardware each instruction cycle to indicate an oddMeven
)umber of UoneV bits in the Accumulator! i.e.! even parity.
NOTE: #he contents of 5R$*! R$D7 enable the working register banks as follows>
5D! D7T 0ank D 5DDBFD1B7
5D! *7T 0ank * 5D+BFDfB7
5*! D7T 0ank < 5*DBF*1B7
5*! *7T 0ank E 5*+BF*1B7
+tack Point"r:-
#he $tack Pointer register is + bits wide. It is incremented before data is stored during P/$B and
CA"" executions. 'hile the stack may reside anywhere in on(chip RA6! the $tack Pointer is initialiCed
to D1B after a reset. #his causes the stack to begin at locations D+B.
Data Point"r:-
#he -ata Pointer 5-P#R7 consists of a high byte 5-PB7 and a low byte 5-P"7. Its intended function
is to hold a *A(bit address. It may be manipulated as a *A(bit register or as two independent +(bit registers.
+"ria$ Data Bu!!"r:-
#he $erial 0uffer is actually two separate registers! a transmit buffer and a receive buffer. 'hen data
is moved to $0/%! it goes to the transmit buffer and is held for serial transmission. 56oving a byte to
$0/% is what initiates the transmission.7 'hen data is moved from $0/%! it comes from the receive
buffer.
Ti#"r R"gist"rs Basic to 78C91:-
Register pairs 5#BD! #"D7! and 5#B*! #"*7 are the *A(bit Counting registers for #imerMCounters D
and *! respectively.
Contro$ R"gist"r !or t&" 78C91:-
$pecial %unction Registers IP! I.! #62-! #C2)! $C2)! and PC2) contain control and status bits
for the interrupt system! the #imerMCounters! and the serial port. #hey are described in later sections.
Basic R"gist"rs:-
A number of +DG< registers can be considered Lbasic.L Very little can be done without them and a detailed
explanation of each one is warranted to make sure the reader understands these registers before getting into
more complicated areas of development.
T&" Accu#u$ator:-

#he Accumulator! as its name suggests! is used as a general register to accumulate the results of a large
number of instructions. It can hold an +(bit 5*(byte7 value and is the most versatile register the +DG< has
due to the sheer number of instructions that make use of the accumulator. 6ore than half of the +DG<Ps <GG
instructions manipulate or use the Accumulator in some way.
%or example! if you want to add the number *D and <D! the resulting ED will be stored in the Accumulator.
2nce you have a value in the Accumulator you may continue processing the value or you may store it in
another register or in memory.
T&" ?R? R"gist"rs:-
#he LRL registers are sets of eight registers that are named RD! R*! through R1. #hese registers are
used as auxiliary registers in many operations. #o continue with the above example! perhaps you are
adding *D and <D. #he original number *D may be stored in the Accumulator whereas the value <D may be
stored in! say! register R8. #o process the addition you would execute the command>
A-- A! R8
After executing this instruction the Accumulator will contain the value ED. Sou may think of the LRL
registers as very important auxiliary! or LhelperL! registers. #he Accumulator alone would not be very
useful if it were not for these LRL registers.
#he LRL registers are also used to store values temporarily. %or example! let@s say you want to add the
values in R* and R< together and then subtract the values of RE and R8. 2ne way to do this would be>
62V A! RE 3 6ove the value of RE to accumulator
A-- A! R8 3 add the value of R8
62V RG! A 3 $tore the result in RG
62V A! R* 3 6ove the value of R* to Acc
A-- A! R< 3 add the value of R< with A
$/00 A! RG 3 $ubtract the RG 5which has RENR87
As you can see! we used RG to temporarily hold the sum of RE and R8. 2f course! this isnPt the most
efficient way to calculate 5R*NR<7 ( 5RE NR87 but it does illustrate the use of the LRL registers as a way to
store values temporarily.
As mentioned earlier! there are four sets of LRL registers(register bank D! *! <! and E. 'hen the
+DG< is first powered up! register bank D 5addresses DDh through D1h7 is used by default. In this case! for
example! R8 is the same as Internal RA6 address D8h. Bowever! your program may instruct the +DG< to
use one of the alternate register banks3 i.e.! register banks *! <! or E. In this case! R8 will no longer be the
same as Internal RA6 address D8h. %or example! if your program instructs the +DG< to use register bank *!
register R8 will now be synonymous with Internal RA6 address DCh. If you select register bank <! R8 is
synonymous with *8h! and if you select register bank E it is synonymous with address *Ch.
#he concept of register banks adds a great level of flexibility to the +DG<! especially when dealing with
interrupts 5wePll talk about interrupts later7. Bowever! always remember that the register banks really
reside in the first E< bytes of Internal RA6.
T&" B R"gist"r:-
#he L0L register is very similar to the Accumulator in the sense that it may hold an +(bit 5*(byte7
value. #he L0L register is only used implicitly by two +DG< instructions> 6/" A0 and -IV A0. #hus! if
you want to 4uickly and easily multiply or divide A by another number! you may store the other number in
L0L and make use of these two instructions. Aside from the 6/" and -IV instructions! the L0L register
are often used as yet another temporary storage register much like a ninth LRL register.
T&" Progra# Count"r:-
#he Program Counter 5PC7 is a <(byte address that tells the +DG< where the next instruction to
execute is found in memory. 'hen the +DG< is initialiCed PC always starts at DDDDh and is incremented
each time an instruction is executed. It is important to note that PC isnPt always incremented by one. $ince
some instructions are < or E bytes in length the PC will be incremented by < or E in these cases.
#he Program Counter is special in that there is no way to directly modify its value. #hat is to say! you canPt
do something like PCW<8EDh. 2n the other hand! if you execute "Q6P <8EDh youPve effectively
accomplished the same thing.
It is also interesting to note that while you may change the value of PC 5by executing a ump instruction!
etc.7 there is no way to read the value of PC. #hat is to say! there is no way to ask the +DG< L'hat address
are you about to executeXL As it turns out! this is not completely true> #here is one trick that may be used
to determine the current value of PC. #his trick will be covered in a later chapter.
T&" Data Point"r:-
#he -ata Pointer 5-P#R7 is the +DG<Ys only user(accessible *A(bit 5<(byte7 register. #he
Accumulator! LRL registers! and L0L register are all *(byte values. #he PC ust described is a *A(bit value
but isnPt directly user(accessible as a working register.
-P#R! as the name suggests! is used to point to data. It is used by a number of commands that allow the
+DG< to access external memory. 'hen the +DG< accesses external memory it accesses the memory at the
address indicated by -P#R.
'hile -P#R is most often used to point to data in external memory or code memory! many developers
take advantage of the fact that itPs the only true *A(bit register available. It is often used to store <(byte
values that have nothing to do with memory locations.
T&" +tack Point"r:-
#he $tack Pointer! like all registers except -P#R and PC! may hold an +(bit 5*(byte7 value. #he
$tack Pointer is used to indicate where the next value to be removed from the stack should be taken from.
'hen you push a value onto the stack! the +DG< first increments the value of $P and then stores the value
at the resulting memory location. 'hen you pop a value off the stack! the +DG< returns the value from the
memory location indicated by $P! and then decrements the value of $P.#his order of operation is
important. 'hen the +DG< is initialiCed $P will be initialiCed to D1h. If you immediately push a value onto
the stack! the value will be stored in Internal RA6 address D+h. #his makes sense taking into account what
was mentioned two paragraphs above> %irst the +DG* will increment the value of $P 5from D1h to D+h7 and
then will store the pushed value at that memory address 5D+h7.
Addr"ssing (od"s:-
#he addressing modes in the +DCG* instruction set are as follows>
Dir"ct Addr"ssing:-
In direct addressing the operand is specified by an +(bit address field in the instruction. 2nly internal -ata
RA6 and $%Rs can be directly addressed.
Indir"ct Addr"ssing:-
In indirect addressing the instruction specifies a register which contains the address of the operand. 0oth
internal and external RA6 can be indirectly addressed. #he address register for +(bit addresses can be RD
or R* of the selected bank! or the $tack Pointer. #he address register for *A(bit addresses can only be the
*A(bit Udata pointerV register! -P#R.
R"gist"r Instructions:-
#he register banks! containing registers RD through R1! can be accessed by certain instructions which
carry a E(bit register specification within the opcode of the instruction. Instructions that access the registers
this way are code efficient! since this mode eliminates an address byte. 'hen the instruction is executed!
one of the eight registers in the selected bank is accessed. 2ne of four banks is selected at execution time
by the two bank select bits in the P$'.
R"gist"r-+*"ci!ic Instructions:-
$ome instructions are specific to a certain register. %or example! some instructions always operate on the
Accumulator! or -ata Pointer! etc.! so no address byte is needed to point to it. #he opcode itself does that.
Instructions that refer to the Accumulator as A assemble as accumulator specific opcodes.
I##"diat" Constants:-
#he value of a constant can follow the opcode in Program 6emory.
%or example!
62V A! Z*DD
"oads the Accumulator with the decimal number *DD. #he same number could be specified in hex digits as
A8B.
Ind"1"d Addr"ssing:-
2nly program 6emory can be accessed with indexed addressing! and it can only be read. #his addressing
mode is intended for reading look(up tables in Program 6emory A *A(bit base register 5either -P#R or
the Program Counter7 points to the base of the table! and the Accumulator is set up with the table entry
number. #he address of the table entry in Program 6emory is formed by adding the Accumulator data to
the base pointer. Another type of indexed addressing is used in the Ucase umpV instruction. In this case the
destination address of a ump instruction is computed as the sum of the base pointer and the Accumulator
data.
E. Diod"
In electronics! a diode is a two(terminal electronic component that conducts electric current in only
one direction. #he term usually refers to a semiconductor diode! the most common type today! which is a
crystal of semiconductor connected to two electrical terminals! a P() unction. A vacuum tube diode! now
little used! is a vacuum tube with two electrodes3 a plate and a cathode. #he most common function of a
diode is to allow an electric current in one direction 5called the diode@s forward direction7 while blocking
current in the opposite direction 5the reverse direction7. #hus! the diode can be thought of as an electronic
version of a check valve. #his unidirectional behavior is called rectification! and is used to convert
alternating current to direct current! and remove modulation from radio signals in radio receivers.
Bowever! diodes can have more complicated behavior than this simple on(off action! due to their complex
non(linear electrical characteristics! which can be tailored by varying the construction of their P()
unction. #hese are exploited in special purpose diodes that perform many different functions. -iodes are
used to regulate voltage 5[ener diodes7! electronically tune radio and #V receivers 5varactor diodes7!
generate radio fre4uency oscillations 5tunnel diodes7! and produce light 5light emitting diodes7.
-iodes were the first semiconductor electronic devices. #he discovery of crystalsP rectifying abilities
was made by &erman physicist %erdinand 0raun in *+18. #he first semiconductor diodes! called catPs
whisker diodes were made of crystals of minerals such as galena. #oday most diodes are made of silicon!
but other semiconductors such as germanium are sometimes used.

%ig.*D. -iode symbol
%ig.**. V(I Characteristics of a diode

#he *)8DD* series 5or *)8DDD series7 is a family of popular *.D A general purpose silicon rectifier
diodes commonly used in AC adapters for common household appliances. 0locking voltage varies from
GD to *DDD volts. #his diode is made in an axial(lead -2(8* plastic package.

#hese are fairly low(speed
rectifier diodes! being inefficient for s4uare waves of more than *G kBC. #he series was second sourced by
many manufacturers. #he *)8DDD series were in the 6otorola $ilicon Rectifier Bandbook in *,AA! as
replacements for *)<AD, through *)<A*1.#he *)G8DD series were announced in .lectrical -esign
)ews in *,A+! along with the now lesser known *.G A *)GE,* series.
).(otor and #otor dri%"r
An electric motor is an electromechanical device that converts electrical energy into mechanical
energy. 6ost electric motors operate through the interaction of magnetic fields and current(
carrying conductors to generate force. #he physical principle behind production of mechanical
force by the interactions of an electric current and a magnetic field! Ampere@s force law! was
discovered by Andr\(6arie Ampere in *+<D. #he conversion of electrical energy into mechanical
energy by electromagnetic means was demonstrated by the 0ritish scientist 6ichael %araday in
*+<*. .lectric motors of increasing efficiency were constructed from *+<* through the end of the
*,th century! but commercial exploitation of electric motors on a large scale re4uired
efficient electrical generators and electrical distribution networks. #he first commercially
successful motors were made around *+1E by [\nobe &ramme.

.lectric motors are found in
applications as diverse as industrial fans! blowers and pumps! machine tools! household
appliances! power tools! and disk drives. #hey may be powered by direct current! e.g.!
a battery powered portable device or motor vehicle! or by alternating current from a central
electrical distribution grid or inverter.
*7 DC #otors: A -C motor is designed to run on -C electric power. #wo examples of pure -C
designs are 6ichael %aradayPs homopolar motor 5which is uncommon7! and the ball bearing motor!
which is 5so far7 a novelty. 0y far the most common -C motor types are the brushed and brushless
types! which use internal and external commutation respectively to reverse the current in the
windings in synchronism with rotation.
') +*"ci!ing an "$"ctric #otor: 'hen specifying what type of electric motor is needed! the
mechanical power available at the shaft is used. #his means that users can predict the tor4ue and
speed of the motor without having to know the mechanical losses associated with the motor.
.xample> *D k' of induction motor.
Back E(): $ince the armature windings of a direct(current motor are moving through a magnetic
field! they have a voltage induced in them. #his voltage tends to oppose the motor supply voltage
and so is called the Lback .6% 5electromotive force7L. #he voltage is proportional to the running
speed of the motor. #he back .6% of the motor! plus the voltage drop across the winding internal
resistance and brushes! must e4ual the voltage at the brushes. #his provides the fundamental
mechanism of speed regulation in a -C motor. If the mechanical load increases! the motor slows
down3 a lower back .6% results! and more current is drawn from the supply. #his increased
current provides the additional tor4ue to balance the new load. In alternating current machines! it is
sometimes useful to consider a back .6% source within the machine3 this is of particular concern
for close speed regulation of induction motors on variable(fre4uency drives.
Po;"r: #he power output of a rotary electric motor is>
'here P is the power in watts! rpm is the shaft speed in revolutions per minute and # is
the tor4ue in )m
E!!ici"nc: #o calculate a motorPs efficiency! the mechanical output power is divided by the
electrical input power>

'here is energy conversion efficiency! is electrical input power! and is mechanical output
power.
E7 (otor dri%"r: #he output of a 6icrocontroller is not sufficient to drive -C motors3 hence a motor
driver "<,E- is used. #he "<,E- is a 4uadruple high(current half(B driver designed to provide
bidirectional drive currents of up to ADDmA at voltages from 8.G V to EA V. It is designed to drive
inductive loads such as relays! solenoids! dc and bipolar stepping motors! as well as other high(
currentMhigh(voltage loads in positive(supply applications.

$pecifications>
$upply Voltage Range 8.GV to EAV
ADD(mA 2utput current capability per driver
$eparate Input(logic supply
Pulsed Current *.<(A Per -river
Internal .$- Protection
Bigh()oise(Immunity Inputs
#hermal $hutdown
%ig.*<.Pin diagram of "<,E-
#A0". IV
All inputs are ##"(compatible. .ach output is a complete totem(pole drive circuit with a -arlington
transistor sink and a pseudo(-arlington source. -rivers are enabled in pairs with drivers * and < enabled
by *!<.) and drivers E and 8 enabled by E!8.). 'hen an enable input is high! the associated drivers are
enabled! and their outputs are active and in phase with their inputs. .xternal high(speed output clamp
diodes should be used for inductive transient suppression. 'hen the enable input is low! those drivers are
disabled! and their outputs are off and in a high(impedance state. #he "<,E- is designed for operation
from D]C to 1D]C.
DI+AD2ANTA/E+
#here is a *.GV voltage drop within the "<,E- driver chip. If we run both motors and servos on the same
circuit! servos will always get *.GV more than the motors and typically we would want it the other way
around^

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