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IPASJ International Journal of Electrical Engineering(IIJEE)

Web Site: http://www.ipasj.org/IIJEE/IIJEE.htm


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Volume 2, Issue 4, April 2014 ISSN 2321-600X

Volume 2, Issue 4, April 2014 Page 1

Abstract
This paper presents the reduction of harmonics and power factor improvement using Shunt Active Filter (SAF) controlled by
synchronous reference frame theory and Proportional Integral Derivative (PID) controller tuned by Genetic Algorithm (GA).
The Synchronous Reference Frame Theory(SRFT) is used to generate the reference compensating current, PID controller to
control the DC voltage across the capacitor and Hysteresis Current Controller(HCC) for generating gating signals for VSI
based shunt active filter. The PID controller values are optimized by using Genetic Algorithm. The Genetic algorithm is
designed for 100 generations for the better value of PID. By the optimized values of PID controller the DC bus voltage across
SAF is maintained constant and hence the Total Harmonic Distortion (THD) is reduced below the value specified by IEEE.
The results are validated by simulating the test system with and without Shunt active filter (SAF) with synchronous frame
theory and proposed PID controller tuned by Genetic algorithm using MATLAB/SIMULINK.

Keywords: Shunt Active Filter, PID controller, Genetic Algorithm, Total Harmonic Distortion, Hysteresis current
controller.

1. INTRODUCTION
Utilization of electrical energy is increasing day by day and various types of non linear loads are connected at the load
side of the system for many applications. These non-linear loads produce harmonics and reactive power problems in
the utility systems which will decrease the power factor, increases the losses, electromagnetic interference and supplies
the distorted waveform to other loads connected to the system. It also affects the efficiency of the utility system [1]-[2].
Thus, the harmonics in the utility system should be reduced and maintained according to the value specified by IEEE
standards. Earlier, Passive filters are used not only to improve the power factor but also to reduce the harmonics [2].
But the main drawbacks of the passive filters are that their compensation characteristics will be changed with change of
harmonics, also their size is large and weight is more [3]. Thereafter, Static VAR Compensators (SVCs) overcomes
some of the disadvantages of passive filters but SVCs have their own disadvantages of large response time, poor
response for fluctuating loads and some SVCs produce themselves lower order harmonics [4]. Later, Active Power
filters are used in order to compensate the harmonics in an effective manner. Voltage harmonics are compensated by
connecting a series active filter in series with the line. Current harmonics are compensated by connecting shunt active
filter in between the source and load [5]. SAF keeps the main current sinusoidal whether the load is balanced or
unbalanced. Many methods are available in literature for reference compensating current such as instantaneous active
and reactive power theory, synchronous reference frame theory and sinusoidal current control owing to its advantages
of fast response and less computation SRFT is used to produce reference compensating current to SAF. HCC is used for
generating gate signals to voltage source inverter based shunt active filter. Fuzzy logic controller, Neuro controller, PID
controllers can be used to control the voltage of DC side capacitor of VSI [6]-[10]. In this paper PID controller is used
to control the voltage across the capacitor in SAF [11-13]. In this the PID controller values are optimized by using the
Genetic Algorithm which will reduce the THD to a minimum value less that than specified by IEEE.
The Genetic algorithm program is designed for the 100 generations with each generation having 20 samples. After
the implementation of 100 generations it will give the best optimized values of PID which reduces the THD to a
minimum value. The Generation of new population involves 3 steps i.e., reproduction, cross over and mutation.
Reproduction eliminates the worst cases of selection and retains the best case by using fitness function of roulette wheel
selection. Then, the cross over operator and mutation operator is applied to produce better population for next
generation. In this paper design, operation of SAF, SRFT, HCC are presented in section 2, section 3 presents tuning of
PID using GA, sections 4 and 5 present results and conclusion of this paper.
GENETIC ALGORITHM TUNED PID
CONTROLLER BASED SHUNT ACTIVE
FILTER FOR HARMONIC REDUCTION

G.Jaya Krishna
1
, N.Ramesh Raju
2
and
*
C.Swapna
3


1
Professor, Department of EEE, Siddharth Institute of Engineering and Technology.
2
HOD, Department of EEE, Siddharth Institute of Engineering and Technology.
3
B.Tech Student, Department of EEE, Siddharth Instittute of Engineering and Technology.
IPASJ International Journal of Electrical Engineering(IIJEE)
Web Site: http://www.ipasj.org/IIJEE/IIJEE.htm
A Publisher for Research Motivation........ Email: editoriijee@ipasj.org
Volume 2, Issue 4, April 2014 ISSN 2321-600X

Volume 2, Issue 4, April 2014 Page 2


2. OPERATION OF SHUNT ACTIVE FILTER
The schematic diagram of test power system without shunt active filter is shown in Fig 1. It consists of 3-phase AC
source connected to non linear load diode rectifier load through a line. The most common non linear loads are
rectifiers, UPS, Printers.

Figure 1: Three phase test system.

To compensate the harmonics produced by nonlinear load, SAF is connected between the source and load as shown in
the Fig. 2. The SAF injects harmonic currents which are of equal magnitude and out of phase by 180 with the load
harmonics into the line which nullifies the harmonics present in the line. While injecting harmonic currents the
voltage across the DC side capacitor is not constant due to charge and discharge of it to inject/absorb reactive power.
Therefore to inject required compensating current the voltage across the capacitor should remain constant. To control
the voltage across capacitor a PID controller is proposed in this paper. The PID controller measures the error by
comparing with a reference voltage value. The reference value of the voltage should be greater than one and half times
that of the source voltage [14]. The value of the capacitor is obtained by energy balance theorem [15].


Figure 2 Three phase test system with SAF.

The SAF consists of a VSI and a Capacitor on its DC side. The VSI consists of 6 switches. MOSFETs are used in the
VSI because of their fast switching characteristics and high power handling capability. Because of the switching of the
VSI switches ripple current is produced. The inductor is used in order to filter out switching ripples. The generation of
gate signals mainly depends on the generation of reference compensating which includes measurement of load
harmonic current and injected harmonic current for which SRFT is used. The hysteresis controller generates the
required gate signals for VSI by comparing error with the reference current. The Test system with SAF and the current
reference controller and Hysteresis current controller is shown in Fig.3.

Figure 3: Test system with SAF and its controllers.
IPASJ International Journal of Electrical Engineering(IIJEE)
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2.1 SRF Theory
The reference compensating current signal is generated by using SRFT which uses Parks Transformation as shown in
Figure 4. The load currents are converted to d and q currents which are purely DC and filtered by using a low pass
filter and the resultant current signal is subtracted with the DC current component and the resultant value is added to
PID control signal in order to obtain the reference current signal. These Dc components are again converted to a-b-c
coordinates by using inverse Parks transformation.


Figure 4: Reference current signal generation.

2.3 Hysteresis current controller
Hysteresis current controller generates the gate signals to control the VSI to inject the compensating current. The
hysteresis controller determines the error by comparing reference compensating current and injecting compensating
current. If the error is a positive then compensating current is reduced by injecting the negative voltage. If the error is
a negative value then the compensating current is increased by injecting positive voltage. The block diagram of HCC is
shown in Figure 5 and the operation of HCC is shown in Fig.6


Figure 5: Block diagram for HCPWM


Figure 6: Principle of operation of HCC.
IPASJ International Journal of Electrical Engineering(IIJEE)
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3. DESIGN OF GENETIC ALGORITHM
The Genetic algorithm program is designed to optimize the parameters of the PID controller for minimizing the
variations in V
dc.
. Genetic Algorithm uses three operators to generate next generation of new population i.e.,
Reproduction, crossover and mutation. Reproduction operation is used to select the parents for next generation by
using the selective rules. In this paper Roulette wheel selection is used to select the population by using the
fitness/objective function. Cross over operator is used to generate children from two parents produced in the
reproduction. Mutation operator is applied to individual parents to form children. The selection function chooses
parents for the next generation based on their scaled values from the fitness scaling function. An individual can be
selected more than once as a parent, in which case it contributes its genes to more than one child. A common selection
approach assigns a probability of selection p
j
to each individual j based on fitness value. A series of N random
numbers is generated and compared against the cumulative probability of the population. The appropriate individual
i is selected and copied into the new population if cumulative probability lies between 0 and 1 or in the selected range.

3.1 Roulette wheel selection
It is developed by Holland [14]. The probability p
i
for each individual is defined by:
p
i
=f
i
/ ( f
j) ......(1)
Where f
i
is equals the fitness of individual i. In Roulette wheel selection, the individuals are mapped to contiguous
segments of a line, such that each individuals segment is equally sized to its fitness. A random number is generated
and the individual, whose segment spans the random number, is selected. The process repeats until the desired number
of individuals is obtained.

3.2 Mutation and Crossover
The genetic algorithm uses the individuals in the current generation to create the children that make up the next
generation. Besides elite children, who correspond to the individuals in the current generation with the best fitness
values, the algorithm creates Cross over and Mutation. Crossover children by selecting vector entries or genes from a
pair of individuals in the current generation and combine them to form a child. Mutation children by applying random
changes to a single individual in the current generation to create a child. Crossover enables the algorithm to extract the
best genes from different individuals and recombine them into potentially superior children. Mutation adds to the
diversity of a population and thereby increasing the likelihood that the algorithm will generate individuals with better
fitness values. The program is designed for 100 generations of population. The program is simulated using MATLAB
/SIMULINK for the test power system and the optimized value of PID parameters are obtained.

4. SIMULATION RESULTS OF TEST SYSTEM
This section presents the simulation results of the test power system and shows the effectiveness of proposed SAF
controlled by using the Genetic algorithm tuned PID controller. The test power system consists of a three phase AC
source and non-linear R-L load connected through a line. The simulation parameters of source and load are shown in
section 4.1; simulation results without SAF and with SAF for the test system are shown in sections 4.2 and 4.3
respectively.

4.1Simulation Parameters:
The simulation parameters of a proposed test power system is shown in TABLE I
Table 1: Simulation parameters of Test power system
Parameter name Numerical Value
Three phase AC Source Voltage 2828V(rms),50 Hz
Source Resistance and Inductance 1mH, 0.1
DC Capacitor 4700.F
DC Capacitor reference voltage 4000V
R-L Load on DC side of nonlinear load 20, 0.1mH

4.2 Test power system without SAF
This section presents the simulation results of test power system without SAF. Figure 6 shows the waveforms of source
currents of test power system. It shows that the presence of harmonics adversely affects the source currents. Figure 7
shows the harmonic spectrum of phase- a of source current and the THD value observed is 12.40% of test power system
without SAF.
IPASJ International Journal of Electrical Engineering(IIJEE)
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Figure 6 Source current waveforms of non-linear load


Figure 7 Harmonic Spectrum and FFT window of non-linear load


Figure 8 3- Load current waveform of non-linear load

4.3 Test power system with SAF
This section shows the simulation results of Test power system with SAF and change of PID values for 100
Generations.
The source and load current waveforms for the optimized value of PID are given in this section. Figure 9 shows the
source currents of the test power system from this Figure 9 it can be seen that the waveforms are purely sinusoidal.
Figure 10 shows the harmonic spectrum of a 3- source current and it can be seen that THD is 0.53%. Similarly
Figure 11 shows the b phase source current harmonic spectrum with THD 0.60% and Figure 12 shows the c phase
harmonic spectrum with THD 0.87%.
IPASJ International Journal of Electrical Engineering(IIJEE)
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Figure 9: 3- source currents of a test power system with SAF


Figure 10 Harmonic spectrum and FFT window of a 1- source current with SAF


Figure 11 Harmonic spectrum and FFT window of 1- source current

IPASJ International Journal of Electrical Engineering(IIJEE)
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Figure 12 Harmonic spectrum and FFT window of 1- source current

Figure 13 show the compensating current of load i.e., the current injected into the line in order to reduce the
harmonics.

Figure 13 waveforms of compensating currents

Figure 13 shows the compensating harmonic currents. Figure 14 shows the variation of voltage across capacitor. From
the figure it can be seen that the reference value is 400 but the actual is changing continuously. Figure 15 shows the
value of kp changing for 100 generations and Figure16 shows the variation of ki for 100 generations. Figure 17 shows
the variation kd for 100 generations.


Figure 14 Waveforms of voltage across dc capacitor
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Figure 15 Variation of kp with generations


Figure 16 Variation of Ki with generations

Figure 17 Variation of kd with generations

Table1 shows the change of THD for the optimized values of kp, ki and kd in 100 Generations for given search range.
If the

Table.1 optimized values of PID
S.No. search range kp ki kd THD (%)
1. 0-2 0.3059 0.0078 1.8118 2.61
2. 0.5-1.5 0.8922 0.8216 1.1627 0.65
3. 0.9-1.1 0.9102 0.9494 1.082 0.64
4. 0.95-1.05 1.0022 1.0476 1.05 0.53

5. CONCLUSION
This paper presents the proposed model of Genetic Algorithm Tuned PID controller based Shunt active filter for
Harmonic reduction by the optimization of PID values was successfully demonstrated in Matlab /simlunk. The SAF
was analyzed with a source and non-linear rectifier load. This method of approach brings down the THD of the source
current that is in compliance with IEEE-519 and IEC 61000-3 required harmonic standards compared to other
methods.

IPASJ International Journal of Electrical Engineering(IIJEE)
Web Site: http://www.ipasj.org/IIJEE/IIJEE.htm
A Publisher for Research Motivation........ Email: editoriijee@ipasj.org
Volume 2, Issue 4, April 2014 ISSN 2321-600X

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AUTHORS

G.Jayakrishna received B.Tech, M.Tech and Ph.D degrees in Electrical Engineering from Jawaharlal
Nehru Technological University, Anantapur, India in 1993, 2004 and 2013 respectively. He has 20 years of
experience in teaching and industry. Currently he is working as professor in Department of Electrical and
Electronics Engineering, Siddharth Institute of Engineering and Technology, Puttur, India. His research
interests include Power Quality, Electrical drives an Power Systems.

N. Ramesh raju completed his B.Tech in EIE in KITS, Kakatiya University, Warangal, and M.Tech
(Instrumentation) in IIT Karagpur, West Bengal, India. He is now pursuing Ph.D in Control Systems in
KL University, Vijayawada, A.P. Now he is working as a professor and HOD of Electrical department in
Siddhartha institute of Engineering and Technology, puttur, A.P. He has 13 years of Teaching experience
and 4 years of Industrial experience

C.Swapna is currently pursuing B.Tech degree in EEE in Siddharth Institute of Engineering and
Technology, puttur, Andhra Pradesh. She has presented papers in many national level technical symposia
and won prizes. She is a student member of ISTE.

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