Astro Digital Spectra Detailed Service Manual 1

ASTRO
Digital Spectra
and Digital Spectra Plus

UHF/VHF/800 MHz Mobile Radios
Detailed Service Manual
ii
Foreword
This manual provides sufficient information to enable qualified service technicians to troubleshoot and repair ASTRO

Digital Spectra
and ASTRO Digital Spectra Plus mobile radios (models W3, W4, W5, W7, and W9) to the component level.
For the most part, the information in this manual pertains to both ASTRO Digital Spectra and ASTRO Digital Spectra Plus
radios. Exceptions are clearly noted where they occur.
For details on radio operation or basic troubleshooting, refer to the applicable manuals available separately. A list of related
publications is provided in the section, Related Publications, on page xiv.
Product Safety and RF Exposure Compliance
ATTENTION!
This radio is restricted to occupational use only to satisfy FCC RF energy exposure requirements.
Before using this product, read the RF energy awareness information and operating instructions in the
Product Safety and RF Exposure booklet enclosed with your radio (Motorola Publication part number
68P81095C99) to ensure compliance with RF energy exposure limits.
Manual Revisions
Changes which occur after this manual is printed are described in FMRs (Florida Manual Revisions). These FMRs provide
complete replacement pages for all added, changed, and deleted items, including pertinent parts list data, schematics, and
component layout diagrams.
Computer Software Copyrights
The Motorola products described in this manual may include copyrighted Motorola computer programs stored in
semiconductor memories or other media. Laws in the United States and other countries preserve for Motorola certain
exclusive rights for copyrighted computer programs, including, but not limited to, the exclusive right to copy or reproduce in
any form the copyrighted computer program. Accordingly, any copyrighted Motorola computer programs contained in the
Motorola products described in this manual may not be copied, reproduced, modified, reverse-engineered, or distributed in
any manner without the express written permission of Motorola. Furthermore, the purchase of Motorola products shall not
be deemed to grant either directly or by implication, estoppel, or otherwise, any license under the copyrights, patents or
patent applications of Motorola, except for the normal non-exclusive license to use that arises by operation of law in the
sale of a product.
Document Copyrights
No duplication or distribution of this document or any portion thereof shall take place without the express written permission
of Motorola. No part of this manual may be reproduced, distributed, or transmitted in any form or by any means, electronic
or mechanical, for any purpose without the express written permission of Motorola.
Disclaimer
The information in this document is carefully examined, and is believed to be entirely reliable. However, no responsibility is
assumed for inaccuracies. Furthermore, Motorola reserves the right to make changes to any products herein to improve
readability, function, or design. Motorola does not assume any liability arising out of the applications or use of any product
or circuit described herein; nor does it cover any license under its patent rights nor the rights of others.
Trademarks
MOTOROLA, the Stylized M logo, ASTRO, and Spectra are registered in the US Patent & Trademark Office. All other
products or service names are the property of their respective owners.
Motorola, Inc. 2002.
Before using this product, read the operating instructions
for safe usage contained in the Product Safety and RF
Exposure booklet enclosed with your radio.
!
C a u t i o n
Table of Contents
Foreword.........................................................................................................ii
Product Safety and RF Exposure Compliance............................................................................................ii
Manual Revisions ........................................................................................................................................ii
Computer Software Copyrights ...................................................................................................................ii
Document Copyrights..................................................................................................................................ii
Disclaimer....................................................................................................................................................ii
Trademarks .................................................................................................................................................ii
Commercial Warranty..................................................................................xv
Limited Warranty .......................................................................................................................................xv
MOTOROLA COMMUNICATION PRODUCTS...............................................................................xv
I. What This Warranty Covers And For How Long ....................................................................xv
II. General Provisions................................................................................................................xv
III. State Law Rights ................................................................................................................. xvi
IV. How To Get Warranty Service ............................................................................................ xvi
V. What This Warranty Does Not Cover................................................................................... xvi
VI. Patent And Software Provisions ........................................................................................ xvii
VII. Governing Law.................................................................................................................. xvii
Model Numbering, Charts, and Specifications.........................................xix
Mobile Radio Model Numbering Scheme................................................................................................. xix
ASTRO Digital Spectra Motorcycle 15 Watt (Ranges 1 and 2) Model Chart.............................................xx
ASTRO Digital Spectra Motorcycle 15 Watt (Ranges 3 and 3.5) Model Chart......................................... xxi
ASTRO Digital Spectra VHF 1025 Watt Model Chart............................................................................ xxii
ASTRO Digital Spectra VHF 1025 and 50110 Watt Model Chart....................................................... xxiii
ASTRO Digital Spectra UHF 1025 Watt Model Chart ........................................................................... xxv
ASTRO Digital Spectra UHF 2040 Watt Model Chart .......................................................................... xxvi
ASTRO Digital Spectra UHF 50110 Watt Model Chart .......................................................................xxviii
ASTRO Digital Spectra 800 MHz Model Chart........................................................................................ xxx
ASTRO Digital Spectra Plus VHF 2550 and 50110 Watt Model Chart............................................... xxxi
ASTRO Digital Spectra Plus 800 MHz Model Chart..............................................................................xxxiii
VHF Radio Specifications...................................................................................................................... xxxv
UHF Radio Specifications..................................................................................................................... xxxvi
800 MHz Radio Specifications..............................................................................................................xxxvii
Chapter 1 Introduction ......................................................................... 1-1
1.1 General .......................................................................................................................................... 1-1
1.2 Notations Used in This Manual ...................................................................................................... 1-2
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July 1, 2002 68P81076C25-C
Chapter 2 General Overview................................................................ 2-1
2.1 Introduction .................................................................................................................................... 2-1
2.2 Analog Mode of Operation............................................................................................................. 2-2
2.3 ASTRO Mode of Operation............................................................................................................ 2-2
2.4 Control Head Assembly ................................................................................................................. 2-2
2.4.1 Display (W3 Model)........................................................................................................... 2-2
2.4.2 Display (W4, W5, and W7 Models) ................................................................................... 2-2
2.4.3 Display (W9 Model)........................................................................................................... 2-3
2.4.4 Vacuum Fluorescent Display Driver.................................................................................. 2-3
2.4.5 Vacuum Fluorescent Voltage Source (W9 Model) ............................................................ 2-3
2.4.6 Controls and Indicators ..................................................................................................... 2-3
2.4.7 Status LEDs ...................................................................................................................... 2-3
2.4.8 Backlight LEDs.................................................................................................................. 2-3
2.4.9 Vehicle Interface Ports...................................................................................................... 2-4
2.4.10 Power Supplies ................................................................................................................. 2-4
2.4.11 Ignition Sense Circuits ...................................................................................................... 2-4
2.5 Power Amplifier.............................................................................................................................. 2-5
2.5.1 Gain Stages ...................................................................................................................... 2-5
2.5.2 Power Control ................................................................................................................... 2-5
2.5.3 Circuit Protection............................................................................................................... 2-5
2.5.4 DC Interconnect ................................................................................................................ 2-5
2.6 Front-End Receiver Assembly ....................................................................................................... 2-6
2.7 RF Board Basic.............................................................................................................................. 2-6
2.8 Voltage-Controlled Oscillator ......................................................................................................... 2-6
2.8.1 VHF Radios....................................................................................................................... 2-6
2.8.2 UHF and 800 MHz Radios ................................................................................................ 2-7
2.9 Command Board............................................................................................................................ 2-7
2.10 ASTRO Spectra Vocoder/Controller Board.................................................................................... 2-7
2.11 Radio Power .................................................................................................................................. 2-8
2.11.1 General ............................................................................................................................. 2-8
2.11.2 B+ Routing for ASTRO Spectra VOCON Board ............................................................... 2-9
Chapter 3 Theory of Operation............................................................ 3-1
3.1 RF Board........................................................................................................................................ 3-1
3.1.1 General ............................................................................................................................. 3-1
3.1.2 Synthesizer ....................................................................................................................... 3-3
3.1.2.1 Reference Frequency Generation............................................................................ 3-3
3.1.2.2 First VCO Frequency Generation ............................................................................ 3-3
3.1.2.3 Programmable Reference Divider............................................................................ 3-4
3.1.2.4 Phase Modulator...................................................................................................... 3-5
3.1.2.5 Loop Filter ................................................................................................................ 3-5
3.1.2.6 Auxiliary Control Bits................................................................................................ 3-5
3.1.2.7 Second VCO............................................................................................................ 3-6
3.1.2.8 Power Distribution.................................................................................................... 3-6
3.1.3 Receiver Back-End ........................................................................................................... 3-6
3.1.3.1 First IF...................................................................................................................... 3-6
3.1.3.2 ABACUS II IC........................................................................................................... 3-7
3.2 Command Board............................................................................................................................ 3-8
3.2.1 Microcontroller and Support ICs ....................................................................................... 3-8
3.2.2 Serial Input/Output IC ....................................................................................................... 3-8
3.2.3 Power-Up/-Down Sequence ............................................................................................. 3-9
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68P81076C25-C July 1, 2002
3.2.4 Regulators ...................................................................................................................... 3-10
3.2.5 Reset Circuits ................................................................................................................. 3-10
3.2.6 Serial Communications on the External Bus .................................................................. 3-11
3.2.7 Synchronous Serial Bus (MOSI) ..................................................................................... 3-12
3.2.8 Received Audio............................................................................................................... 3-12
3.2.9 Microphone Audio........................................................................................................... 3-12
3.2.10 Transmit Deviation.......................................................................................................... 3-13
3.2.11 RS-232 Line Driver ......................................................................................................... 3-13
3.2.12 Flash Programming ........................................................................................................ 3-13
3.2.13 Encryption Voltages........................................................................................................ 3-13
3.2.14 Regulator and Power-Control IC..................................................................................... 3-14
3.3 ASTRO Spectra VOCON Board .................................................................................................. 3-15
3.3.1 General ........................................................................................................................... 3-15
3.3.2 Controller Section ........................................................................................................... 3-15
3.3.3 Vocoder Section ............................................................................................................. 3-17
3.3.4 RX Signal Path ............................................................................................................... 3-18
3.3.5 TX Signal Path................................................................................................................ 3-21
3.3.6 Controller Bootstrap and Asynchronous Buses .............................................................. 3-22
3.3.7 Vocoder Bootstrap.......................................................................................................... 3-24
3.3.8 Serial Peripheral Interface (SPI) Bus.............................................................................. 3-24
3.3.9 Controller Memory Map .................................................................................................. 3-24
3.3.10 Vocoder Memory Map .................................................................................................... 3-26
3.3.11 MCU System Clock......................................................................................................... 3-28
3.3.12 DSP System Clock ......................................................................................................... 3-28
3.3.13 Radio Power-Up/Power-Down Sequence....................................................................... 3-28
3.3.14 VOCON BOARD Signals ................................................................................................ 3-29
3.4 ASTRO Spectra Plus VOCON Board .......................................................................................... 3-38
3.4.1 General ........................................................................................................................... 3-38
3.4.2 ASTRO Spectra Plus Controller Section ........................................................................ 3-38
3.4.3 ASTRO Spectra Plus Vocoder Section........................................................................... 3-39
3.4.4 ASTRO Spectra Plus RX Signal Path............................................................................. 3-41
3.4.5 ASTRO Spectra Plus TX Signal Path............................................................................. 3-42
3.4.6 ASTRO Spectra Plus Controller Bootstrap and Asynchronous Busses ......................... 3-43
3.4.7 ASTRO Spectra Plus Serial Peripheral Interface Bus .................................................... 3-44
3.4.8 ASTRO Spectra Plus MCU and DSP System Clocks..................................................... 3-44
3.4.9 ASTRO Spectra Plus Voltage Regulators ...................................................................... 3-45
3.4.10 ASTRO Spectra Plus Radio Power-Up/Power-Down Sequence.................................... 3-46
3.5 Voltage Control Oscillator ............................................................................................................ 3-47
3.5.1 VHF Band ....................................................................................................................... 3-47
3.5.1.1 General .................................................................................................................. 3-47
3.5.1.2 DC Voltage Supplies.............................................................................................. 3-47
3.5.1.3 VCO....................................................................................................................... 3-47
3.5.1.4 Synthesizer Feedback ........................................................................................... 3-48
3.5.1.5 RX Buffer Circuitry................................................................................................. 3-48
3.5.1.6 Frequency Divider and TX Buffer Circuitry ............................................................ 3-48
3.5.2 UHF Band....................................................................................................................... 3-48
3.5.2.1 General .................................................................................................................. 3-48
3.5.2.2 Super Filter 8.6 V................................................................................................... 3-49
3.5.2.3 VCO....................................................................................................................... 3-49
3.5.2.4 Receive Mode (AUX2* Low) .................................................................................. 3-49
3.5.2.5 Transmit Mode (AUX2* High) ................................................................................ 3-49
3.5.2.6 Bandshift Circuit..................................................................................................... 3-49
3.5.2.7 Output Buffer ......................................................................................................... 3-49
3.5.2.8 First Buffer ............................................................................................................. 3-49
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July 1, 2002 68P81076C25-C
3.5.2.9 Doubler .................................................................................................................. 3-50
3.5.2.10 Synthesizer Feedback ........................................................................................... 3-50
3.5.2.11 Second Buffer ........................................................................................................ 3-50
3.5.2.12 Receive/Transmit Switch ....................................................................................... 3-50
3.5.3 800 MHz Band ................................................................................................................ 3-50
3.5.3.1 General .................................................................................................................. 3-50
3.5.3.2 Super Filter 8.6 V................................................................................................... 3-50
3.5.3.3 VCO....................................................................................................................... 3-50
3.5.3.4 Receive Mode-AUX 1* and AUX 2* High............................................................... 3-51
3.5.3.5 Transmit Mode-AUX 1* High; AUX 2* Low............................................................ 3-51
3.5.3.6 TalkAround Mode-AUX 1* Low; AUX 2* Low......................................................... 3-51
3.5.3.7 VCO Buffer............................................................................................................. 3-51
3.5.3.8 First Buffer Circuit .................................................................................................. 3-51
3.5.3.9 Doubler .................................................................................................................. 3-51
3.5.3.10 Second Buffer ........................................................................................................ 3-52
3.5.3.11 K9.4 V Switch......................................................................................................... 3-52
3.6 Receiver Front-End...................................................................................................................... 3-53
3.6.1 VHF Band ....................................................................................................................... 3-53
3.6.1.1 General .................................................................................................................. 3-53
3.6.1.2 Theory of Operation............................................................................................... 3-53
3.6.2 UHF Band ....................................................................................................................... 3-53
3.6.2.1 General .................................................................................................................. 3-53
3.6.3 800 MHz Band ................................................................................................................ 3-54
3.6.3.1 General .................................................................................................................. 3-54
3.7 Power Amplifiers.......................................................................................................................... 3-55
3.7.1 VHF Band Power Amplifiers ........................................................................................... 3-55
3.7.1.1 High-Power Amplifier ............................................................................................. 3-55
3.7.1.1.1 Transmitter...................................................................................................... 3-55
3.7.1.1.2 Antenna Switch and Harmonic Filter............................................................... 3-56
3.7.1.1.3 Power Control Circuitry................................................................................... 3-57
3.7.1.2 25/10-Watt Power Amplifier ................................................................................... 3-59
3.7.1.3 50-Watt Power Amplifiers ...................................................................................... 3-63
3.7.1.3.1 Transmitter...................................................................................................... 3-63
3.7.2 UHF Band Power Amplifiers ........................................................................................... 3-68
3.7.2.1.1 Transmitter...................................................................................................... 3-68
3.7.2.2 40-Watt Power Amplifier ........................................................................................ 3-72
3.7.2.2.1 Transmitter...................................................................................................... 3-72
3.7.3 800 MHz Band Power Amplifiers .................................................................................... 3-77
3.7.3.1 15- and 35-Watt Amplifiers .................................................................................... 3-77
3.7.3.1.1 Transmitter...................................................................................................... 3-77
3.7.3.1.4 Temperature Sensing ..................................................................................... 3-81
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68P81076C25-C July 1, 2002
Chapter 4 Troubleshooting Procedures............................................. 4-1
4.1 ASTRO Spectra Procedures.......................................................................................................... 4-1
4.1.1 Handling Precautions........................................................................................................ 4-1
4.1.2 Voltage Measurement and Signal Tracing........................................................................ 4-2
4.1.3 Power-Up Self-Check Errors ............................................................................................ 4-2
4.1.3.1 Power-Up Sequence................................................................................................ 4-3
4.1.4 RF Board Troubleshooting................................................................................................ 4-5
4.1.4.1 Display Flashes FAIL 001 ..................................................................................... 4-5
4.1.4.1.1 Incorrect Values at U602, Pin 19...................................................................... 4-6
4.1.4.1.2 Incorrect Values at U602 Pin 25 (MODULUS CONTROL) ............................... 4-7
4.1.4.1.3 Incorrect Voltage at Positive Steering Line....................................................... 4-7
4.1.4.1.4 Incorrect Values at U602, pin 27 ...................................................................... 4-7
4.1.4.2 Review of Synthesizer Fundamentals ..................................................................... 4-7
4.1.4.3 Second VCO Checks............................................................................................... 4-8
4.1.4.4 Troubleshooting the Back-End ................................................................................ 4-8
4.1.5 Standard Bias Table ......................................................................................................... 4-9
4.2 ASTRO Spectra Plus Procedures................................................................................................ 4-10
4.2.1 ASTRO Spectra Plus Power-Up Self-Check Errors........................................................ 4-10
4.2.2 ASTRO Spectra Plus Power-Up Self-Check Diagnostics and Repair ............................ 4-11
4.2.3 ASTRO Spectra Plus Standard Bias Table .................................................................... 4-12
4.3 VCO Procedures.......................................................................................................................... 4-13
4.3.1 VHF Band ....................................................................................................................... 4-13
4.3.1.1 VCO Hybrid Assembly........................................................................................... 4-13
4.3.1.2 Out-of-Lock Condition............................................................................................ 4-13
4.3.1.3 No or Low Output Power (TX or RX Injection)....................................................... 4-15
4.3.1.4 No or Low Modulation............................................................................................ 4-15
4.3.2 UHF Band....................................................................................................................... 4-15
4.3.3 800 MHz Band................................................................................................................ 4-18
4.4 Receiver Front-End (RXFE)......................................................................................................... 4-20
4.4.1 VHF Band ....................................................................................................................... 4-20
4.4.2 UHF Band....................................................................................................................... 4-20
4.4.3 800 MHz Band................................................................................................................ 4-20
4.5 Power Amplifier Procedures ........................................................................................................ 4-21
4.5.1 VHF Band ....................................................................................................................... 4-21
4.5.1.1.1 General Troubleshooting and Repair Notes ................................................... 4-21
4.5.1.1.2 PA Functional Testing..................................................................................... 4-25
4.5.1.1.3 Power Control and Protection Circuitry........................................................... 4-28
4.5.1.2 25/10 Watt Power Amplifier ................................................................................... 4-29
4.5.1.2.3 Localizing Problems........................................................................................ 4-34
4.5.1.2.4 Isolating Failures............................................................................................. 4-35
4.5.1.3 50 Watt Power Amplifiers ...................................................................................... 4-38
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July 1, 2002 68P81076C25-C
4.5.2 UHF Band ....................................................................................................................... 4-47
4.5.2.2 40 Watt Power Amplifiers....................................................................................... 4-56
4.5.3 800 MHz Band ................................................................................................................ 4-66
4.5.3.1 15 Watt and 35 Watt Power Amplifiers .................................................................. 4-66
Chapter 5 Troubleshooting Charts ..................................................... 5-1
5.1 Introduction .................................................................................................................................... 5-1
5.2 List of Troubleshooting Charts....................................................................................................... 5-1
RF Board Back-End................................................................................................................. 5-3
Command Board ..................................................................................................................... 5-4
Radio Power-Up Fail ............................................................................................................... 5-5
Bootstrap Fail .......................................................................................................................... 5-6
01/90, General Hardware Failure ............................................................................................ 5-7
01/81, Host ROM Checksum Failure....................................................................................... 5-7
01/82 or 002, External EEPROM Checksum Failure............................................................... 5-8
01/84, SLIC Initialization Failure.............................................................................................. 5-8
01/88, MCU (Host mC) External SRAM Failure ...................................................................... 5-9
01/92, Internal EEPROM Checksum Failure........................................................................... 5-9
02/A0, ADSIC Checksum Failure .......................................................................................... 5-10
02/81, DSP ROM Checksum Failure..................................................................................... 5-10
02/88, DSP External SRAM Failure U414............................................................................. 5-11
02/90, General DSP Hardware Failure.................................................................................. 5-12
09/10, Secure Hardware Failure............................................................................................ 5-13
09/90, Secure Hardware Failure............................................................................................ 5-13
No RX Audio.......................................................................................................................... 5-14
No TX Modulation.................................................................................................................. 5-15
Key Load Fail......................................................................................................................... 5-16
800 MHz Receiver Front-End Hybrid..................................................................................... 5-17
UHF Receiver Front-End Hybrid............................................................................................ 5-17
VHF Receiver Front-End Hybrid............................................................................................ 5-18
ASTRO Spectra Plus VOCON Power-Up Failure.................................................................. 5-19
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68P81076C25-C July 1, 2002
ASTRO Spectra Plus VOCON DC Supply Failure ................................................................ 5-20
ASTRO Spectra Plus VOCON TX Modulation Failure Sheet 1 of 4...................................... 5-21
ASTRO Spectra Plus VOCON RX Audio Failure .................................................................. 5-24
ASTRO Spectra Plus VOCON Secure Hardware Failure ..................................................... 5-25
ASTRO Spectra Plus VOCON Key Load Fail........................................................................ 5-26
Chapter 6 Troubleshooting Waveforms ............................................. 6-1
6.1 Introduction.................................................................................................................................... 6-1
6.2 ASTRO Spectra Waveforms.......................................................................................................... 6-1
Waveform W1: Power-On Reset Timing........................................................................................ 6-1
Waveform W2: DSP SSI Port RX Mode ........................................................................................ 6-2
Waveform W3: DSP SSI Port TX Mode CSQ................................................................................ 6-2
Waveform W4: ABACUS Programming at Mode Change............................................................. 6-3
Waveform W5: ABACUS/ADSIC Interface .................................................................................... 6-3
Waveform W6: SPI Bus Programming ADSIC .............................................................................. 6-4
Waveform W7: Receive Audio....................................................................................................... 6-4
Waveform W8: Transmit Audio...................................................................................................... 6-5
Waveform W9: Power-Down Reset ............................................................................................... 6-5
Waveform W10: ADSIC 2.4 MHz Reference................................................................................. 6-6
6.3 ASTRO Spectra Digital Plus VOCON Board Waveforms .............................................................. 6-7
32 kHz Clock Waveform................................................................................................................ 6-7
16.8 MHz Clock Waveform............................................................................................................ 6-8
TX Modulation Out Waveform ....................................................................................................... 6-8
Differential ADDAG Output Waveform........................................................................................... 6-9
TX SSI Waveform.......................................................................................................................... 6-9
SPI Bus Waveform ...................................................................................................................... 6-10
TX 1 kHz Tone Waveform ........................................................................................................... 6-10
Serial Audio Port Waveform ........................................................................................................ 6-11
RX Audio Waveform.................................................................................................................... 6-11
RX BBP Waveform...................................................................................................................... 6-12
Secure Interface Waveform......................................................................................................... 6-12
8 kHz Frame Sync for Security Circuitry Waveform .................................................................... 6-13
Chapter 7 Schematics, Component Location Diagrams, and
Parts Lists .............................................................................................. 7-1
7.1 RF Section .................................................................................................................................... 7-2
ASTRO Spectra Radio Interconnection................................................................................... 7-4
HRN4009B/HRN6014A VHF RF Board; HRN4010B/HRN6020A UHF RF Board; and
HRN6019A 800 MHz RF Board Schematic............................................................................. 7-5
HRN4009B/HRN6014A VHF RF Board, HRN4010B/HRN6020A UHF RF Board, and
HRN6019A 800 MHz RF Board Component Location Diagrams............................................ 7-6
HRN4009C/HRN6014C VHF RF Board Schematic Diagram.................................................. 7-9
HRN4009C/HRN6014C VHF RF Board Component Location Diagrams ............................. 7-10
HRN4009E and HRN6014D VHF RF Board; HRN4010D and HRN6020C UHF RF Board; and
HRN6019C 800 MHz RF Board Schematic Diagram (Sheet 1 of 2) ..................................... 7-12
HRN6019C 800 MHz RF Board Schematic Diagram (Sheet 2 of 2) ..................................... 7-13
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July 1, 2002 68P81076C25-C
HRN6019C 800 MHz RF Component Location Diagram...................................................... 7-14
7.2 Command Board Section............................................................................................................. 7-17
HLN5558E/F/G, HLN6529C/D/E/F/G, HLN6560C/D/E/F/G/H and HLN6562C/D/E/F/G/H
Command Board Schematic Diagram................................................................................... 7-17
HLN5558E/F/G, HLN6529C/D/E, HLN6560C/D/E/F/G/H, and HLN6562C/D/E/F/G/H Command
Board Component Location Diagrams .................................................................................. 7-18
HLN5558H/J, HLN6529H, HLN6560J and HLN6562J Command Board Schematic
Diagram................................................................................................................................. 7-21
HLN5558H/J, HLN6529H, HLN6560J and HLN6562J Component Location Diagram......... 7-22
7.3 VOCON Section........................................................................................................................... 7-26
HLN6458D VOCON Board Schematic (Sheet 1 of 2) ........................................................... 7-26
HLN6458D VOCON Board Schematic (Sheet 2 of 2) ........................................................... 7-27
HLN6458D VOCON Board Component Location Diagrams (Sheet 1 of 2)........................... 7-28
HLN6458D VOCON Board Component Location Diagrams (Sheet 2 of 2)........................... 7-29
HLN6458E VOCON Board Schematic (Sheet 1 of 2)............................................................ 7-32
HLN6458E VOCON Board Schematic (Sheet 2 of 2)............................................................ 7-33
HLN6458E VOCON Board Component Location Diagrams (Sheet 1 of 2)........................... 7-34
HLN6458E VOCON Board Component Location Diagrams (Sheet 2 of 2)........................... 7-35
HLN6458F/G VOCON Board Schematic (Sheet 1 of 2) ........................................................ 7-38
HLN6458F/G VOCON Board Schematic (Sheet 2 of 2) ........................................................ 7-39
HLN6458F/G VOCON Board Component Location Diagrams (Sheet 1 of 2) ....................... 7-40
HLN6458F/G VOCON Board Component Location Diagrams (Sheet 2 of 2) ....................... 7-41
HLN6458H VOCON Board Schematic (Sheet 1 of 2) ........................................................... 7-44
HLN6458H VOCON Board Schematic (Sheet 2 of 2) ........................................................... 7-45
HLN6458H VOCON Board Component Location Diagrams ................................................. 7-46
7.4 ASTRO Spectra Plus VOCON Section........................................................................................ 7-49
ASTRO Spectra Plus Top Level Schematic (Sheet 1 of 2) ................................................... 7-49
ASTRO Spectra Plus Top Level Schematic (Sheet 2 of 2) .................................................... 7-50
ASTRO Spectra Plus RF Interface Schematic (Sheet 1 of 2) ............................................... 7-51
ASTRO Spectra Plus RF Interface Schematic (Sheet 2 of 2)................................................ 7-52
ASTRO Spectra Plus Digital/USB Schematic (Sheet 1 of 2)................................................. 7-53
ASTRO Spectra Plus Digital/USB Schematic (Sheet 2 of 2) ................................................. 7-54
ASTRO Spectra Plus Audio/DC Schematic........................................................................... 7-55
ASTRO Spectra Plus Voltage Conversion Schematic........................................................... 7-56
ASTRO Spectra Plus Secure Interface Schematic................................................................ 7-57
ASTRO Spectra Plus VOCON Component Location Diagram, Top View ............................. 7-58
ASTRO Spectra Plus VOCON Component Location Diagram, Bottom View........................ 7-59
7.5 VCO Section ................................................................................................................................ 7-62
HLD6061D and HLD6062D VHF VCO Hybrid Schematic..................................................... 7-62
HLD6061D and HLD6062D VHF VCO Hybrid Component Location Diagram...................... 7-63
HLD4342B and HLD4343B VHF VCO Carrier Schematic Diagram...................................... 7-64
HLD4342D and HLD4343D VHF VCO Carrier Schematic Diagram...................................... 7-65
HLD4342B/HLD4343B VHF VCO Carrier Component Location Diagram............................. 7-66
HLD4342D/HLD4343D VHF VCO Carrier Component Location Diagram............................ 7-67
UHF VCO Ranges 1, 2, 3, and 4 Hybrid Schematic.............................................................. 7-70
HLE6101A UHF VCO Range 1 Hybrid and HLE6102A Range 2 Hybrid Component Location
Diagram................................................................................................................................. 7-71
HLE6103B UHF VCO Range 3 Hybrid and HLE6104B Range 4 Hybrid Component Location
Diagram................................................................................................................................. 7-73
UHF VCO Ranges 1, 2, 3, and 4 Schematic Diagram........................................................... 7-75
HLE6045B Range 1 and HLE6046B Range 2 UHF VCO Component Location Diagram..... 7-76
HLE6000D Range 3 and HLE6041D Range 4 UHF VCO Component Location Diagrams .. 7-77
HLF6080B 800 MHz VCO Schematic Diagram..................................................................... 7-79
Table of Contents xi
68P81076C25-C July 1, 2002
HLF6080B 800 MHz VCO Component Location Diagram.................................................... 7-80
7.6 RX Front-End Section.................................................................................................................. 7-82
HRD6001E/6002E/6011E/6012E VHF Receiver Front-End Schematic ................................ 7-82
HRD6001E/6002E/6011E/6012E VHF Component Location Diagram................................. 7-83
HRD6001G/6002G/6011G/6012G VHF Receiver Front-End Schematic .............................. 7-87
HRD6001G/6002G/6011G/6012G VHF Receiver Front-End Component Location Diagram7-88
HRE6001B/6002C/6003B/6004B/6011B/6012B/6014B UHF Receiver Front-End Preamp and
Standard Schematics ............................................................................................................ 7-90
HRE6001B/6002C/6003B/6004B/6011B/6012B/6014B UHF Receiver Front-End Hybrid
Component Location Diagram............................................................................................... 7-91
HRF6004B/C 800 MHz Receiver Front-End Schematic Diagram......................................... 7-94
HRF6004B/C 800 MHz Receiver Front-End Component Location Diagram......................... 7-95
7.7 Power Amplifier Section............................................................................................................... 7-97
HLD6022C VHF 50 Watt PA Schematic ............................................................................... 7-97
HLD6022C VHF 50-Watt PA Component Location Diagram, Side 1 .................................... 7-98
HLD6022C VHF 50-Watt PA Component Location Diagram, Side 2.................................... 7-99
HLD6064C VHF 100-Watt PA Schematic ........................................................................... 7-101
HLD6064C VHF 100-Watt PA Component Location Diagram, Side 1 ................................ 7-102
HLD6064C VHF 100-Watt PA Component Location Diagram, Side 2................................ 7-103
HLD6032B/HLD6066B VHF 25-Watt PA Schematic........................................................... 7-105
HLD6032B/HLD6066B VHF 25-Watt PA Component Location Diagram, Side 1................ 7-106
HLD6032B/HLD6066B VHF 25-Watt PA Component Location Diagram, Side 2................ 7-107
HLE6062B and HLE6071B UHF 25-Watt PA Schematic .................................................... 7-110
HLE6062B UHF 25-Watt PA Component Location Diagram, Side 1 .................................. 7-111
HLE6062B UHF 25-Watt PA Component Location Diagram, Side 2.................................. 7-112
HLE6043C, HLE6044C, and HLE6049B UHF 40-Watt PA Schematic................................ 7-114
HLE6043C, HLE6044C, and HLE6049B UHF 40-Watt PA Component Location Diagram,
Side 1 .................................................................................................................................. 7-115
HLE6043C, HLE6044C, and HLE6049B UHF 40-Watt PA Component Location Diagram,
Side 2 .................................................................................................................................. 7-116
HLE6039C, HLE6040C, and HLE6051C UHF 100-Watt PA Schematic ............................. 7-120
HLE6039C, HLE6040C, and HLE6051C UHF 100-Watt PA Component Location Diagram,
Side 1 .................................................................................................................................. 7-121
HLE6039C, HLE6040C, and HLE6051C UHF 100-Watt PA Component Location Diagram,
Side 2 .................................................................................................................................. 7-122
HLF6078B 800 MHz 15-Watt PA Schematic....................................................................... 7-127
HLF6078B 800 MHz 15-Watt PA Component Location Diagram, Side 1............................ 7-128
HLF6078B 800 MHz 15-Watt PA Component Location Diagram, Side 2 ........................... 7-129
HLF6077D 800 MHz 35-Watt PA Schematic ...................................................................... 7-131
HLF6077D 800 MHz 35-Watt PA Component Location Diagram, Side 1............................ 7-132
HLF6077D 800 MHz 35-Watt PA Component Location Diagram, Side 2 ........................... 7-133
Appendix A Secure Modules...................................................................A-1
A.1 Introduction....................................................................................................................................A-1
A.2 Circuit Description..........................................................................................................................A-2
A.3 Troubleshooting Secure Operations..............................................................................................A-2
A.3.1 Error 09/10, Error 09/90....................................................................................................A-2
A.3.2 Keyload.............................................................................................................................A-2
xii Table of Contents
July 1, 2002 68P81076C25-C
Appendix B Replacement Parts Ordering..............................................B-1
B.1 Basic Ordering Information ............................................................................................................B-1
B.2 Transceiver Board and VOCON Board Ordering Information........................................................B-1
B.3 Motorola Online..............................................................................................................................B-1
B.4 Mail Orders ....................................................................................................................................B-1
B.5 Telephone Orders..........................................................................................................................B-2
B.6 Fax Orders.....................................................................................................................................B-2
B.7 Parts Identification .........................................................................................................................B-2
B.8 Product Customer Service.............................................................................................................B-2
Glossary......................................................................................... Glossary-1
List of Figures xiii
68P81076C25-C July 1, 2002
List of Figures
Figure 2-1. DC Voltage Routing Block Diagram...................................................................................... 2-9
Figure 2-2. ASTRO Spectra B+ Routing for Vocoder/Controller (VOCON) Board ................................ 2-10
Figure 3-1. Prescaler IC Block Diagram.................................................................................................. 3-2
Figure 3-2. Synthesizer IC Block Diagram.............................................................................................. 3-2
Figure 3-3. Loop Divider Waveforms....................................................................................................... 3-4
Figure 3-4. Loop Filter Schematic ........................................................................................................... 3-5
Figure 3-5. Power-on Reset .................................................................................................................. 3-11
Figure 3-6. Transmitter Attack Time...................................................................................................... 3-14
Figure 3-7. VOCON Board - Controller Section .................................................................................... 3-16
Figure 3-8. VOCON Board - Vocoder Section....................................................................................... 3-18
Figure 3-9. DSP RSSI Port - RX Mode ................................................................................................. 3-19
Figure 3-10. DSP RSSI Port - TX Mode.................................................................................................. 3-21
Figure 3-11. Host SB9600 and RS232 Ports .......................................................................................... 3-23
Figure 3-12. Controller Memory Mapping................................................................................................ 3-25
Figure 3-13. Vocoder Memory Mapping.................................................................................................. 3-27
Figure 3-14. ASTRO Spectra Plus VOCON Board - Controller Section.................................................. 3-39
Figure 3-15. ASTRO Spectra Plus VOCON Board - Vocoder Section .................................................... 3-40
Figure 3-16. ASTRO Spectra Plus RX Mode .......................................................................................... 3-41
Figure 3-17. ASTRO Spectra Plus TX Mode........................................................................................... 3-42
Figure 3-18. ASTRO Spectra Plus Host SB9600 and RS232 Ports........................................................ 3-44
Figure 3-19. ASTRO Spectra Plus VOCON DC Distribution................................................................... 3-45
Figure 3-20. RPCIC Block Diagram........................................................................................................ 3-57
Figure 3-21. Regulator/Power Control IC Block Diagram........................................................................ 3-61
Figure 3-22. 50-Watt Power Amplifier Block Diagram............................................................................. 3-63
Figure 3-23. Regulator/Power Control IC Block Diagram........................................................................ 3-65
Figure 3-24. UHF High-Power, Power Amplifier Block Diagram............................................................. 3-68
Figure 4-1. VCO Block Diagram - VHF Band........................................................................................ 4-14
Figure 4-2. VCO Block Diagram - UHF Band........................................................................................ 4-17
Figure 4-3. VCO Block Diagram - 800 MHz Band................................................................................. 4-18
Figure 4-4. Connector Pin-Out - High-Power Amplifier ......................................................................... 4-22
Figure 4-5. PA Test Adapter, 25/10 Watt Power Amplifier ..................................................................... 4-31
Figure 4-6. PA Test Adapter, 50 Watt Power Amplifier .......................................................................... 4-40
Figure 4-7. Connector Pin-Out - High-Power Amplifier ......................................................................... 4-48
Figure 4-8. Block Diagram for Spectra High-Power Power Amplifier .................................................... 4-56
Figure 4-9. PA Test Adapter, 40 Watt Power Amplifier .......................................................................... 4-58
Figure 4-10. PA Test Adapter, 15 and 35 Watt Power Amplifier .............................................................. 4-67
Go to Chapter 7 on page 7-1 for a listing of schematics and component location diagrams.
xiv List of Tables
July 1, 2002 68P81076C25-C
List of Tables
Table 3-1. Integrated Circuits Voltages ................................................................................................ 3-10
Table 3-2. VOCON Board Address Bus (A) Pinouts ............................................................................ 3-29
Table 3-3. VOCON Board Address Bus (HA) Pinouts.......................................................................... 3-30
Table 3-4. VOCON Board Data Bus (D) Pinouts.................................................................................. 3-30
Table 3-5. VOCON Board Data Bus (HD) Pinouts............................................................................... 3-31
Table 3-6. U204 (MCU) ........................................................................................................................ 3-32
Table 3-7. U206 (SLIC) ........................................................................................................................ 3-33
Table 3-8. VOCON U405 (DSP) .......................................................................................................... 3-35
Table 3-9. VOCON U406 (ADSIC) ....................................................................................................... 3-36
Table 4-1. Power-Up Self-Check Error Codes ....................................................................................... 4-2
Table 4-2. Voltage by Location............................................................................................................... 4-5
Table 4-3. Feedback Frequency Ranges............................................................................................... 4-7
Table 4-4. Standard Operating Bias....................................................................................................... 4-9
Table 4-5. ASTRO Spectra Plus Power-Up Self-Check Error Codes .................................................. 4-10
Table 4-6. ASTRO Spectra Plus Standard Operating Bias .................................................................. 4-12
Table 4-7. VCO Frequency .................................................................................................................. 4-15
Table 4-8. Power Control DC Voltage Chart ........................................................................................ 4-23
Table 4-9. LLA and 2nd Stage Typical Voltages................................................................................... 4-26
Table 4-10. DC Voltages and Input Power Chart ................................................................................... 4-30
Table 4-12. Antenna Switch DC Voltage Chart ...................................................................................... 4-34
Table 4-13. LLA and Driver Typical Voltages ......................................................................................... 4-35
Table 4-16. LLA and Pre-Driver Typical Voltages .................................................................................. 4-43
Table 4-18. LLA and 2nd Stage Typical Voltages................................................................................... 4-52
Table 4-22. LLA and Pre-Driver Typical Voltages .................................................................................. 4-62
Table 5-1. List of Troubleshooting Charts .............................................................................................. 5-1
Table A-1. ASTRO Digital Spectra Secure Modules...............................................................................A-1
Table A-2. ASTRO Digital Spectra Plus Secure Modules.......................................................................A-1
Related Publications
ASTRO Digital Spectra and Digital Spectra Plus Model W3 Users Guide .................................. 68P81090C61
ASTRO Digital Spectra and Digital Spectra Plus Models W4, W5, W7, and W9 Users Guide ... 68P81090C62
ASTRO Digital Spectra Hand-Held Control Head Users Guide (Model W3)............................... 68P81073C25
ASTRO Digital Spectra (Model W4, W5, W7, and W9) Users Guide.......................................... 68P81074C80
ASTRO Digital Spectra and Digital Spectra Plus Mobile Radios Basic Service Manual .............. 68P81076C20
ASTRO Digital Spectra Mobile Radios Dual Control Head Radio System Service Manual ......... 68P81091C78
ASTRO Spectra and Digital Spectra FM Two-Way Mobile Radios Installation Manual................ 68P81070C85
ASTRO Spectra Motorcycle Radios Supplemental Installation Manual ...................................... 68P80103W01
KVL 3000 Users Manual ..............................................................................................................68P81131E16
Spectra VHF VCO Section Detailed Service Manual Supplement ............................................... 68P81074C48
Spectra High-Power Power Amplifier Detailed Service Manual Supplement ............................... 68P81077C25
Spectra Systems 9000 Control Unit Detailed Service Manual Supplement ................................. 68P81077C30
Spectra A5 and A7 Control Head Instruction Manual....................................................................68P81109C33
Spectra A4 Control Head Instruction Manual ...............................................................................68P81109C34
Commercial Warranty
Limited Warranty
MOTOROLA COMMUNICATION PRODUCTS
I. What This Warranty Covers And For How Long
MOTOROLA INC. (MOTOROLA) warrants the MOTOROLA manufactured Communication
Products listed below (Product) against defects in material and workmanship under normal use and
service for a period of time from the date of purchase as scheduled below:
Motorola, at its option, will at no charge either repair the Product (with new or reconditioned parts),
replace it (with a new or reconditioned Product), or refund the purchase price of the Product during
the warranty period provided it is returned in accordance with the terms of this warranty. Replaced
parts or boards are warranted for the balance of the original applicable warranty period. All replaced
parts of Product shall become the property of MOTOROLA.
This express limited warranty is extended by MOTOROLA to the original end user purchaser only
and is not assignable or transferable to any other party. This is the complete warranty for the Product
manufactured by MOTOROLA. MOTOROLA assumes no obligations or liability for additions or
modifications to this warranty unless made in writing and signed by an officer of MOTOROLA.
Unless made in a separate agreement between MOTOROLA and the original end user purchaser,
MOTOROLA does not warrant the installation, maintenance or service of the Product.
MOTOROLA cannot be responsible in any way for any ancillary equipment not furnished by
MOTOROLA which is attached to or used in connection with the Product, or for operation of the
Product with any ancillary equipment, and all such equipment is expressly excluded from this
warranty. Because each system which may use the Product is unique, MOTOROLA disclaims
liability for range, coverage, or operation of the system as a whole under this warranty.
II. General Provisions
This warranty sets forth the full extent of MOTOROLA'S responsibilities regarding the Product.
Repair, replacement or refund of the purchase price, at MOTOROLA's option, is the exclusive
remedy. THIS WARRANTY IS GIVEN IN LIEU OF ALL OTHER EXPRESS WARRANTIES. IMPLIED
WARRANTIES, INCLUDING WITHOUT LIMITATION, IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE LIMITED TO THE
DURATION OF THIS LIMITED WARRANTY. IN NO EVENT SHALL MOTOROLA BE LIABLE FOR
DAMAGES IN EXCESS OF THE PURCHASE PRICE OF THE PRODUCT, FOR ANY LOSS OF
USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, LOST PROFITS OR SAVINGS
OR OTHER INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE
USE OR INABILITY TO USE SUCH PRODUCT, TO THE FULL EXTENT SUCH MAY BE
DISCLAIMED BY LAW.
ASTRO Digital Spectra and Digital Spectra
Plus Units
One (1) Year
Product Accessories One (1) Year
June 28, 2002 68P81076C25-C
xvi Commercial Warranty
III. State Law Rights
SOME STATES DO NOT ALLOW THE EXCLUSION OR LIMITATION OF INCIDENTAL OR
CONSEQUENTIAL DAMAGES OR LIMITATION ON HOW LONG AN IMPLIED WARRANTY
LASTS, SO THE ABOVE LIMITATION OR EXCLUSIONS MAY NOT APPLY.
This warranty gives specific legal rights, and there may be other rights which may vary from state to
state.
IV. How To Get Warranty Service
You must provide proof of purchase (bearing the date of purchase and Product item serial number)
in order to receive warranty service and, also, deliver or send the Product item, transportation and
insurance prepaid, to an authorized warranty service location. Warranty service will be provided by
Motorola through one of its authorized warranty service locations. If you first contact the company
which sold you the Product, it can facilitate your obtaining warranty service. You can also call
Motorola at 1-888-567-7347 US/Canada.
V. What This Warranty Does Not Cover
A. Defects or damage resulting from use of the Product in other than its normal and customary
manner.
B. Defects or damage from misuse, accident, water, or neglect.
C. Defects or damage from improper testing, operation, maintenance, installation, alteration,
modification, or adjustment.
D. Breakage or damage to antennas unless caused directly by defects in material workmanship.
E. A Product subjected to unauthorized Product modifications, disassemblies or repairs (includ-
ing, without limitation, the addition to the Product of non-Motorola supplied equipment) which
adversely affect performance of the Product or interfere with Motorola's normal warranty
inspection and testing of the Product to verify any warranty claim.
F. Product which has had the serial number removed or made illegible.
G. Rechargeable batteries if:
H. any of the seals on the battery enclosure of cells are broken or show evidence of tampering.
I. the damage or defect is caused by charging or using the battery in equipment or service other
than the Product for which it is specified.
J. Freight costs to the repair depot.
K. A Product which, due to illegal or unauthorized alteration of the software/firmware in the Prod-
uct, does not function in accordance with MOTOROLA's published specifications or the FCC
type acceptance labeling in effect for the Product at the time the Product was initially distrib-
uted from MOTOROLA.
L. Scratches or other cosmetic damage to Product surfaces that does not affect the operation of
the Product.
M. Normal and customary wear and tear.
68P81076C25-C June 28, 2002
Commercial Warranty xvii
VI. Patent And Software Provisions
MOTOROLA will defend, at its own expense, any suit brought against the end user purchaser to the
extent that it is based on a claim that the Product or parts infringe a United States patent, and
MOTOROLA will pay those costs and damages finally awarded against the end user purchaser in
any such suit which are attributable to any such claim, but such defense and payments are
conditioned on the following:
A. that MOTOROLA will be notified promptly in writing by such purchaser of any notice of such
claim;
B. that MOTOROLA will have sole control of the defense of such suit and all negotiations for its
settlement or compromise; and
C. should the Product or parts become, or in MOTOROLA's opinion be likely to become, the
subject of a claim of infringement of a United States patent, that such purchaser will permit
MOTOROLA, at its option and expense, either to procure for such purchaser the right to con-
tinue using the Product or parts or to replace or modify the same so that it becomes nonin-
fringing or to grant such purchaser a credit for the Product or parts as depreciated and accept
its return. The depreciation will be an equal amount per year over the lifetime of the Product
or parts as established by MOTOROLA.
MOTOROLA will have no liability with respect to any claim of patent infringement which is based
upon the combination of the Product or parts furnished hereunder with software, apparatus or
devices not furnished by MOTOROLA, nor will MOTOROLA have any liability for the use of ancillary
equipment or software not furnished by MOTOROLA which is attached to or used in connection with
the Product. The foregoing states the entire liability of MOTOROLA with respect to infringement of
patents by the Product or any parts thereof.
Laws in the United States and other countries preserve for MOTOROLA certain exclusive rights for
copyrighted MOTOROLA software such as the exclusive rights to reproduce in copies and distribute
copies of such Motorola software. MOTOROLA software may be used in only the Product in which
the software was originally embodied and such software in such Product may not be replaced,
copied, distributed, modified in any way, or used to produce any derivative thereof. No other use
including, without limitation, alteration, modification, reproduction, distribution, or reverse
engineering of such MOTOROLA software or exercise of rights in such MOTOROLA software is
permitted. No license is granted by implication, estoppel or otherwise under MOTOROLA patent
rights or copyrights.
VII. Governing Law
This Warranty is governed by the laws of the State of Illinois, USA.
June 28, 2002 68P81076C25-C
This Page Intentionally Left Blank
xviii Commercial Warranty
68P81076C25-C July 1, 2002
Model Numbering, Charts, and Specifications xix
Model Numbering, Charts, and Specifications
Mobile Radio Model Numbering Scheme
Position 1 - Type of Unit
D = Dash-Mounted Mobile Radio
M = Motorcycle Mobile Radio
T =Trunk-Mounted Mobile Radio
Positions 2 & 3 - Model Series
Position 4 - Frequency Band
Less than 29.7MHz
29.7 to 35.99MHz
36 to 41.99MHz
42 to 50MHz
66 to 80MHz
74 to 90MHz
Product Specific
136 to 162MHz
146 to 178MHz
174 to 210MHz
190 to 235MHz
336 to 410MHz
403 to 437MHz
438 to 482MHz
470 to 520MHz
Product Specific
806 to 870MHz
825 to 870MHz
896 to 941MHz
1.0 to 1.6GHz
1.5 to 2.0GHz
Values given represent range only; they are
not absolute.
Position 5 - Power Level
0 to 0.7 Watts
0.7 to 0.9 Watts
1.0 to 3.9 Watts
4.0 to 5.0 Watts
5.1 to 6.0 Watts
6.1 to 10 Watts
Position 6 - Physical Packages
RF Modem Operation
Receiver Only
Standard Control; No Display
Standard Control; With Display
Limited Keypad; No Display
Limited Keypad; With Display
Full Keypad; No Display
Full Keypad; With Display
Limited Controls; No Display
Limited Controls; Basic Display
Limited Controls; Limited Display
Rotary Controls; Standard Display
Enhanced Controls; Enhanced Display
Low Profile; No Display
Low Profile; Basic Display
Low Profile; Basic Display, Full Keypad
Position 7 - Channel Spacing
1 = 5kHz
2 = 6.25kHz
3 = 10kHz
4 = 12.5kHz
5 = 15kHz
6 = 20/25kHz
7 = 30kHz
9 = Variable/Programmable
Typical Model Number:
Position:
Position 8 - Primary Operation
Conventinal/Simplex
Conventional/Duplex
Trunked Twin Type
Dual Mode Trunked
Dual Mode Trunked/Duplex
Trunked Type I
Trunked Type II
FDMA* Digital Dual Mode
TDMA** Digital Dual Mode
Single Sideband
Global Positioning Satellite Capable
Amplitude Companded Sideband (ACSB)
Programmable
Integrated Voice and Data
* FDMA = Frequency Division Multiple Access
** TDMA = Time Division Multiple Access
Position 9 - Primary System Type
Conventional
Privacy Plus
Clear SMARTNET
Advanced Conventional Stat-Alert
Enhanced Privacy Plus
Nauganet 888 Series
Japan Specialized Mobile Radio (JSMR)
Multi-Channel Access (MCA)
CoveragePLUS
MPT1327* - Public
MPT1327* - Private
Radiocom
Tone Signalling
Binary Signalling
Phonenet
Programmable
Secure Conventional
Secure SMARTNET
* MPT = Ministry of Posts and Telecommunications
Position 10 - Feature Level
1 = Basic
2 = Limited Package
3 = Limited Plus
4 = Intermediate
5 = Standard Package
6 = Standard Plus
7 = Expanded Package
8 = Expanded Plus
9 = Full Feature/
Programmable
Position 11 - Version
Version Letter (Alpha) - Major Change
Position 12 -
Unique Model Variations
C = Cenelec
N = Standard Package
Positions 13 - 16
SP Model Suffix
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
T 0 4 S L F 9 P W 7 A N S P 0 1
04 = ASTRO
A
B
C
D
F
G
H
J
K
L
M
=
=
=
=
=
=
=
=
=
=
=
P
Q
R
S
T
U
V
W
Y
Z
=
=
=
=
=
=
=
=
=
=
A
B
C
D
E
F
=
=
=
=
=
=
10.1 to 15 Watts
16 to 25 Watts
26 to 35 Watts
36 to 60 Watts
G
H
J
K
L
=
=
=
=
A
B
C
D
E
F
G
H
J
K
L
M
N
P
Q
R
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
A
B
C
D
E
F
G
H
J
K
L
M
P
S
=
=
=
=
=
=
=
=
=
=
=
=
=
=
A
B
C
D
E
F
G
H
J
K
L
M
N
P
Q
W
X
Y
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
= 61 to 110 Watts
MAEPF-27247-O
July 1, 2002 68P81076C25-C
xx Model Numbering, Charts, and Specifications
ASTRO Digital Spectra Motorcycle 15 Watt (Ranges 1 and 2) Model Chart
Model Number Description
M04JGF9PW4AN Model W4 (136-162 MHz), Range 1, 15 Watt, 128 Channels
M04JGF9PW5AN Model W5 (136-162 MHz), Range 1, 15 Watt, 128 Channels
M04JGH9PW7AN Model W7 (136-162 MHz), Range 1, 15 Watt, 128 Channels
M04KGF9PW4AN Model W4 (146-174 MHz), Range 2, 15 Watt, 128 Channels
M04KGF9PW5AN Model W5 (146-174 MHz), Range 2, 15 Watt, 128 Channels
M04KGH9PW7AN Model W7 (146-174 MHz), Range 2, 15 Watt, 128 Channels
M04RGF9PW4AN Model W4 (438-470 MHz), Range 2, 15 Watt, 128 Channels
M04RGF9PW5AN Model W5 (438-470 MHz), Range 2, 15 Watt, 128 Channels
M04RGH9PW7AN Model W7 (438-470 MHz), Range 2, 15 Watt, 128 Channels
M04UGF9PW4AN Model W4 (800 MHz), 15 Watt, 128 Channels
M04UGF9PW5AN Model W5 (800 MHz), 15 Watt, 128 Channels
M04UGH9PW7AN Model W7 (800 MHz), 15 Watt, 128 Channels
Item No. Description
X X X HLD6066_ VHF Power Amplifier Board, 25-Watt
X X X X X X X X X X X X HKN6062_ Cable, Control Head to Radio
X X X HLD4342_ VHF VCO Carrier
X X X HLD4343_ VHF VCO Carrier, CEPT
X X X HLD6032_ VHF Power Amplifier Board, Range 2, 25-Watt
X X X HLD6061_ VHF VCO, Range 1, 136-162 MHz
X X X HLD6062_ VHF VCO Board, Range 2, 146-174 MHz
X X X HLE6046_ UHF VCO Carrier, Range 2
X X X HLE6062_ UHF RF Power Amplifier Board, Range 2, 25-Watt
X X X HLE6102_ UHF VCO Board, Range 2
X X X HLF6078_ 800 MHz RF Power Amplifier Board, 15-Watt
X X X HLF6079_ 800 MHz VCO Board
X X X HLF6080_ 800 MHz VCO Carrier Board
X X X X X X X X X X X X HLN1368_ White Motorcycle Enclosure and Hardware
X X X X X X X X X X X X HLN6127_* Low-Power Dash Hardware
X X X X X X X X X X HLN6193_ MPL Button Kit
X X X X X X X X X X X X HLN6342_* Motorcycle Hardware
X X X X X X X X X X X X HLN6365_ Interface Board Kit
X X X X X X X X X X X X HLN6418_* Transceiver Hardware
X X X X X HLN6444_* W5 Motorcycle Control Head Hardware
X X X HLN6445_* W7 Motorcycle Control Head Hardware
X HLN6454_ Motorcycle Control Head Board Kit
X X X X X X X X X X X X HLN6458_ Vocoder Controller
X X HLN6459_ Interface Board
X X X X HLN6523_* W7 Button Kit
X X X X HLN6548_* W5 Button Kit
X X HLN6549_* W4 Button Kit
X X X X X X X X X X X X HLN6562_ Motorcycle Command Board Kit
X X X X X X X X HLN6563_ Motorcycle Control Head
X X X X HLN6571_ Spare Button Kit
X X X X X X X X X X X X HMN1079_ Weatherproof Microphone
X X X HRD6001_ VHF Receiver Board, Range 1, Standard
X X X HRD6002_ VHF Receiver Board, Range 2, Standard
X X X HRE6002_ UHF Receiver Board, Range 2, Standard
X X X HRF6004_ 800 MHz FX Front-End
X X X HRN4009_ VHF RF Board
X X X HRN4010_ UHF RF Board
X X X HRN6014_ VHF RF Board, ASTRO
X X X HRN6019_ 800 MHz RF Board, ASTRO
X X X X X X X X X X X X HSN6003_ Weatherproof Speaker
X X X X PMLN4019_ W4 Motorcycle Control Head
X RAE4024_ UHF Antenna, Quarterwave
X X X RAF4011_ 800 MHz Antenna, 3 dB Gain
X = Item Included
_ = the latest version kit. When ordering a kit, refer to your specific kit for the suffix number.
* = kit not available. Order piece parts from the Accessories and Aftermarket Division.
68P81076C25-C July 1, 2002
Model Numbering, Charts, and Specifications xxi
ASTRO Digital Spectra Motorcycle 15 Watt (Ranges 3 and 3.5) Model
Chart
M04RGF9PW4ANSP02 Model W4 (450-482 MHz), Range 3, 15 Watt, 128 Channels
M04RGF9PW5ANSP02 Model W5 (450-482 MHz), Range 3, 15 Watt, 128 Channels
M04RGF9PW4ANSP01 Model W4 (453-488 MHz), Range 3.5, 15 Watt, 128 Channels
M04RGF9PW5ANSP01 Model W5 (453-488 MHz), Range 3.5, 15 Watt, 128 Channels
M04RGH9PW7ANSP01 Model W7 (453-488 MHz), Range 3.5, 15 Watt, 128 Channels
X X X X X HKN6062_ Cable, Control Head to Radio
X X HLE6000_ UHF VCO Carrier, Range 3
X X X HLE6000DSP01 UHF VCO Carrier, Range 3.5
X X HLE6043_ UHF RF Power Amplifier Board, Range 3, 40-Watt
X X X HLE6043CSP01 UHF RF Power Amplifier Board, Range 3.5, 40-Watt
X X HLE6103_ UHF VCO Hybrid, Range 3
X X X HLE6103BSP01 UHF VCO Hybrid, Range 3.5
X X X X X HLN1368_ White Motorcycle Enclosure and Hardware
X X X X X HLN6127_* Low-Power Dash Hardware
X X X HLN6193_ MPL Button Kit
X X X X X HLN6342_* Motorcycle Hardware
X X X X X HLN6365_ Interface Board Kit
X X X X X HLN6418_* Transceiver Hardware
X X HLN6444_* W5 Motorcycle Control Head Hardware
X HLN6445_* W7 Motorcycle Control Head Hardware
X X X X X HLN6458_ Vocoder Controller
X HLN6523_* W7 Button Kit
X X X X X HLN6562_ Motorcycle Command Board Kit
X X X HLN6563_ Motorcycle Control Head
X X X X X HLN6571_ Spare Button Kit
X X X X X HMN1079_ Weatherproof Microphone
X X HRE6003_ UHF Receiver Board, Range 3, Standard
X X X HRE6003BSP01 UHF Receiver Board, Range 3.5, Standard
X X X X X HRN6020_ UHF RF Board, ASTRO
X X X X X HSN6003_ Weatherproof Speaker
X X PMLN4019_ W4 Motorcycle Control Head
X X X X X RAE4024_ UHF Antenna, Quarterwave
X = Item Included
July 1, 2002 68P81076C25-C
xxii Model Numbering, Charts, and Specifications
ASTRO Digital Spectra VHF 1025 Watt Model Chart
D04JHH9PW3AN Model W3 (136-145.9 MHz), 10-25 Watt, 255 Channels
D04JHF9PW4AN Model W4 (136-162 MHz), 10-25 Watt, 128 Channels
D04JHF9PW5AN Model W5 (136-162 MHz); 10-25 Watt, 128 Channels
D04JHH9PW7AN Model W7 (136-162 MHz), 10-25 Watt, 255 Channels
T04JHH9PW9AN Model W9 (136-162 MHz), 10-25 Watt, 255 Channels
D04KHH9PW3AN Model W3 (146-145.9 MHz), 10-25 Watt, 255 Channels
D04KHF9PW4AN Model W4 (146-174 MHz), 10-25 Watt, 128 Channels
D04KHF9PW5AN Model W5 (146-174 MHz), 10-25 Watt, 128 Channels
D04KHH9PW7AN Model W7 (146-174 MHz), 10-25 Watt, 255 Channels
T04KHH9PW9AN Model W9 (146-174 MHz), 10-25 Watt, 255 Channels
X X X X X HRD6001_ Front-End Receiver Board Kit (Range 1, 136-162 MHz)
X X X X HRD6002_ Front-End Receiver Board Kit (Range 2, 146-174 MHz)
X X X X X X X X HRN6014_ RF Board Kit
X X X X X X X X X HLD4342_ VCO Board Kit
X X X X X HLD6061_ VCO Hybrid Kit (Range 1, 136-162 MHz)
X X X X X HLD6062_ VCO Hybrid Kit (Range 2, 146-174 MHz)
X X X X X X X X X X HLN5558_ Command Board Kit
X X X X X X X X X X HLN6458_ VOCON Board Kit
X X X X X X X X X HLD6066_ Power Amplifier Board
X X X X X X HLN6401_ Control Head Interconnect Board
X X AAHN4045_ W4 Control Head
X X X X HLN6396_ W5,W7 Control Head Board
X X HCN1078_ W9 Control Head
X X X X X X HMN1080_ Microphone
X X HMN1061_ Microphone
X X X X X X X X X X HSN4018_ Speaker
X X HLN4921_ Control Head (W9) Trunnion
X X HLN5488_ Radio Microphone Installation Hardware (W9 Trunnion)
X X X X X X X X HLN6015_ Trunnion/Hardware (Dash Mount)
X X X X X X HLN6060_ Dash-Mount Hardware
X X X X HLN6185_* Remote-Mount, SECURENET Control-Head Hardware
X X X X X X X X X X HLN6418_* Transceiver Hardware
X X HLN6440_* Control Head without Keypad Hardware
X X HLN6441_* Control Head with Keypad Hardware
X HLN6493_* Plug Kit
X X HLN4952_ Fuse Kit
X X HKN4356_ Radio Cable (Length -17 Feet)
X X X X X X X X HKN4191_ Power Cable (Length - 20 Feet)
X X HKN4192_ Power Cable (Length - 20 Feet)
X X HLN6481_* Systems 9000 E9 Clear Button Kit
X X HLN6549_* C4 Button Kit
X X HLN6105_ Emergency/Secure/MPL Button Kit
X X X X HLN6193_ Emergency/MPL Field Option Button Kit
X X HLN6548_* SMARTNET Button Kit
X X HLN6167_ Option Button Kit
X HLD4343_ VCO Board Kit; VHF CEPT
X HLD6032_ Power Amplifier Board Kit
X X HLN6127_ Hardware, Radio Dash Low-Power
X X HLN6459_ W3 Interface Board
X X HMN4044_ ASTRO Handheld Control Head (W3)
X HRN4009_ RF Board Kit
X = Item Included
68P81076C25-C July 1, 2002
Model Numbering, Charts, and Specifications xxiii
ASTRO Digital Spectra VHF 1025 and 50110 Watt Model Chart
D04JKH9PW3AN Model W3 (136-145.9 MHz), 25-50 Watt, 128 Channels
D04JKF9PW4AN Model W4 (136-162 MHz), 25-50 Watt, 128 Channels
D04JKF9PW5AN Model W5 (136-162 MHz); 25-50 Watt, 128 Channels
D04JKH9PW7AN Model W7 (136-162 MHz), 25-50 Watt, 255 Channels
T04JKH9PW9AN Model W9 (136-162 MHz), 25-50 Watt, 255 Channels
D04KKF9PW3AN Model W3 (146-174 MHz), 25-50 Watt, 128 Channels
D04KKH9PW7AN Model W7 (146-174 MHz), 25-50 Watt, 255 Channels
T04KKH9PW9AN Model W9 (146-174 MHz), 25-50 Watt, 255 Channels
T04JLH9PW3AN Model W3 (136-145.9 MHz), 50-110 Watt, 128 Channels
T04JLF9PW4AN Model W4 (136-162 MHz), 50-110 Watt, 128 Channels
T04JLH9PW7AN Model W7 (136-162 MHz), 50-110 Watt, 255 Channels
T04KLH9PW3AN Model W3 (146-174 MHz), 50-110 Watt, 255 Channels
T04KLF9PW4AN Model W4 (146-174 MHz), 50-110 Watt, 128 Channels
X X X X X X X X X X HRD6001_ Front-End Rcvr Board Kit (Range 1, 136-162 MHz)
X X X X X X X X X X X X X X X X X X X X HRN6014_ RF Board Kit
X X X X X X X X X X X X X X X X X X X X HLD4342_ VCO Board Kit
X X X X X X X X X X HLD6061_ VCO Hybrid Kit (Range 1, 136-162 MHz)
X X X X X X X X X X X X X X X X X X X X HLN5558_ Command Board Kit
X X X X X X X X X X X X X X X X X X X X HLN6458_ VOCON Board Kit
X X X X X HLD6064_ Power Amplifier Board
(50-110W, Range 1, 136-162 MHz)
X X X X X X X X X X HLD6022_ Power Amplifier Board
(25-50W, Range 1, 136-174 MHz)
(50-110W, Range 2, 146-174 MHz)
X X X X X X HLN6401_ Control Head Interconnect Board
X X X X AAHN4045_ W4 Control Head
X X X X X X X X HLN6486_ High-Power Interconnect Board
X X X X X X HLN6432_ Control Head Back Housing
X X X X X X X X HLN6396_ W5,W7 Control Head Board
X X X X HCN1078_ W9 Control Head
X X X X X X X X X X X X HMN1080_ Microphone
X X X X HMN1061_ Microphone
X X X X HLN4921_ Control Head (W9) Trunnion
X X X X HLN6185_* Rem-Mount, SECURENET Control-Head Hardware
X X X X X X HLN6231_ Remote W4, W5, W7 Control-Head Trunnion
X X X X X X X X X X HLN6233_* Option Connector Hardware
X = Item Included
July 1, 2002 68P81076C25-C
xxiv Model Numbering, Charts, and Specifications
ASTRO Digital Spectra VHF 1025 and 50110 Watt Model Chart (cont.)
D04JKH9PW3AN Model W3 (136-145.9 MHz), 25-50 Watt, 128 Channels
D04JKF9PW4AN Model W4 (136-162 MHz), 25-50 Watt, 128 Channels
D04JKF9PW5AN Model W5 (136-162 MHz); 25-50 Watt, 128 Channels
D04JKH9PW7AN Model W7 (136-162 MHz), 25-50 Watt, 255 Channels
T04JKH9PW9AN Model W9 (136-162 MHz), 25-50 Watt, 255 Channels
D04KKH9PW7AN Model W7 (146-174 MHz), 25-50 Watt, 255 Channels
T04KKH9PW9AN Model W9 (146-174 MHz), 25-50 Watt, 255 Channels
T04JLH9PW3AN Model W3 (136-145.9 MHz), 50-110 Watt, 128 Channels
X X X X X X X X X X HLN6132_* High-Power Installation Hardware
X X X X X X X X HLN6015_ Trunnion/Hardware (Dash Mount)
X X X X X X X X HLN6060_ Dash-Mount Hardware
X X X X X X X X X X HLN6121_* High-Power Radio Hardware
X X X X X X X X X X HLN6418_* Transceiver Hardware
X X X X HLN6440_* Control Head without Keypad Hardware
X X X X HLN6441_* Control Head with Keypad Hardware
X X X X X X X X X X HLN6525_* High-Power Transceiver Hardware
X X X X X X HLN6493_* Plug Kit
X X X X X X X X X X X HLN4952_ Fuse Kit
X X X X X X X X X X HKN4356_ Radio Cable (Length -17 Feet)
X X X X X X X X X X HKN6039_ Cable (Length - 17 Feet)
X X X X X X X X X X HKN4051_ Cable and Fuse
X X X X X X X X HKN4191_ Power Cable (Length - 20 Feet)
X X HKN4192_ Power Cable (Length - 20 Feet)
X X X X HLN6481_* Systems 9000 E9 Clear Button Kit
X X X X HLN6549_* C4 Button Kit
X X X X HLN6105_ Emergency/Secure/MPL Button Kit
X X X X X X X X HLN6193_ Emergency/MPL Field Option Button Kit
X X X X HLN6548_* SMARTNET Button Kit
X X X X HLN6523_* SMARTNET Button Kit
X X X X HLN6167_ Option Button Kit
X X HLN6459_ W3 Interface Board Kit
X X X X HMN4044_ ASTRO Handheld Control Head (W3)
X X X X TLN5277_ Filter Kit
X X HKN6096_ Handheld Control Head Y Cable Kit
X X HLN6291_ Installation Hardware Kit
X X HLN6574_ W3 Interconnect Board Kit
X = Item Included
68P81076C25-C July 1, 2002
Model Numbering, Charts, and Specifications xxv
ASTRO Digital Spectra UHF 1025 Watt Model Chart
D04RHH9PW3AN Model W3 (438-470 MHz), 10-25 Watt, 255 Channels
D04RHF9PW4AN Model W4 (438-470 MHz), 10-25 Watt, 128 Channels
D04RHF9PW5AN Model W5 (438-470 MHz), 10-25 Watt, 128 Channels
D04RHH9PW7AN Model W7 (438-470 MHz), 10-25 Watt, 255 Channels
T04RHH9PW9AN Model W9 (438-470 MHz), 10-25 Watt, 255 Channels
X AAHN4045_ Front Housing
X X X X X HAE4003_ Antenna
X X X X HKN4191_ Power Cable (Length-20 Feet)
X X X X X HLE6046_ VCO Carrier, Range 2
X X X X X HLE6062_ Power Amplifier, 25W, Range 2
X X X X X HLE6102_ VCO Hybrid Kit, Range 2
X X X X X HLN5558_ Command Board Kit
X X X X HLN6015_ Trunnion
X X X HLN6073_ Dash-Mount Hardware
X HLN6105_ Emergency/Secure/MPL Button Kit
X HLN6549_* C4 Button Kit
X X X HLN6401_ Control Head Interconnect Board
X X X X X HLN6458_ VOCODER Controller
X X X HMN1080_ Microphone
X X X X X HRE6002_ Receiver, Range 2
X X X X HRN6020_ RF Board Kit
X X X X X HSN4018_ Speaker
X HLN6548_* SMARTNET Button Kit
X X HLN6193_ Emergency/MPL Field Option Button Kit
X X HLN6396_ DEK Compatible Control Head
X HLN6440_* Control Head without Keypad Hardware
X HLN6441_* Control Head with Keypad Hardware
X HCN1078_ W9 Control Head
X HKN4192_ Power Cable (Length-20 Feet)
X HKN4356_ Radio Cable
X HLN4921_ Trunnion
X HLN4952_ Fuse Kit
X HLN5488_ Installation Hardware
X HLN6162_* Remote Hardware
X HLN6167_ Option Button Kit
X X HSN6185_ Remote-Mount, SECURENET Control-Head Hardware
X HLN6344_ Interface Board
X HLN6481_* Systems 9000 E9 Clear Button Kit
X HMN1061_ Microphone
X HLN6127_ Dash Hardware, Low-Power Kit
X HLN6459_ W3 Interface Board Kit
X HMN4044_ ASTRO Handheld Control Head (W3)
X HRN4010_ Low-Power RF Board Kit
X TLN5277_ Filter Kit
X = Item Included
July 1, 2002 68P81076C25-C
xxvi Model Numbering, Charts, and Specifications
D04QKH9PW3AN Model W3 (403-433 MHz), 20-40 Watt, 128 Channels
D04QKF9PW4AN Model W4 (403-433 MHz), 20-40 Watt, 128 Channels
T04QKH9PW9AN Model W9 (403-433 MHz), 20-40 Watt, 255 Channels
D04RKH9PW3ANSP01 Model W3 (450-482 MHz), 20-40 Watt, 128 Channels
D04RKF9PW4AN Model W4 (450-482 MHz), 20-40 Watt, 128 Channels
D04RKH9PW7AN Model W7 (450-482 MHz), 20-40 Watt, 255 Channels
T04RKH9PW9AN Model W9 (450-482 MHz), 20-40 Watt, 255 Channels
D04SKH9PW3AN Model W3 (482-512 MHz), 20-40 Watt, 128 Channels
D04SKF9PW4AN Model W4 (482-512 MHz), 20-40 Watt, 128 Channels
T04SKH9PW9AN Model W9 (482-512 MHz), 20-40 Watt, 255 Channels
X X X AAHN4045_ Front Housing
X X X X X HAE4002_ Antenna, Roof Top
X X X X X X X X X X X X HKN4191_ Power Cable (Length-20 Feet)
X X X HKN4192_ Power Cable (Length-20 Feet)
X X X HKN4356_ Radio Cable (Length-17 Feet)
X X X HLN4921_ Trunnion
X X X HLN4952_ Fuse Kit
X X X HLN5488_ Installation Hardware
X X X X X X X X X X X X X X X HLN5558_ Command Board Kit
X X X X X X X X X X X X HLN6015_ Trunnion/Hardware (Dash Mount)
X X X X X X X X X X X X HLN6073_ Dash-Mount Hardware
X X X HLN6548_* SMARTNET Button Kit
X HLN6162_* Remote-Mount Hardware
X X X HLN6167_ Option Button Kit
X X X X X HLN6185_* Remote-Mount, SECURENET Control-Head Hardware
X X X X X X HLN6193_ Emergency/MPL Field Option Button Kit
X X X X X X HLN6396_ Control Head Deck Compatible
X X X HLN6105_ Emergency/Secure/MPL Button Kit
X X X HLN6549_* C4 Button Kit
X X X HLN6344_ Interface Board
X X X X X X X X X HLN6401_ Control Head Interconnect Board
X X X X X X X X X X X X X X X HLN6418_* Transceiver Hardware
X X X HLN6440_* Control Head without Keypad Hardware
X X X HLN6441_* Control Head with Keypad Hardware
X X X X X X X X X X X X X X X HLN6458_ VOCODER Controller
X X X HLN6481_* Systems 9000 E9 Clear Button Kit
X X X HLN6493_* Plug Kit
X X X X X X X X X HMN1080_ Microphone
X X X X X HRE6001_ Receiver R/E, Range 1
X X X X X X X X X X X X X X X HRN6020_ RF Board
X = Item Included
68P81076C25-C July 1, 2002
Model Numbering, Charts, and Specifications xxvii
ASTRO Digital Spectra UHF 2040 Watt Model Chart (cont.)
T04QKH9PW9AN Model W9 (403-433 MHz), 20-40 Watt, 255 Channels
D04RKH9PW3ANSP01 Model W3 (450-482 MHz), 20-40 Watt, 128 Channels
D04RKH9PW7AN Model W7 (450-482 MHz), 20-40 Watt, 255 Channels
T04RKH9PW9AN Model W9 (450-482 MHz), 20-40 Watt, 255 Channels
T04SKH9PW9AN Model W9 (482-512 MHz), 20-40 Watt, 255 Channels
X X X X X HAE4003_ Antenna, Quarterwave
X X X X HLE6000_ VCO Carrier, Range 3
X X X X HLE6043_ Power Amplifier, 40W, range 3
X X X X HLE6103_ VCO Hybrid Kit, range 3
X X X X HRE6003_ Receiver R/E, Range 3
X X X X X X X X X X X X X X X HSN4018_ Speaker
X X X HCN1078_ W9 Control Head
X X X X X HAE4004_ Antenna, Roof Top
X X X X X HRE6004_ Receiver R/E, Range 4
X X X HLN6459_ W3 Interface Board
X X X HMN4044_ ASTRO Handheld Control Head (W3)
X = Item Included
July 1, 2002 68P81076C25-C
xxviii Model Numbering, Charts, and Specifications
T04QLF9PW4AN Model W4 (403-433 MHz), 50-110 Watt, 128 Channels
T04QLH9PW7AN Model W7 (403-433 MHz), 50-110 Watt, 255 Channels
T04RLF9PW4AN Model W4 (450-482 MHz), 50-110 Watt, 128 Channels
T04RLH9PW7AN Model W7 (450-482 MHz), 50-110 Watt, 255 Channels
T04SLF9PW4AN Model W4 (482-512 MHz), 50-110 Watt, 128 Channels
T04SLHPW7AN Model W7 (482-512 MHz), 50-110 Watt, 128 Channels
X X X AAHN4045_ Front Housing
X X X X HAE4002_ Antenna, Roof Top
X X X X HAE4003_ Antenna, Quarterwave
X X X X HAE4004_ Antenna, Roof Top
X X X X X X X X X X X X HKN4051_ Cable and Fuse
X X X X X X X X X X X X HKN4356_ Radio Cable (Length-17 Feet)
X X X X X X X X X X X X HKN6039_ Cable (Length-17 Feet)
X X X X HLE6040_ Power Amplifier Board, Range 4
X X X X HLE6051_ Power Amplifier Board, 100W, Range 1
X X X X HLE6101_ VCO Hybrid Kit, Range 1
X X X X X X X X X X X X HLN4952_ Fuse Kit
X X X X X X X X X X X X HLN5558_ Command Board Kit
X X X HLN6105_ Emergency/Secure/MPL Button Kit
X X X X X X X X X X X X HLN6121_* High-Power Radio Hardware
X X X X X X X X X X X X HLN6132_* Installation Hardware, High-Power
X X X X X X X X X HLN6231_ Remote W4, W5, W7 Control-Head Trunnion
X X X X X X X X X X X X HLN6233_* Option Connector Hardware
X X X HLN6549_* C4 Button Kit
X X X X X X X X X HLN6432_ Back Housing, Control Head
X X X X X X X X X X X X HLN6458_ VOCON Board Kit
X X X X X X X X X X X X HLN6486_ Interconnect Board
X X X X X HLN6493_* Plug Kit
X X X X X X X X X X X X HLN6525_* High-Power Transceiver Hardware
X X X X X X X X X X HMN1080_ Microphone
X HRE6001_ Receiver Board Kit, Range 1
X X X X HRE6003_ Receiver Board Kit, Range 3
X X X X HRE6004_ Receiver Board Kit, Range 4
X X X X X X X X X X X X HRN6020_ RF Board
X X X X X X X X X X X HSN6001_ Speaker
X X X X X X HLN6193_ Emergency/MPL Field Option Button Kit
X X X X X X HLN6396_ W5, W7 Control Head Board
X = Item Included
68P81076C25-C July 1, 2002
Model Numbering, Charts, and Specifications xxix
ASTRO Digital Spectra UHF 50110 Watt Model Chart (cont.)
X X X HLN6440_* Control Head without Keypad Hardware
X X X HLN6441_* Control Head with Keypad Hardware
X X X HCN1078_ W9 Control Head
X X X HLN4921_ Trunnion
X X X HLN6167_ Option Button Kit
X X X HLN6481_* Systems 9000 E9 Clear Button Kit
X = Item Included
July 1, 2002 68P81076C25-C
xxx Model Numbering, Charts, and Specifications
ASTRO Digital Spectra 800 MHz Model Chart
D04UJF9PW3AN Model W3 (800 MHz), 35 Watt, 128 Channels
T04UJF9PW9AN Model W9 (800 MHz), 35 Watt, 255 Channels
X AAHN4045_ Front Housing
X X X X X HLF6077_ Power Amplifier
X X X X X HLF6079_ VCO Hybrid
X X X X X HLF6080_ VCO Carrier
X X X X HLN6015_ Trunnion/Hardware
X HLN6040_ Phon/Page/Emer/MPL Button
X X X X X HLN6126_* Mid-Power Dash Mount Radio Hardware
X X HLN6193_ Emergency/MPL Field Option Button Kit
X HLN6549_* C4 Button Kit
X X X X HLN6418_* Transceiver Hardware
X X X X X HRF6004_ Front-End Receiver Kit
X X X X X HRN6019_ RF Board Kit
X X X X X RRA4914_ Antenna
X X HLN6396_ Control Head Deck Compatible
X HLN6440_* Control Head without Keypad Hardware
X X X X X HLN6458_ VOCODER Controller
X HLN6441_* Control Head with Keypad Hardware
X HKN4192_ Power Cable (Length-20 Feet)
X HKN4356_ Radio Cable (Length-17 Feet)
X HLN4921_ Trunnion, Control Head w9
X HLN4952_ Fuse Kit
X HLN5488_ Installation Hardware (W9 Trunnion) Radio Microphone
X X HLN6185_* Remote-Mount, SECURENET Control Head Hardware
X = Item Included
68P81076C25-C July 1, 2002
Model Numbering, Charts, and Specifications xxxi
ASTRO Digital Spectra Plus VHF 2550 and 50110 Watt Model Chart
D04KKH9SW3AN Model W3 (146-174 MHz), 25-50 Watt, 512 Channels
D04KKF9SW4AN Model W4 (146-174 MHz), 25-50 Watt, 128 Channels
D04KKF9SW5AN Model W5 (146-174 MHz); 25-50 Watt, 128 Channels
D04KKH9SW7AN Model W7 (146-174 MHz),25-50 Watt, 512 Channels
T04KKH9SW9AN Model W9 (146-174 MHz), 25-50 Watt, 512 Channels
T04KLH9SW3AN Model W3 (146-174 MHz), 50-110 Watt, 512 Channels
T04KLF9SW4AN Model W4 (146-174 MHz), 50-110 Watt, 128 Channels
X X X X X X X X X X HRN6014_ RF Board Kit
X X X X X X X X X X HLD4342_ VCO Board Kit
X X X X X X X X X X HLN5558_ Command Board Kit
X X X X X X X X X X HLN6837_ VOCON Board Kit
(25-50W, Range 2, 146-174 MHz)
(50-110W, Range 2, 146-174 MHz)
X X AAHN4045_ W4 Control Head
X X X X HLN6486_ High-Power Interconnect Board
X X X HLN6432_ Control Head Back Housing
X X X X HLN6396_ W5,W7 Control Head Board
X X HCN1078_ W9 Control Head
O O O O O O O O O O NTN9801_ ASTRO Spectra Plus UCM
X X HMN1061_ Microphone
X X HLN4921_ Control Head (W9) Trunnion
X X HLN6185_* Rem-Mount, SECURENET Control-Head Hardware
X X X HLN6231_ Remote W4, W5, W7 Control-Head Trunnion
X X X X X HLN6233_* Option Connector Hardware
X X X X X HLN6132_* High-Power Installation Hardware
X X X X HLN6015_ Trunnion/Hardware (Dash Mount)
X X X X HLN6060_ Dash-Mount Hardware
X X X X X HLN6121_* High-Power Radio Hardware
X X HLN6440_* Control Head without Keypad Hardware
X X HLN6441_* Control Head with Keypad Hardware
X X X X X HLN6525_* High-Power Transceiver Hardware
X X HLN6493_* Plug Kit
X X X X X HLN4952_ Fuse Kit
X X X X X HKN4356_ Radio Cable (Length -17 Feet)
X X X X X HKN6039_ Cable (Length - 17 Feet)
X X X X X HKN4051_ Cable and Fuse
X = Item Included
O = Optional item
July 1, 2002 68P81076C25-C
xxxii Model Numbering, Charts, and Specifications
ASTRO Digital Spectra Plus VHF 2550 and 50110 Watt Model Chart
(cont.)
D04KKH9SW3AN Model W3 (146-174 MHz), 25-50 Watt, 512 Channels
D04KKF9SW4AN Model W4 (146-174 MHz), 25-50 Watt, 128 Channels
D04KKF9SW5AN Model W5 (146-174 MHz); 25-50 Watt, 128 Channels
D04KKH9SW7AN Model W7 (146-174 MHz),25-50 Watt, 512 Channels
T04KKH9SW9AN Model W9 (146-174 MHz), 25-50 Watt, 512 Channels
X X X X HKN4191_ Power Cable (Length - 20 Feet)
X HKN4192_ Power Cable (Length - 20 Feet)
X X HLN6481_* Systems 9000 E9 Clear Button Kit
X X HLN6549_* C4 Button Kit
X X X X X X X X HLN6105_ Emergency/Secure/MPL Button Kit
X X HLN6167_ Option Button Kit
X HLN6459_ W3 Interface Board Kit
X X HMN4044_ ASTRO Handheld Control Head (W3)
X X TLN5277_ Filter Kit
X HKN6096_ Handheld Control Head Y Cable Kit
X HLN6291_ Installation Hardware Kit
X HLN6574_ W3 Interconnect Board Kit
X = Item Included
O = Optional item
68P81076C25-C July 1, 2002
Model Numbering, Charts, and Specifications xxxiii
ASTRO Digital Spectra Plus 800 MHz Model Chart
M04UGF9SW4AN Model W4 (800 MHz), 15 Watt, 128 Channels
M04UGH9SW7AN Model W7 (800 MHz), 15 Watt, 512 Channels
D04UJH9SW3AN Model W3 (800 MHz), 35 Watt, 512 Channels
D04UJF9SW4AN Model W4 (800 MHz), 35 Watt, 128 Channels
T04UJH9SW9AN Model W9 (800 MHz), 35 Watt, 512 Channels
X AAHN4045_ Front Housing, W4 Control Head
X X X X X HLF6077_ Power Amplifier
X X X HLF6078_ 15W. 800 MHz Power Amplifier
X X X X X X X X HLF6079_ VCO Hybrid
X X X X X X X X HLF6080_ VCO Carrier
X X X X HLN6015_ Trunnion/Hardware
X X X X X X X HLN6688A_ Phon/Page/Emer/MPL Button
X X X X X HLN6126_ Mid-Power Dash Mount Radio Hardware
X X X X X X X HLN6645A_ Emergency/MPL Field Option Button Kit
X HLN6549_* W4 Button Kit
X X X HLN6365_ Interface Board, Motorcycle
X X X X X X X X HLN6418_* Transceiver Hardware
X X X HMN1080_ Microphone, Modified Standard
X X X X X X X X HRF6004_ Front-End Receiver Kit
X X X X X X X X HRN6019_ RF Board Kit
X X X X X RRA4914_ Antenna
X X X HLN6562_ Command Board, Motorcycle
X X HLN6396_ Control Head Deck Compatible
X HLN6440_* W5 Control Head without Keypad Hardware
X PMLN4019_ W4 ASTRO Motorcycle Control Head
X X HLN6563_ Motorcycle Control Head
X HLN6445_* Hardware, Control Head, Motorcycle
X HLN6208_ Button, Spectra SecureNET
X HLN6441_* W7 Control Head with Keypad Hardware
O O O O X HKN4192_ Power Cable (Length-20 Feet)
O O O X HKN4356_ Remote Mount Radio Cable (Length-17 Feet)
X HLN4921_ Trunnion, Control Head w9
X HLN4952_ Fuse Kit
X HLN5488_ Installation Hardware (W9 Trunnion)
X O O O X HLN6185_* Remote-Mount, SECURENET Control Head Hardware
O O O X HLN6344_ Interface Board, Remote Mount
X = Item Included
O = Optional
July 1, 2002 68P81076C25-C
xxxiv Model Numbering, Charts, and Specifications
ASTRO Digital Spectra Plus 800 MHz Model Chart (cont.)
M04UGH9SW7AN Model W7 (800 MHz), 15 Watt, 512 Channels
T04UJH9SW9AN Model W9 (800 MHz), 35 Watt, 512 Channels
X HLN6638_ Radio Hardware
X X X X X X X X HLN6837_ Vocoder/Controller
X X X X HLN6073_ Radio Hardware
X HMN4044_ Handheld Control Head
X HLN6613_ Transceiver Hardware
X X HLN6493_* Large Black Plug Kit
X X X X X X X HLN6105_ Spare Button Kit
X HLN6675_* System 9000 Button Kit Secure
X X X HLN6639_* Radio Hardware
X X X HKN6062_ Cable, Control Head to Radio
X X X HLN6179_ Motorcycle Adapter Control Head Speaker
X X X HKN6032_ Motorcycle Power Cable
X X X HLN6180_ Motorcycle Mounting Hardware
X X X HLN6342_* Motorcycle Hardware Secure
X HLN6249_* Button, Secure
X X X RAF4011_ 800 MHz Antenna, 3 dB Gain
X X X HSN6003_ Motorcycle Waterproof Speaker
X X X HMN1079_ Modified Motorcycle Waterproof Microphone
X X HLN6524_ Button, Conventional
O O O HKN6432_ Back Housing Kit
O O O HLN6231_ Hardware, Remote-Mount Dash
X HLN6444_* Hardware, Control Head, Motorcycle
X = Item Included
O = Optional
68P81076C25-C July 1, 2002
Model Numbering, Charts, and Specifications xxxv
VHF Radio Specifications
GENERAL RECEIVER TRANSMITTER
FCC Designations: AZ492FT3772 Frequency Range: Frequency Range:
AZ492FT3773 Range 1: 136162 MHz Range 1: 136162 MHz
Range 2: 146174 MHz Range 2: 146174 MHz
Temperature Range:
Operating: 30C to +60C Channel Spacing: 12.5 kHz, 25 kHz Rated Output Power:
Storage: 40C to +85C Low-Power Radio: 1025 Watt Variable
Input Impedance: 50 Ohm Mid-Power Radio: 2550 Watt Variable
Power Supply: 12 Vdc Negative Ground Only High-Power Radio: 50110 Watt Variable
Frequency Separation:
Battery Drain: (Maximum) Range 1: 26 MHz Channel Spacing: 12.5 kHz, 25 kHz
1025 Watt Variable: Range 2: 28 MHz
Standby @ 13.8 V: 0.8 A Channel Increment Step: 2.5 kHz
Receive at Rated Audio @ 13.8 V: 3.0 A Sensitivity: (per EIA spec. RS204C)
Transmit @ Rated Power: 7.0 A 20 dB Quieting: (25/30 kHz Channel Spacing) Output Impedance: 50 Ohm
2550 Watt Variable: With Optional Preamp: 0.30 V
Standby @ 13.8 V: 0.8 A Without Optional Preamp: 0.50 V Frequency Separation:
Receive at Rated Audio @ 13.8 V: 3.0 A 12 dB SINAD (25/30 kHz Channel Spacing) Range 1: 26 MHz
Transmit @ Rated Power: 13.5 A With Optional Preamp: 0.20 V Range 2: 28 MHz
50110 Watt Variable: Without Optional Preamp: 0.35 V
Standby @ 13.8 V: 0.9 A Frequency Stability:
Receive at Rated Audio @ 13.8 V: 4.0 A Selectivity: (per EIA Specifications) (30 to +60C; 25C Ref.): 0.00025%
Transmit @ Rated Power: 27.5 A (Measured in the Analog Mode)
25/30 kHz Channel Spacing: 80 dB Modulation Limiting:
Dimensions (H x W x D) 12.5 kHz Channel Spacing: 70 dB 25 kHz/30 kHz Channel Spacing: 5.0 kHz
W4, W5, and W7 Models: 12.5 kHz Channel Spacing: 2.5 kHz
Remote-Mount Control Head: 2.0" x 7.1"x 2.2" Intermodulation: (per EIA Specifications)
(50.8 mm x 180.3 mm x 55.9 mm) (Measured in the Analog Mode) FM Hum and Noise:
Dash-Mount Radio: 2.0" x 7.1"x 8.6" With Optional Preamp: 70 dB (Measured in the Analog Mode): 45 dB
(50.8 mm x 180.3 mm x 218.4 mm) Without Optional Preamp: 80 dB
W9 Model: Emission (Conducted and Radiated): 75 dB
Remote-Mount Control Head: 3.4" x 6.5"x 1.7" Spurious Rejection:
(86.4 mm x 165.1 mm x 43.2 mm) With Optional Preamp: 80 dB Audio Sensitivity:
Speaker: (excluding mounting bracket) Without Optional Preamp: 83 dB (For 60% Max. Deviation at 1 kHz): 0.08V 3 dB
5.5" x 5.5"x 2.5"
(139.7 mm x 139. 7mm x 63.5 mm) Frequency Stability: Audio Response:
(30 to +60C; 25C Reference): 0.00025% (Measured in the Analog Mode)
Weight: (6 dB/Octave Pre-Emphasis 300 to 3000 Hz):
Mid-Power Radio: 6.1 lbs (2.8 kg) Audio Output: (per EIA Specifications) +1, 3 dB
High-Power Radio: 11.2 lbs (5.1 kg) (Measured in the Analog Mode):
Speaker: 1.5 lbs (0.7 kg) 5 Watts at Less Than 3% Distortion Emissions Designators:
10 Watts Optional with Reduced Duty Cycle 8K10F1E, 11K0F3E, 15K0F2D, 16K0F3E,
12 Watts for High-Power Radios 20K0F1E, and 15K0F1D
AZ492FT3771: 11K0F1D, 11K0F2D
AZ492FT3772: 10K0F1D, 10K0F2D
AZ492FT3773: 11K0F1D, 11K0F2D
Specifications subject to change without notice.
All measurements are taken in the test mode at 25 kHz channel spacing except where indicated.
July 1, 2002 68P81076C25-C
xxxvi Model Numbering, Charts, and Specifications
UHF Radio Specifications
FCC Designations: AZ492FT4786 Frequency Range: Frequency Range:
AZ492FT4787 Range 1: 403433 MHz Range 1: 403433 MHz
Range 2: 438470 MHz Range 2: 438470 MHz
Temperature Range: Range 3: 450482 MHz Range 3: 450482 MHz
Operating: 30C to +60C Range 4: 482512 MHz Range 4: 482512 MHz
Storage: 40C to +85C
Channel Spacing: 12.5 kHz or 25 kHz Rated Output Power:
Power Supply: 12 Vdc Negative Ground Only Low-Power Radio: 16 Watt Variable
Input Impedance: 50 Ohm Mid-Power Radio: 1025 Watt Variable
Battery Drain: (Maximum)
2040 Watt Variable
16 Watt Variable: Frequency Separation: High-Power Radio: 50110* Watt Variable
Standby @ 13.8 V: 0.7 A Range 1 and 4: 30 MHz
Receive at Rated Audio @ 13.8 V: 3.0 A Range 2 and 3: 32 MHz Channel Spacing: 12.5 kHz or 25 kHz
Transmit @ Rated Power: 4.0 A
1025 Watt Variable: Sensitivity: (per EIA spec. RS204C) Output Impedance: 50 Ohm
Standby @ 13.8 V: 0.7 A 20 dB Quieting: (25 kHz Channel Spacing)
Receive at Rated Audio @ 13.8 V: 3.0 A With Optional Preamp: 0.30 V Frequency Separation:
Transmit @ Rated Power: 7.0 A Without Optional Preamp: 0.50 V Range 1 and 4: 30 MHz
2040 Watt Variable: 12 dB SINAD (25 kHz Channel Spacing) Range 2 and 3: 32 MHz
(30 W Max. in Talk-Around Mode) With Optional Preamp: 0.20 V
Standby @ 13.8 V: 0.7 A Without Optional Preamp: 0.35 V Frequency Stability:
Receive at Rated Audio @ 13.8 V: 3.0 A (30 to +60C; 25C Ref.): 0.00025%
Transmit @ Rated Power: 13.0 A Selectivity: (per EIA Specifications)
78 Watt (Range 3 & 4)/110 W (Range 1 & 3): (Measured in the Analog Mode) Modulation Limiting:
Standby @ 13.8 V: 0.8 A 25 kHz Channel Spacing: 75 dB 25 kHz Channel Spacing: 5.0 kHz
Receive at Rated Audio @ 13.8 V: 4.0 A 12.5 kHz Channel Spacing: 70 dB 12.5 kHz Channel Spacing: 2.5 kHz
Intermodulation: (per EIA Specifications) FM Hum and Noise:
Dimensions (H x W x D) (Measured in the Analog Mode) (Measured in the Analog Mode): 45 dB
W4, W5, and W7 Models: With Optional Preamp: 70 dB
Remote-Mount Control Head: 2.0" x 7.1"x 2.2" Without Optional Preamp: 75 dB Emission (Conducted and Radiated): 70 dB
(50.8 mm x 180.3 mm x 55.9 mm)
Dash-Mount Radio: 2.0" x 7.1"x 8.6" Spurious Rejection: Audio Sensitivity:
(50.8 mm x 180.3 mm x 218.4 mm) With Optional Preamp: 80 dB (For 60% Max. Deviation at 1 kHz): 0.08V 3 dB
W9 Model: Without Optional Preamp: 83 dB
Remote-Mount Control Head: 3.4" x 6.5"x 1.7" Audio Response:
(86.4 mm x 165.1 mm x 43.2 mm) Frequency Stability: (Measured in the Analog Mode)
Speaker: (excluding mounting bracket) (30 to +60C; 25C Reference): 0.00025% (6 dB/Octave Pre-Emphasis 300 to 3000Hz):
5.5" x 5.5"x 2.5" +1,3 dB
(139.7 mm x 139.7 mm x 63.5 mm) Audio Output: (per EIA Specifications)
(Measured in the Analog Mode): Emissions Designators:
Weight: 5 Watts at Less Than 3% Distortion 8K10F1E, 11K0F3E, 15K0F2D, 16K0F3E,
Mid-Power Radio: 6.1 lbs (2.8 kg) 10 Watts Optional with Reduced Duty Cycle 20K0F1E, 15K0F1D, 11K0F1D, and 11K0F2D
High-Power Radio: 11.2 lbs (5.1 kg) 12 Watts for High-Power Radios
Speaker: 1.5 lbs (0.7 kg)
* Maximum power 78 Watts above 470 MHz.
68P81076C25-C July 1, 2002
Model Numbering, Charts, and Specifications xxxvii
800 MHz Radio Specifications
FCC Designations: AZ492FT5759 Frequency Range: 851869 MHz Frequency Range:
AZ492FT5751 Repeater Mode: 806824 MHz
Channel Spacing: 12.5 kHz/20 kHz/25 kHz Talk-Around Mode: 851869 MHz
Temperature Range:
Operating: 30C to +60C Input Impedance: 50 Ohm Rated Output Power:
Storage: 40C to +85C Mid-Power Radio: 15 Watt
Frequency Separation: 18 MHz High-Power Radio: 35 Watt
Power Supply: 12 Vdc Negative Ground Only
Sensitivity: (per EIA spec. RS204C) Channel Spacing: 12.5 kHz/20 kHz/25 kHz
Battery Drain: (Maximum) 20 dB Quieting: (25 kHz Channel Spacing):
15 Watt: 0.50V Output Impedance: 50 Ohm
Standby @ 13.8 V: 0.7 A 12 dB SINAD: (25 kHz Channel Spacing):
Receive at Rated Audio @ 13.8 V: 3.0 A 0.35V Frequency Separation: 18 MHz
35 Watt: (30 W max. in Talk-Around mode) Digital Sensitivity: Frequency Stability:
Standby @ 13.8 V: 0.7 A 1% BER (12.5 kHz channel): 0.30V (30 to +60C; 25C Ref.): 0.00015%
Receive at Rated Audio @ 13.8 V: 3.0 A
5% BER (12.5 kHz channel): 0.25V
Transmit @ Rated Power: 14.0 A Modulation Limiting:
Selectivity: (per EIA Specifications) 25 kHz Channel Spacing: 5.0 kHz
Dimensions (H x W x D) (Measured in the Analog Mode)
W4, W5, and W7 Models: 25 kHz Channel Spacing: 75 dB Modulation Fidelity (C4FM):
Remote-Mount Control Head: 2.0" x 7.1"x 2.2" 12.5 kHz Digital Channel: 2.8 kHz
(50.8 mm x 180.3 mm x 55.9 mm) Intermodulation: (per EIA Specifications)
Dash-Mount Radio: 2.0" x 7.1"x 8.6" (Measured in the Analog Mode): 75 dB FM Hum and Noise:
(50.8 mm x 180.3 mm x 218.4 mm) (Measured in the Analog Mode): 40 dB
W9 Model: Spurious Rejection: 90 dB
Remote-Mount Control Head: 3.4" x 6.5"x 1.7" Emission (Conducted and Radiated): 60 dBc
(86.4 mm x 165.1 mm x 43.2 mm) Frequency Stability:
Speaker: (excluding mounting bracket) (30 to +60C; 25C Reference): 0.00015% Audio Sensitivity:
5.5" x 5.5"x 2.5" (For 60% Max. Deviation at 1 kHz): 0.08V 3 dB
(139.7 mm x 139.7 mm x 63.5 mm) Audio Output: (per EIA Specifications)
(Measured in the Analog Mode): Audio Response:
Weight: 5 Watts at Less Than 3% Distortion (Measured in the Analog Mode)
Mid-Power Radio: 6.1 lbs (2.8 kg) 10 Watts Optional with Reduced Duty Cycle (6 dB/Octave Pre-Emphasis 300 to 3000Hz):
High-Power Radio: 11.2 lbs (5.1 kg) 12 Watts for High-Power Radios +1,3 dB
Speaker: 1.5 lbs (0.7 kg)
Emissions Designators:
8K10F1E, 15K0F1D, 10K0F2D, 11K0F3E,
15K0F2D, 10K0F1D, 16K0F3E, and 20K0F1E
July 1, 2002 68P81076C25-C
xxxviii
Chapter 1 Introduction
1.1 General
This manual includes all the information necessary to maintain peak product performance and
maximum working time. This detailed level of service (component-level) is typical of some service
centers, self-maintained customers, and distributors.
Use this manual in conjunction with the ASTRO Digital Spectra and Digital Spectra Plus Mobile
Radios Basic Service Manual (Motorola part number 68P81076C20), which helps in troubleshooting
a problem to a particular board.
Conduct the basic performance checks first to verify the need to analyze the radio and help pinpoint
the functional problem area. In addition, you will become familiar with the radio test mode of
operation which is a helpful tool. If any basic receiver or transmitter parameters fail to be met, the
radio should be aligned using the radio alignment procedure described in the ASTRO Digital Spectra
and Digital Spectra Plus Mobile Radios Basic Service Manual.
Included in other areas of this manual are functional block diagrams, detailed Theory of Operation,
troubleshooting charts and waveforms, schematics, and parts list. You should be familiar with these
sections to aid in deducing the problem circuit. Also included are component location diagrams to aid
in locating individual circuit components, as well as IC diagrams, which identify some convenient
probe points.
The Theory of Operation section of this manual contains detailed descriptions of operations of many
circuits. Once you locate the problem area, review the Troubleshooting Chart for that circuit to fix the
problem.
June 28, 2002 68P81076C25-C
1-2 Introduction: Notations Used in This Manual
1.2 Notations Used in This Manual
Throughout the text in this publication, you will notice the use of warnings, cautions, and notes.
These notations are used to emphasize that safety hazards exist, and care must be taken and
observed.
NOTE: An operational procedure, practice, or condition that is essential to emphasize.
You will also find in this publication the use of the asterisk symbol (*) to indicate a negative or NOT
logic true signal.
CAUTION indicates a potentially hazardous
situation which, if not avoided, may result in
equipment damage.
!
C a u t i o n
WARNING indicates a potentially hazardous
situation which, if not avoided, could result in
death or injury.
!
W A R N I N G
!
DANGER indicates an imminently
hazardous situation which, if not avoided,
will result in death or injury.
D A N G E R
!
Chapter 2 General Overview
2.1 Introduction
The ASTRO Digital Spectra radio is a dual-mode (trunked/conventional), microcontroller-based
transceiver incorporating a Digital Signal Processor (DSP). The microcontroller handles the general
radio control, monitors status, and processes commands input from the keypad or other user
controls. The DSP processes the typical analog signals and generates the standard signaling
digitally to provide compatibility with existing analog systems. In addition it provides for digital
modulation techniques utilizing voice encoding techniques with error correction schemes to provide
the user with enhanced range and audio quality all in a reduced bandwidth channel requirement. It
allows embedded signaling which can mix system information and data with digital voice to add the
capability of supporting a multitude of system features.
The ASTRO Digital Spectra radio comes in five models and are available in the following bands; VHF
(136-174 MHz), UHF (403-470 MHz or 450-512 MHz), and 800 MHz (806-870 MHz).
The ASTRO Digital Spectra radio comprises seven major assemblies, six of which are in the main
radio housing. They are:
Control-Head Assembly (Dash- or Remote-Mount) is connected, directly or remotely, to the
front of the transceiver by the interconnect board or remote interconnect board and control
cable. This assembly contains a vacuum fluorescent (VF) display, VF driver, microprocessor
and serial bus interface.
Power Amplifier (PA) contains antenna switch, directional coupler/detector, and amplifier(s).
Front-End Receiver Assembly contains pre-amplifier, preselector, mixer, and injection filter.
RF Board contains receiver I-F amplifier, demodulator, synthesizer logic and filtering
circuitry, and digital receiver back-end integrated circuit (IC).
VCO/Buffer/Divider Board contains voltage controlled oscillator (VCO), divider, receive and
transmit buffers.
Command Board contains power control/regulator, digital-to-analog (D/A) IC, serial bus
interface, and audio power amplifier (PA).
VOCON (Vocoder/Controller) Board contains the microcomputer unit (MCU), its associated
memory and memory management integrated circuit, and the digital signal processor (DSP)
and its associated memories and support IC.
VOCON Plus (Vocoder/Controller) Board the architecture is based on a Dual-Core
processor, which contains a DSP Core, an MCORE 210 Microcontroller Core, and custom
peripherals. The board also contains memory ICs and DSP support ICs.
July 1, 2002 68P81076C25-C
2-2 General Overview: Analog Mode of Operation
2.2 Analog Mode of Operation
When the radio is receiving, the signal comes from the antenna/antenna-switch on the power
amplifier board to the front-end receiver assembly. The signal is then filtered, amplified, and mixed
with the first local-oscillator signal generated by the voltage-controlled oscillator (VCO). The resulting
intermediate frequency (IF) signal is fed to the IF circuitry on the RF board, where it is again filtered
and amplified. This amplified signal is passed to the digital back-end IC, where it is mixed with the
second local oscillator to create the second IF at 450 kHz. The analog IF is processed by an analog-
to-digital (A/D) converter, where it is converted to a digital bit stream and divided down to a baseband
signal, producing digital samples. These samples are converted to current signals and sent to the
DSP support IC. The digital-signal-processor-support IC digitally filters and discriminates the signal,
and passes it to the digital-signal processor (DSP). The DSP decodes the information in the signal
and identifies the appropriate destination for it. For a voice signal, the DSP will route the digital voice
data to the DSP-support IC for conversion to an analog signal. The DSP-support IC will then present
the signal to the audio power amplifier on the command board, which drives the speaker. For
signalling information, the DSP will decode the message and pass it to the microcomputer.
When the radio is transmitting, microphone audio is passed to the command board limiter then to the
DSP-support IC, where the signal is digitized. The DSP-support IC passes digital data to the DSP,
where pre-emphasis and low-pass (splatter) filtering are done. The DSP returns this signal to the
DSP-support IC, where it is reconverted into an analog signal and scaled for application to the
voltage-controlled oscillator as a modulation signal. Transmitted signalling information is accepted by
the DSP from the microcomputer, coded appropriately, and passed to the DSP-support IC, which
handles it the same as a voice signal. Modulation information is passed to the synthesizer along the
modulation line. A modulated carrier is provided to the power amplifier (PA) board, which transmits
the signal under dynamic power control.
2.3 ASTRO Mode of Operation
In the ASTRO mode (digital mode) of operation, the transmitted or received signal is limited to a
discrete set of deviation levels, instead of continuously varying. The receiver handles an ASTRO-
mode signal identically to an analog-mode signal up to the point where the DSP decodes the
received data. In the ASTRO receive mode, the DSP uses a specifically defined algorithm to recover
information. In the ASTRO transmit mode, microphone audio is processed identically to an analog
mode with the exception of the algorithm the DSP uses to encode the information. This algorithm will
result in deviation levels that are limited to discrete levels.
2.4 Control Head Assembly
This section discusses the basic operation and components of each control head assembly.
2.4.1 Display (W3 Model)
The control head assembly for a W3 model has a two-line, 14-character liquid-crystal display (LCD)
with eight Status annunciators.
2.4.2 Display (W4, W5, and W7 Models)
The control head assembly for W4, W5, and W7 models has an 8-character, alphanumeric, vacuum
fluorescent display. The anodes and the grids operate at approximately 34 Vdc when on and 0 Vdc
when off. The filament operates at approximately 2.4 Vac. The voltage for the display is generated by
a fixed-frequency, variable duty-cycle controlled flyback voltage converter. The switching frequency
is approximately 210 kHz. The internal microprocessor controls the voltage converter, which
provides approximately 37 Vdc to the vacuum fluorescent (VF) driver and approximately 2.4 Vrms to
the VF display.
68P81076C25-C July 1, 2002
General Overview: Control Head Assembly 2-3
2.4.3 Display (W9 Model)
The control-head assembly for a W9 model has an 11-character, alphanumeric, vacuum fluorescent
display. It needs three separate voltages to operate; the cathode needs 35 V to accelerate electrons
to the anode; the grid needs 40 V to totally shut off current flow; the filament needs 3.8 Vac at 80mA.
These voltages are obtained from the transformer on the display controller board.
2.4.4 Vacuum Fluorescent Display Driver
This Vacuum Fluorescent (VF) display driver receives ASCII data from the VOCON board, decodes
it into display data, and then scans the display with the data. Once properly loaded into the display,
data is refreshed without any further processor action. The display driver is periodically reset by the
actions of transistors that watch the clock line from the microprocessor to the display driver. When
the clock line is held low for more than 600 ms, the display driver resets and new display data
follows.
2.4.5 Vacuum Fluorescent Voltage Source (W9 Model)
Voltage for the VF display is generated by a fixed frequency, variable-duty cycle driven, flyback
voltage converter. An emitter-coupled stable multi vibrator runs at approximately 150 kHz. The
square wave output from this circuit is integrated to form a triangle that is applied to the non-inverting
input of half an integrated circuit (IC).
During start up, the inverting input is biased at 3.7 V. A transistor is on while the non-inverting input
voltage is below 3.7 V. This allows current to flow in a transformer, building a magnetic field. When
the triangle wave exceeds 3.7 V, the transistor turns off and the magnetic field collapses, inducing
negative current in the transformer.
This current flow charges two capacitors. As the voltage on one of the capacitor increases beyond
35 V, a diode begins to conduct, pulling the integrated circuits inverting input below 3.7 V. This
decreases the cycle time to produce the 35 V. The 41 V supply is not regulated, but it tracks the
35 V supply.
Similarly, the ac supply for VF filament is not regulated, but is controlled to within one volt by an
inductor on the display board.
2.4.6 Controls and Indicators
The control-head assembly processes all the keypad (button) inputs and visual indicators through
the microprocessor. Some of the buttons double as function keys for radio options. All buttons are
backlit to allow operation in low-light conditions.
2.4.7 Status LEDs
These LEDs are driven by the display driver as though they were decimal points on the VF display.
Level shifting transistors are required for this since the display driver uses 39 V for control signals.
2.4.8 Backlight LEDs
The microprocessor operates the backlight LEDs. A transistor supplies base current to the individual
LED driver transistors. The driver transistors act as constant current sources to the LEDs. Some
backlight LEDs are connected to a thermistor. This circuit allows more current to flow through these
LEDs at room temperature and reduces current as the temperature rises.
July 1, 2002 68P81076C25-C
2-4 General Overview: Control Head Assembly
2.4.9 Vehicle Interface Ports
The Vehicle Interface Ports (VIPs) allow the control head to activate external circuits and receive
inputs from the outside world. In general, VIP outputs are used for relay control and VIP inputs
accept inputs from external switches. See the cable kit section for typical connections of VIP input
switches and VIP output relays.
The VIP outputs are driven by logic within the control head for both the Dash and Remote Mount
configuration. Field programming of the radio can define the functions of these pins. The output
transistors that drive the VIP outputs can sink 300 mA of current. Primarily, they are used to control
external relays. These relays should be connected between the respective VIP output pin and
switched B+. Typical applications for VIP outputs are controlling the external horn/lights alarm and
activating the horn-ring transfer relay function.
Remote Mount Configuration:
The VIP pins are located on the back of the control head below the area labeled VIP. For Remote
Mount radios, all three VIP inputs and outputs are available at the rear of the control head. The VIP
inputs are connected to ground with either normally-open or normally-closed switches.
Dash Mount Configuration:
For the Dash Mount configuration, only two VIP output pins are available and they are located at the
15-pin accessory connector. VIP input lines are not available in this configuration.
2.4.10 Power Supplies
The +5-V supply is a three-terminal regulator IC to regulate the 12 V SWB+ down for the digital logic
hardware.
2.4.11 Ignition Sense Circuits
A transistor senses the vehicle ignitions state, disabling the radio when the ignition is off. For
negative-ground systems, the orange lead is typically connected to the fuse box (+12 V).
NOTE: Refer to the ASTRO Spectra and Digital Spectra FM Two-Way Mobile Radios Installation
Manual (68P81070C85) for more information on operating the radio independent of the
ignition switch.
68P81076C25-C July 1, 2002
General Overview: Power Amplifier 2-5
2.5 Power Amplifier
The power amplifier (PA) is a multi-stage, discrete-transistor RF amplifier consisting of the following:
Low-level power controlling stage
Drivers
Final amplifier
Directional coupler
Antenna switch
Harmonic filter
2.5.1 Gain Stages
The first stage buffers the RF signal, filters harmonics, and acts as a variable amplifier. All of the
amplifying stages are matched using transmission lines, capacitors, and inductors and are supplied
with DC from either A+, keyed 9.4-V, or 9.6-V sources. Following the last gain stage, PIN diodes
switch the signal flow either from the antenna to the receiver, or from the last gain stage to the
antenna.
2.5.2 Power Control
A directional coupler and detector network controls power. It senses the forward power from the last
gain stage and feeds the detected voltage back to the command board control circuitry where it is
compared to a reference voltage set during power-set procedures. The DC feed voltage is corrected
and supplied to the controlled stage of the power amplifier. Circuitry on the power amplifier board
controls the gain of the first stage and is proportional to the DC control voltage.
2.5.3 Circuit Protection
Current and temperature sensing circuitry on the power amplifier board feed sensed voltages to the
command board for comparison. If the command board suspects a fault condition, it overrides the
power control function and cuts the power back to a level that is safe for the conditions. In addition,
some high-power amplifier boards include circuitry that monitors the power supply line. If the battery
voltage exceeds or drops below a pre-determined level, the power output of the amplifier is adjusted
to ensure proper operation of the transmitter.
2.5.4 DC Interconnect
The ribbon cable connector carries sensed voltages for power and protection to the command board.
It also carries A+ feed to the command board for distribution throughout the internal transceiver
housing and carries control voltage from the command board to the power amplifier board.
The rear battery connector carries A+ from the battery to the power amplifier board. The red lead
goes directly to the A+ terminal on the PA board. The black lead from the battery connector ties to
the chassis, and connection to the power amplifier board is made through the board mounting
screws.
A+ ground connection for the internal transceiver housing is through the RF coax ground connectors
and through the mechanical connection of the power amplifier heatsink to the rest of the radio.
During test conditions in which the power amplifier assembly (board and heatsink) is physically
disconnected from the rest of the radio, it is acceptable to rely on the coax cable connections to carry
ground to the internal housing.
July 1, 2002 68P81076C25-C
2-6 General Overview: Front-End Receiver Assembly
2.6 Front-End Receiver Assembly
The receiver front-end consists of a preselector, a mixer circuit, and an injection filter. The receiver
injection (1st local oscillator) comes from the VCO assembly through a coax cable. The injection filter
is either fixed-tuned or tuned at the factory depending upon the bandsplit. The output of the filter is
connected to the mixer.
The preselector is a fixed-tuned filter. The receiver signal is fed to the preselector from the antenna
switch in the PA for the 800 MHz and UHF radios, or the preamp output for VHF. The signal is then
sent to the mixer integrated circuit where it is connected to the mixer transistor. The receiver injection
is also fed to this point. The mixer output is at the 1st IF center frequency of 109.65 MHz. This signal
is sent to the 1st IF amplifier stage on the RF board through a coaxial cable.
2.7 RF Board Basic
The RF board contains the common synthesizer circuits, dual IF receiver and demodulation circuits.
A 4-pole crystal filter at 109.65 MHz provides first IF selectivity. (For HRN6014D, HRN6020C,
HRN6019C, HRN4009D, HRN4010C and later RF board kits, two 2-pole crystal filters provide first IF
selectivity at 109.65 MHz.) The output of the filter circuit is fed directly to the custom digital back-end
circuit module. An amplification circuit at 109.65 MHz, the second mixer, the second IF amplifiers (at
450 kHz), the IF digital-to-analog converter, and the baseband down-converter comprise the digital
back-end circuit module.
Synthesizing for the first and second VCO is performed by the prescaler and synthesizer ICs. These
ICs are programmed through a serial data bus from signals generated on the VOCON board. A DC
voltage generated on the command board, sets the synthesizers reference oscillator frequency of
16.8 MHz. This voltage is controlled by the digital-to-analog converter (D/A), and is the only element
of the RF board requiring alignment.
The second local oscillator runs at 109.2 MHz (low-side injection), or 110.1 MHz (high-side injection)
and consists of a VCO which is frequency-locked to the reference oscillator. Part of the local
oscillators circuitry is in the prescaler IC.
A clamp and rectifier circuit on the RF board generates a negative DC voltage of -4 V (nominal) for
increasing the total voltage available to the first VCO and second local oscillators VCO. The circuit
receives a 300 kHz square wave output from the prescaler IC, then clamps, rectifies, and filters the
signal for use as the negative steering line for the two VCOs.
2.8 Voltage-Controlled Oscillator
This section discusses the voltage-controlled oscillator components and basic operation for each
band.
2.8.1 VHF Radios
The voltage-controlled oscillator (VCO) assembly utilizes a common-gate Field Effect Transistor
(FET) in a Colpitts configuration as the gain device. The LC tank circuits capacitive portion consists
of a varactor bank and a laser-trimmed stub capacitor. The inductive portion consists of microstrip
transmission line resonators. The stub capacitor serves to tune out build variations. Tuning is
performed at the factory and is not field adjustable. The varactor network changes the oscillator
frequency when the DC voltage of the steering line changes. The microstrip transmission lines are
shifted in and out of the tank by PIN diodes for coarse frequency jumps. A third varactor is used in a
modulation circuit to modulate the oscillator during transmit.
68P81076C25-C July 1, 2002
General Overview: Command Board 2-7
The VCO output is coupled to a transistor for amplification and for impedance buffering. The output
of this stage passes through a low-pass filter where the signal is split into three paths. One path
feeds back to the synthesizer prescaler; the other two provide injection for the RX and TX
amplification strings. The receive injection signal is further amplified and passed to the RX front-end
injection filter. The transmit signal goes to an analog divider, which divides the signal by two. The
signal is amplified and buffered and then injected into the transmitters low-level amplifier.
All transmit circuitry operates from keyed 9.4 V to conserve current drain while the radio is receiving.
A transistor/resistor network drives the PIN diodes in the VCO tank. These driver networks provide
forward bias current to turn diodes on and reverse the bias voltage to turn the diodes off. AUX 1 AND
AUX 2 lines control the PIN diode driver networks.
2.8.2 UHF and 800 MHz Radios
The voltage-controlled oscillator (VCO) assembly generates variable frequency output signals
controlled by the two steering lines. The negative steering line increases the tuning range of the
VCO, while the positive steering line affects the synthesizer control loop to incrementally change the
frequency.
The VCO generates a signal in the required frequency range. For UHF and 800 MHz radios, this
signal is fed to the doubler/buffer circuit which, in turn, doubles the VCO output frequency and
amplifies it to the power level required by the TX buffer and RX mixer. A PIN diode switch routes the
signal to the TX port when the keyed 9.4 V is high. Otherwise, the signal is routed to the RX port. The
synthesizer feedback is provided from the output of the doubler stage.
2.9 Command Board
The serial input/output IC provides command board functions including buffers for PTT, channel
active, squelch mute, busy, and data transmission, and logic functions for switched B+, emergency,
reset, and power control.
The regulator and power control circuits include an unswitched +5 V discrete circuit and the
regulator/power control IC, which produces both switched +5 V and 9.6 V. The unswitched +5 V
source is used as a reference for its switched +5 V source. Filtered unswitched +5 V is used for the
microcontrol circuits. Switched +5 V and 9.6 V are controlled by a digital transistor from the serial
input/output IC.The power control circuitry receives power set and limit inputs from the digital-to-
analog IC, and feedback from the RF power amplifier. Based on those inputs, the power control
circuitry produces a control voltage to maintain a constant RF power level to the antenna.
The reset circuits consist of the power-on reset, high/low battery voltage reset, and the external bus
system reset. The reset circuits allow the microcomputer to recover from an unstable situation; for
example, no battery on the radio, battery voltage too high or too low, and remote devices on the
external bus not communicating. Communication in RS-232 protocol is provided by an IC which
interfaces to the rear accessory connector (J2).
2.10 ASTRO Spectra Vocoder/Controller Board
The Vocoder/Controller (VOCON) board, located on the top side of the radio housing, contains a
microcontrol unit (MCU) with its flash memory, DSP, and DSP support ICs. The VOCON board
controls receive/transmit frequencies, the display, and various radio functions, using either direct
logic control or serial communication to external devices. The connector J801 provides interface
between the encryption module and the VOCON board for encrypting voice messages.
The VOCON board executes a stored program located in the FLASH ROM. Data is transferred to
and from memory by the microcontrol unit data bus. The memory location from which data is read, or
to which data is written, is selected by the address lines.
July 1, 2002 68P81076C25-C
2-8 General Overview: Radio Power
The support-logic IC acts as an extension of the microcontrol unit by providing logic functions such
as lower address latch, reset, memory address decoding, and additional control lines for the radio.
The VOCON board controls a crystal-pull circuit to adjust the crystal oscillator frequency on the
microcontrol unit, so that the E-clock harmonics do not cause interference with the receive channel.
The vocoder circuitry on the VOCON board is powered by a switched +5-V regulator located on the
command board. This voltage is removed from the board when the radio is turned off by the control
head switch.
The DSP (digital-signal processing) IC performs signaling, voice encoding/decoding, audio filtering,
and volume control functions. This IC performs Private-Line/Digital Private Line (PL/DPL) encode
and alert-tone generation. The DSP IC transmits pre-emphasized analog signals and applies a low-
pass (splatter) filter to all transmitted signals. It requires a 33 MHz crystal to function. An 8 kHz
interrupt signal generated by the DSP-support IC is also required for functionality. This device is
programmed using parallel programming from the microcontrol unit and the DSP-support IC.
The DSP-support IC performs analog-to-digital and digital-to-analog conversions on audio signals. It
contains attenuators for volume, squelch, deviation, and compensation, and it executes receiver
filtering and discrimination. The IC requires a 2.4 MHz clock to function (generated by the digital
back-end IC) and is programmed by the microcontrol units Serial Peripheral Interface (SPI) bus.
2.11 Radio Power
This section provides information on DC power distribution in ASTRO radios.
2.11.1 General
In the ASTRO radio, power is distributed to seven boards: command, VOCON, control head,
synthesizer, receiver front end, RF, and RF power amplifier.
Power for the radio is supplied by the vehicles 12-V battery. When using a desktop adapter unit, an
external DC power supply can be connected to replace the vehicles battery source.
A+ (referred to as incoming unswitched battery voltage) enters the radio through the rear RF power
amplifier connector (P1) and is the main entry for DC power. The second path, through P2, pin 5,
provides ignition sense to inhibit the RF transmitter when the ignition switch is off.
68P81076C25-C July 1, 2002
General Overview: Radio Power 2-9
When the command board regulators are on, the 9.6-V output sources the command board and RF
board circuits. The switched +5 V is routed to the VOCON board. See Figure 2-1.
Figure 2-1. DC Voltage Routing Block Diagram
The 9.6 V and the A+ voltage are the main DC power for the RF board. Outputs from the RF board
provide DC power to the synthesizer and the receiver front-end filter. The RF board has an internal
+5-Vdc regulator that is sourced from the A+ voltage.
The voltage to power the 9.4-V regulator is produced by the command boards 9.6-V regulator. The
9.4 V (referred to as keyed 9.4 V) is controlled by the VOCON board through P501, pin 45. This DC
voltage enables the transmitters RF power amplifier when the VOCON board senses a lock detect
from the synthesizer.
2.11.2 B+ Routing for ASTRO Spectra VOCON Board
Refer to Section 3.4, "ASTRO Spectra Plus VOCON Board," on page 3-38 for information on the
ASTRO Spectra Plus.
See Figure 2-2 and your specific schematic diagram.
The A+ power for the radio is derived from the 12-V battery, which is applied to the command board
through connector P503, pins 5 and 9. This A+ voltage is routed through the command board to the
control head connector, P502, pin 30 and to the VOCON board, J501, pin 38.
The interconnect board couples the A+ voltage from the command board to the control head, where
a power FET (Q51) provides the means of controlling the main power source (SWB+) by the on/off
switch. SWB+ is routed back to the SIO/IC (U522) on the command board through connector P502.
The SIO/ICcontrols the RPCIC enable line.
When the RPCIC enable line toggles low, the 9.6-V and the SW+5-V regulators turn on. The SW+5-
V regulator is the main power source for the VOCON board. Digital and analog +5 V are derived by
filtering SW+5 V through .005 H chokes L511 and L510 on the command board. These two 5-V
regulated supplies are used to partition the digital logic circuitry from the analog circuitry.
Control
Head
RF
Power Amp
Command Board
On/Off
5W
A+ A+
IGN
J2-5
Keyed
9.4V
A+ 9.6V
9.6V
Battery
12V
P1
SWB+
9.6V
UNSW
+5V
SW
+5V
SW
9.4V
VOCON
Board
Synth
RF
Board
RF
Filter
9.6V
July 1, 2002 68P81076C25-C
2-10 General Overview: Radio Power
Transistor Q206 controls solid-state power switch Q207, providing SWB+ to the encryption module
(if equipped). The "SWB+" and "UNSWB+" encryption voltages both originate from pin 38 of J501
and are fed to the encryption module via J801.
Port PL3 (5-V EN) on the SLIC and Q207 are under the control of the microcontroller unit (MCU),
U204. This allows the MCU to follow an orderly power-down sequence when it senses that the B+
sense is off. This sense is provided via resistor network R222 and R223, which provides an input to
the A/D port to the MCU.
It should also be noted that a system reset is provided by the undervoltage detector, U407. This
device brings the system out of reset on power-up, and provides a system reset to the
microcomputer on power-down.
Figure 2-2. ASTRO Spectra B+ Routing for Vocoder/Controller (VOCON) Board
ADSIC
U406
DSP56001
U405
256Kx8
FLASH
U404
8Kx24
SRAM
U402
SRAM
U202
EEPROM
U201
SLIC IV
U206
Switch
Q207
5V Analog
5V Digital
B+_CNTL
B+_Sense
B+_
Sense
Vocoder/Controller
UNSW_B+
J501
8Kx24
SRAM
U403
8Kx24
SRAM
U414
256Kx8
FLASH
U205
256Kx8
FLASH
U210
J801
MAEPF-25104-O
HC11F1
MCU
U204
SW B+
5V EN
Chapter 3 Theory of Operation
3.1 RF Board
This section provides a detailed circuit description of the ASTRO RF board for VHF, UHF and
800 MHz models. This board contains the common synthesizer circuits (synthesizer section) and
dual IF receiver and demodulation circuits (receiver back-end). When reading the theory of
operation, refer to your appropriate schematic and component location diagrams located in Chapter
7. Schematics, Component Location Diagrams, and Parts Lists. This detailed Theory of Operation
will help isolate the problem. However, first use the ASTRO Digital Spectra and Digital Spectra Plus
Mobile Radios Basic Service Manual (68P81076C20) to troubleshoot the problem to a particular
board.
3.1.1 General
The synthesizer section includes the prescaler IC (U601), the synthesizer IC (U602), and the
reference oscillator (U600). The prescaler and the synthesizer chips are completely controlled by the
serial data bus.
The prescaler IC (see Figure 3-1) provides the following:
Multi-dual modulus prescaler
5-V regulator
Super filter 8.6-V regulator
Fixed divide-by-8 circuit for the reference oscillator
Programmable divide-by-N and charge pump phase detector to support the second injection
VCO
The synthesizer IC (see Figure 3-2) provides:
Reference divider
Phase modulator
Dual-bandwidth adaptive filter
Ramp generator
Sample-and-hold phase detector
Programmable loop divider
Auxiliary output bits for system control
July 1, 2002 68P81076C25-C
3-2 Theory of Operation: RF Board
Figure 3-1. Prescaler IC Block Diagram
Figure 3-2. Synthesizer IC Block Diagram
NC NC PRE
IN
PRE
VREF
BC1 BC2 MOD
CONT
PRE
OUT
VCO
BIAS
VCO
VCC
VCO
GND
VCO
BYP.
VCO
TANK
VCO
OUT NC
PNP BASE
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
28 27 26 25 24 23 22 21 20 19 18
40 41 42
MULTI - MODULUS
PRESCALER
2ND L.O. VCO (NOT USED)
2ND L.O. CHARGE - PUMP
PHASE DETECTOR
U601
MOSAIC
PRESCALER
43 44 1 2 3 4 5 6
S.F. VIN
S
U
P
E
R
F
I
L
T
E
R
u
P
I
N
T
E
R
F
A
C
E
S
R
L
S.F. BASE
S.F. OUT
S.F. CAP
S.F. GND
NC
NC
DATA OUT
5V OUT
5V
REG
B+
IN
AUX
PNP
BASE
AUX
5V
OUT
AUX
5V
REG
GND
VCC
CE
NC
GND
300KHz
DATA
CLOCK
0 DET OUT
BS
LATCH
0 DET REF IN
N OUT
N
8
IN
8
VREF
8
BIAS
8
OUT
2ND L.O.
8 REF
MAEPF-25181-O
M
O
D
C
N
T
A
F
6
F
I
L
T
G
B
S1
ADAPTIVE FILTER
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
28 27 26 25 24 23 22 21 20 19 18
40 41 42
U602
CMOS
SYNTHESIZER
43 44 1 2 3 4 5 6
ENR
CLOCK
DATA
STEER
(LOCK)
LOOP
DIVIDER
&
PRESCALER
CONTROL
AUX CONTROL
BIT LATCHES
REF
DIV
u
P
I
N
T
E
R
F
A
C
E
R
A
M
P

G
E
N
E
R
A
T
O
R
SEL
DIG GND
NC
BUF
REF
T
E
S
T
F
R
A
U
X
1
D
A
T
A
S
Y
N
C
REF IN
S2
(300KHz)
EN3
LIN
GND
LIN
GND
RAMP
VDD
RAMP
RES
RAMP PNP
BASE
RAMP
GB
RAMP
CAP
BUF
BIAS
LIN VDD
A
F
1
A
F
4
A
F
3
F
I
L
T
G
B
A
F
2
T
X

F
I
L
I
N
R
X

F
I
L
O
U
T
T
X

F
I
L
O
U
T
S
T
E
E
R
L
I
N
G
M
A
I
N
C
A
P
F
I
L

I
N
A
F
5
B
U
F
O
U
T
B
U
F
P
N
P
B
A
S
E
RAMP GB
DIG
VDD
0 MOD
RAMP
OUTPUT
BUFFER
A
U
X
2
A
O
S
F
I
N
0

M
O
D

I
N
A
U
X
3
+1
BUF
RAMP CONTROL
STEERING, &
SAMPLE LOGIC
PHASE
MODULATOR
S
A
M
P
L
E

&

H
O
L
D
3
/
MAEPF-25182-O
3/
68P81076C25-C July 1, 2002
Theory of Operation: RF Board 3-3
The reference oscillator generates the 16.8 MHz signal that serves as the reference for all radio
frequency accuracy. It uses a proprietary temperature compensation circuit to keep the radio within
its specified frequency tolerance.
The receiver back-end uses the ABACUS II IC (U301) to demodulate all the way to baseband,
starting from the first IF.
3.1.2 Synthesizer
This section discusses the synthesizer components and detailed theory of operation.
3.1.2.1 Reference Frequency Generation
The reference oscillator (U600) generates a 16.8 MHz reference signal that is tuned onto frequency
via a DC-fed varactor input. The digital/analog IC (U502), which is on the command board and is
under the control of the serial data bus, generates the DC voltage to the varactor. The reference
signal from U600-3 is capacitively coupled into the prescaler (U601-21), where it is divided by 8. The
resulting 2.1 MHz signal is routed to the synthesizer IC (U602).
The 2.1 MHz signal is divided by 7, with the result, a 300 kHz signal, serving the following purposes:
Input to the prescaler IC for second VCO reference
A source for the negative voltage generator
Input to the programmable reference divider
3.1.2.2 First VCO Frequency Generation
For reasons of clarity and simplicity, 800 MHz is used as the example product in all synthesizer text.
In the 800 MHz models, the feedback is taken before the doubler circuit of the VCO. Band-to-band
and kit-to-kit variations are noted in the text as required.
The first VCO in ASTRO radios is a thick-film hybrid transmission line resonator. Its frequency is
controlled by a DC-fed varactor bank.
A transmission line feedback path from J601-1 to C604 couples the output frequency back to the
prescaler. The signal from the prescaler output (U601, pin 40) is routed to the synthesizer input
(U602, pin 27), where it is divided by the A&B counters of the loop divider. The loop equations
required for calculating the counter values are as follows:
NOTE: These are examples the prescaler modulus and the reference frequency are
programmable and vary from band-to-band. The examples that follow are for 800 MHz and
assume:
P / P + 1= 255 / 256 and F
r
= 6.25 kHz. For UHF and VHF, P / P + 1= 127 / 128 and F
r
= 5 kHz.
EQUATION: N = F
vco
/ F
r
EXAMPLE: N = (F
vco
/ F
r
) = (403 MHz / 6.25 kHz) or N = 64,480
EQUATION: A = (fractional remainder of N / P) (P)
EXAMPLE: A = N / P = (72,000 / 255) = 252.8627; .8627 x 255
or A = 220
EQUATlON: B = [N - {A x (P + 1)}] / P
EXAMPLE: B = [64,480 - {220 x (255+1)}] / 255 or B = 32
Plug in the calculated numbers to test the value of N with the following equation:
EQUATION: N = B (P) + A (P + 1)
EXAMPLE: N = (32) (255) + (220) (256) or N = 64,480
July 1, 2002 68P81076C25-C
The synthesizer generates a modulus control output which instructs the prescaler to divide by either
P or P + 1 (that is, 255 or 256). When modulus control is low, the prescaler is dividing by P + l (256)
and the A counter is running; when modulus control is high, the prescaler is dividing by P (255) and
the B counter is running. One complete cycle of loop division is repeated for each reference period.
Assume that the VCO is operating correctly at 403 MHz, and the reference frequency is 6.25 kHz.
The prescaler and loop divider work in tandem to divide the VCO frequency down to the reference
frequency. The waveforms in Figure 3-3 depict what happens in a locked system. Notice in the
waveforms that the leading edge of F
r
goes high to turn on the constant current source Q607. The
ramp capacitor (C634) begins to charge through Q607 and R627, charging at a constant rate, while
the prescaler and loop divider are dividing the VCO frequency by N (64,480 in the example). At this
point, the loop divider generates a loop pulse (F
v
) which turns off the current source.

Figure 3-3. Loop Divider Waveforms
The voltage that was on C634 is sampled and held by the phase detector. This voltage is amplified
approximately 1.8 times and applied to the VCO varactors via the adaptive loop filter and the
steering line. This event is repeated at the reference rate so that frequency errors will always be
corrected.
NOTE: In VHF receive mode, for frequencies divisible only by 2.5 kHz (for example, 146.0025 MHz),
capacitor C670 will be switched in parallel with C634 by Q670. The reference frequency will
be 2.5 kHz instead of 5.0 kHz or 6.25 kHz. In transmit mode, the 2.5 kHz reference is not
used.
Assume that the VCO frequency tends to drift low. If this happens, the loop pulse will occur at some
later time. The current source still begins at the rising edge of F
r
but it stays on longer because the
leading edge of F
v
has been time delayed. Thus, C634 charges to a higher value and the steering
line drives the VCO to a higher frequency. The opposite case also applies.
3.1.2.3 Programmable Reference Divider
The reference frequency for 800 MHz is 6.25 kHz; for VHF and UHF, the typical reference frequency
is 5.0 kHz. In VHF radios, the reference frequency is 2.5 kHz for receive frequencies not evenly
divisible by 5.0 kHz or 6.25 kHz.
FR
FV
SAMPLE
AND HOLD
REFERENCE
FREQUENCY
LOOP
DIVIDER
RAMP
CAPACITOR
RAMP DISCHARGE
MAEPF-25183-O
68P81076C25-C July 1, 2002
3.1.2.4 Phase Modulator
ASTRO radios use a dual-port modulation scheme. The nature of the synthesizer loop is to track out
low-frequency errors. In order to enable low-frequency modulation, such as DPL, the reference
signal is modulated with the same signal as the VCO. Effectively, this prevents the low-frequency
error in the loop (DPL) from tracking out because the same error is on the reference signal. The net
effect is that the leading edge of the reference pulse is time-varying at the same rate as the loop
pulse; therefore, there is no phase error between the two signals and low-frequency modulation is
allowed to pass.
The phase modulation comparator has two inputs: U602, pins 28 and 29. R625 and C630 form an
exponential ramp into the plus side of the comparator on U602, pin 29. This ramp is tickled at the
reference rate. R626 and C631 form an integrator through which modulation is applied to the minus
side of the comparator. The comparator trips when the ramp voltage reaches the voltage on U602,
pin 28. The output of the comparator is the time-shifted leading edge of F
r
.
3.1.2.5 Loop Filter
ASTRO radios use a switchable, dual-bandwidth loop filter. They also use adaptive filter switching to
achieve fast lock. The output of the phase detector is routed to an external device (Q608), the output
of which is routed back into the IC for proper filter path selection.
In normal operation, the high drive buffer output is routed through the appropriate transmission gates
into the selected filter. A simplified schematic is shown in Figure 3-4.
Figure 3-4. Loop Filter Schematic
The loop filters greatly minimize voltage transients that contribute to system hum and noise but, due
to their lowpass nature, it takes considerable time to change the average charge in the filters.
Therefore, the adapt scheme was implemented. When the radio is changing frequency, the loop
goes into the adapt mode. Selected transmission gates in the IC effectively place a short across the
resistors in the filter (eliminating associated RC time constants) and quickly charge the loop filter
capacitors to the correct steering line voltage for the new frequency. At the end of the adapt
sequence, the appropriate filter is reconnected via internal transmission gates.
3.1.2.6 Auxiliary Control Bits
The auxiliary control bits are system control outputs whose states are controlled by the
microprocessor via the serial data bus. AUX 1 and AUX 2 are sent to the first VCO to control pin shift
states. AUX 3 controls the state of the negative steering line.
IN OUT
R615
NARROW BAND WIDE BAND
IN OUT
R616 R617
C626 C654 C625 R614 R613 C625
C623
C623
MAEPF-25184-O
July 1, 2002 68P81076C25-C
3.1.2.7 Second VCO
The second VCO is a grounded-gate, FET Colpitts oscillator. The resonator consists of a fixed
inductor and a varactor. A potentiometer, R634, adjusts the negative voltage to the varactor. This
adjustment is performed at board test to bring the phase detector output to the center of its linear
region; that is approximately 2.25 V. (For HRN6014D, HRN6020C, HRN6019C, HRN4009D,
HRN4010C and later RF board kits, a voltage divider consisting of R633 and R635 brings the phase
voltage detector output to the center of its linear region (2.25 V), eliminating the adjustment at board
test.) The negative voltage is filtered by R611 and C612. The oscillator output is coupled into the IF
IC (U301) as a second injection source. It is also fed back to the prescaler (U601, pin 26) for phase
locking.
The prescaler contains a programmable, single modulus, divide-by-N circuit, and a charge pump
phase detector. The reference frequency (F
r
) is 300 kHz and comes in on U601, pin 31. The low-side
injection oscillator runs at 109.2 MHz and is divided by 364 inside the IC. The phase detector in the
chip compares the divided signal to F
r
and either sources or sinks current, as necessary, in order to
maintain frequency control.
The phase detector output is routed to the varactor via decoupling choke L604. A divide-by-N test
point is also provided from U601, pin 29.
3.1.2.8 Power Distribution
The command board provides all power to the synthesizer in the form of 9.6 Vdc. The prescaler has
onboard voltage regulators for 5 V and super filter 8.6 V. The 5-V regulator drives the external series
pass device Q602; the super filters pass device is Q603.
3.1.3 Receiver Back-End
This section discusses the receiver back-end components and detailed theory of operation.
3.1.3.1 First IF
The 109.65 MHz IF signal reaches the RF board via a connector J350. Transistor Q350 amplifies the
signal approximately 9dB and supplies the proper impedance for crystal filter Y350. (For HRN6014D,
HRN6020C, HRN6019C, HRN4009D, HRN4010C and later RF board kits, amplification circuitry
consisting of transistors Q350 and Q354 amplifies the signal approximately 9dB and supplies the
proper impedance for crystal filters FL350 and FL351.)
Transistor Q351 supplies filtered A+ for powering Q350 and the receiver front-end. Transistor Q352
switches the filtered A+ supply by reducing the base current from Q351.
NOTE: Since there is 12.5 Vdc on J350, it is important to use a DC block when connecting J350 to
an external source.
Y350 is a 4-pole crystal filter, consisting of two independent 2-pole crystal filters contained in a single
package. The filter package has a polarization mark located on the top to ensure proper installation.
Y350 supplies the 109.65 MHz IF selectivity and its output passes through a matching network and
then goes to ABACUS II IC (U301) pin 30.
(For HRN6014D, HRN6020C, HRN6019C, HRN4009D, HRN4010C and later RF board kits, FL350
and FL351 are 2-pole crystal filters which supply the 109.65 IF selectivity. The output passes through
a matching network and goes to the ABACUS II IC (U301), pin 30.)
68P81076C25-C July 1, 2002
3.1.3.2 ABACUS II IC
Once in the ABACUS II IC (U301), the first IF frequency is amplified and then down converted to
450 kHz, the second IF frequency. At this point, the analog signal is converted into two digital bit
streams by a sigma-delta A/D converter. The bit streams are then digitally filtered and mixed down to
baseband and filtered again. The differential output data stream is then sent to the VOCON board
where it is decoded to produce the recovered audio.
The ABACUS II IC is electronically programmable, and the amount of filtering, which is dependent
on the radio channel spacing and signal type, is controlled by the microcomputer. Additional filtering,
which used to be provided externally by a conventional ceramic filter, is replaced by internal digital
filters in the ABACUS II IC.
The ABACUS II IC contains a feedback AGC circuit to expand the dynamic range of the sigma-delta
converter. The differential output data contains the quadrature (I and Q) information in 16-bit words,
the AGC information in a 9-bit word, imbedded word sync information and fill bits dependent on
sampling speed. A fractional-n synthesizer is also incorporated in the ABACUS II IC for the 2nd LO
generation.
The second LO/VCO is a Colpitts oscillator (see Section 3.1.2.7, "Second VCO," on page 3-6). Its
output feeds into the ABACUS II IC on pin 35, providing injection to the second mixer for converting
the IF frequency to 450 kHz.
July 1, 2002 68P81076C25-C
3-8 Theory of Operation: Command Board
3.2 Command Board
This section of the theory of operation provides a detailed circuit description of the ASTRO Digital
Spectra Command Board. When reading the Theory of Operation, refer to your appropriate
schematic and component location diagrams located in Chapter 7. Schematics, Component
Location Diagrams, and Parts Lists. This detailed Theory of Operation will help isolate the problem
to a particular component. However, first use the ASTRO Digital Spectra and Digital Spectra Plus
Mobile Radios Basic Service Manual to troubleshoot the problem to a particular board.
The command board includes the following integrated circuits:
U401, U402 Differential Amplifiers
U450 Audio Amplifier
U500 Regulator/Power Control IC (RPCIC)
U501 555 Timer
U502 D/A Converter
U503 Precision Voltage Regulator
U522 Serial Input/Output IC (SIOIC)
U523, U524 Analog Switch
U526 RS232 Level Shifter
U530 8-Bit Shift Register
3.2.1 Microcontroller and Support ICs
The microcontroller and support ICs are located on the VOCON board, and are interconnected to the
command board via connector P501. The control lines linking the boards are either drivers or
receivers, depending upon their application. The VOCON board is responsible for decoding or
encoding ASTRO and analog data, and producing receive audio and transmit deviation.
3.2.2 Serial Input/Output IC
The serial input/output IC (SIOIC), U522, is a special-function logic/linear integrated circuit. In the
ASTRO mobile application, the device provides power-on reset, power control, and bipolar driver/
receivers for serial communication. The SIOIC supports the following functions:
1. A buffer for push-to-talk (PTT) to SLIC (U522, pins 37 and 38). Normally a contact closure for
PTT is detected by the control head, which sends a command to the VOCON board via the
external serial bus protocol. However, some applications require direct PTT control. To
generate PTT via the buffer inverter (pin 37), a contact closure to ground at J502, pin 24, or
from the accessory connector P503, pin 17, will generate a logic high to the SLIC device
(U206, port PH6) on the VOCON board.
2. A buffer for the Busy signal from the VOCON board to the external bus (Busy Out) and the
return path back to the VOCON board (Busy RTS). This function is described in Section
3.2.6, "Serial Communications on the External Bus," on page 3-11.
3. A buffer for Data Transmission from the VOCON board to the External Bus and a received
data return to the VOCON board. This function is described in Section 3.2.6, "Serial
Communications on the External Bus," on page 3-11.
4. Inputs to sense Switched B+ or Emergency enabling the Power Regulators and provide the
switched +5-V regulated supply. This function is described in Section 3.2.3, "Power-Up/-
Down Sequence," on page 3-9.
5. Power-on reset (POR*) circuits provide reset to the Host processor (U204). This function is
described in Section 3.2.5, "Reset Circuits," on page 3-10.
68P81076C25-C July 1, 2002
Theory of Operation: Command Board 3-9
3.2.3 Power-Up/-Down Sequence
Normally, switched B+ (SWB+) enters the command board from P502, pin 31. This voltage is derived
from the battery A+ voltage which enters the control head through P502, pin 30. A power FET
transistor, located in the control head (W5 and W7 models), provides the means of controlling the
main power source via the control heads on/off switch.
When SWB+ or EMERG become active, the RPCIC EN output (U522, pin 15) goes to a logic low,
enabling the Switched +5-V and +9.6-V regulators of the RPCIC (U500). Approximately 220 ms after
the B+ is active (see Waveform W1), the power-on-reset (POR*) from U522, pin 40 switches to a
logic 1 state, enabling the microprocessor on the VOCON board. The microprocessor then
completes an initialization sequence and sets Row 5/5-V enable input to a logic low at P501, pin 15.
The input provides a low to the SIOIC to hold the 9.6-V enable on. Therefore, if SWB+ or EMERG go
inactive, the regulators will remain enabled until the microcontroller turns them off by returning the
9.6/5-V EN state to a logic high. (This is especially true with emergency, since the foot switch is
usually momentary.)
The emergency input is provided to enable the radio transceiver to be activated, regardless of the
state of the control heads on/off power switch. The emergency input (EMERG) is activated by
opening the normally grounded foot switch connected to either P502, pin3 or P503, pin 24. This input
is routed to the SIOIC (U522, pin 31) and is internally connected to a pull-up resistor within the IC to
provide the logic 1 state change.
This change is inverted through an exclusive OR gate within the IC, outputting a logic 0 at pin 30 and
the NOR gate input (internal to the IC) to enable the 9.6-V regulator. The logic low at pin 30 is
connected to a time-out timer, which latches the 9.6-V enable output for 100 ms. This delay is
required to allow the VOCON microprocessor to initiate its start-up vectors and poll the emergency
interrupt input from P501, pin 16. The microprocessor takes control of the 9.6 V (P501, pin 15),
holding it active low regardless of the states of other inputs.
The emergency active state depends on the emergency polarity (EMERG POL) input to the SIOIC
(U522, pin 32). When the jumper JU502 is installed, emergency is active with the foot switch open.
Removing JU502 causes the emergency to go active with the switch closed.
To turn off the radio, SWB+ is taken inactive (- Vdc) by pressing the on/off switch on the control head.
The microcontroller periodically audits the SWB+ at its input port (pin 20) to determine if it has
returned to a logic high. When it sees the logic high condition (caused by an inactive switch), the
microcontroller initiates the power-down sequence, turning the voltage regulators and the radio off.
July 1, 2002 68P81076C25-C
3.2.4 Regulators
The regulator circuits include an unswitched +5 V (UNSW5V) discrete circuit, and the regulator/
power-control IC (RPCIC) that produces switched +5 V (U500, pin 14) and 9.6 V (U500, pin 17). The
UNSW+5-V source is used by the RPCIC as a reference (U500, pin 20) for its switched + 5-V
source. This regulated voltage is produced from the A+ voltage and is present when the battery is
connected. The regulators within the RPCIC are controlled by the input to pin 24 via a digital
transistor, Q538. This device is controlled from an output (9.6/5-V enable) of the SIOIC (U522, pin
15).
The various voltages used by the ICs on the command board are shown in Table 3-1.
3.2.5 Reset Circuits
The reset circuits consist of the power-on reset (POR), high-/low- battery voltage reset, and the
external bus system reset. The reset circuits allow the microcontroller to recover from an unstable
condition, such as no battery on the radio, battery voltage too high or too low, and remote devices on
the external bus not communicating.
When the battery (A+) is first applied to the radio, the unregulated voltage source powers the
unswitched +5-V regulator and the SIOIC internal regulator. The voltage is also sent to the control
head, where it is switched on/off by a series FET transistor. The transistor returns the voltage to the
command board, via connector P502-31, as switched B+. The switched B+ voltage is sensed by the
SIOIC on pin 28, and changes the state of the 9.6-V enable output gate (RPCIC_EN*) to an active
low. The low state turns on the 9.6-V regulator (U500-24), and its regulated output is fed back to the
input of the voltage comparator on the SIOIC (U522-14). The comparator output switches to a logic
low upon exceeding the 5.6-V threshold (see Figure 3-5).
Table 3-1. Integrated Circuits Voltages
Integrated Circuit UNSW5V SW +5V SW +9.6V
Serial Input/ Output (SIOIC) U522-6, -24 U522-3, -12 U522-14
Regulator/ Power Control
(RPCIC)
U500-20 U500-14 U500-17
Digital/ Analog IC (DAIC) U502-1, -28
Analog Switch U523-16, U524-14
RS232 Driver (IC) U526-19
555 Timer (IC) U501-8
8-Bit Shift Register U530-16
Differential Amplifiers U401-4, U402-4
68P81076C25-C July 1, 2002
The three inputs to the NOR gate (SW9.6-V, RPCIC EN, and RPCIC_EN delayed) must be at a logic
low to enable the power-on reset (POR*) to a high logic state. During this power-up sequence, this
reset is delayed approximately 170 ms after the B+ voltage is sensed. This delay is needed to allow
the supply voltages and oscillators to stabilize before releasing the VOCON boards microprocessor.
Figure 3-5 illustrates the internal function of the POR* within the SIOIC device.
Figure 3-5. Power-on Reset
3.2.6 Serial Communications on the External Bus
Serial communications on the external bus use the BUS+ (J502-25), BUS- (J502-22), and BUSY
(J502-9) lines.
These three lines are bidirectional; therefore, numerous devices can be in parallel on the bus. All
devices monitor the bus while data is being transmitted at a 9600-baud rate. The transmitted data
includes the address of the device for which the data is intended. Examples of the different types of
data are: control head display data and button closure data.
Data bus drivers for the BUS+ and BUS- lines are differentially driven, having BUS- inverted from the
state of BUS+. The idle states are: BUS+, a logic high; and BUS-, a logic low. The drivers are so
designed that any of the devices on the bus can drive these lines to their non-idle state without
loading problems.
In a typical transmission, the microcontroller examines the BUSY line. If the BUSY line is in the idle
state, the microcontroller sets the BUSY line and then transmits. At the end of transmission, the
microcontroller returns the BUSY line to idle. The microcontroller sets the BUSY line via
microcontroller pin 30, SIOIC pins 10 and 13, and J502-9.
Data transmission is sent onto the bus asynchronously. When the microcontroller sends data onto
the bus, the microcontroller also monitors the transmitted data as a collision detection measure. If a
collision is detected as a result of receiving a different data pattern, the microcontroller will stop
transmission and try again. The microcontroller monitors and receives data via the BUS+ line (J502-
25) to the SIOIC (U522, pin 17) and the BUS- line (J502-22) to the SIOIC (U522, pins 18 and 20),
and pin 20 of the microcontroller. Data is transmitted from microcontroller pin 19 to the SIOIC to
BUS+ (J501, pin 25), and the SIOIC to BUS- (J501, pin 22).
In the remote version of the radio, option cards can be installed. If data transmission is required, data
is transmitted from J502-20 to SIOIC pin 19, then from the SIOIC to BUS+ (J501, pin 25), and the
SIOIC to BUS- (J501, pin 22).
SIOIC
(Internal)
15
25
14
C511
UNSW+5V
SW9.6V
5.6V Reference
P501-27
POR
R524
R526
RPCIC EN
MAEPF-25185-O
July 1, 2002 68P81076C25-C
3.2.7 Synchronous Serial Bus (MOSI)
The synchronous serial bus is an internal bus used by the microcontroller for communicating with
various ICs. The serial bus, called MOSI (master out/ slave in), is used to program the digital-to-
analog (D/A) converter IC (U526), the serial-to-parallel shift register (U530) on the command board,
and the ABACUS II IC (U301) on the RF board. The MOSI data is sent from the VOCON boards
microprocessor (U204) through the ADSIC input/output IC (U406) and enters the command board
through P501, pin 9. This serial bus has an associated clock and individual select lines for steering
the data to one of the three possible devices.
The clock and data are routed in parallel to all serially programmed ICs. The ICs are programmed
one-at-a-time by the microcontroller, with each IC ignoring activity on its clock and data lines unless
it has been selected.
3.2.8 Received Audio
The received audio is sent from the ADSIC D/A converter as the SDO signal. The audio enters the
command board at P501, pin 40, and is routed to the analog multiplex gate (U524, pin 1). The gates
output (U524, pin 2) is paralleled with the output of a second multiplex gate (U524, pin 9) and sent to
voltage divider R455 and R456. The voltage divider provides the required attenuation for minimum/
maximum volume control settings. Capacitor C454 provides a DC block and couples the audio into
U450, pin 2 for amplification.
The two multiplex gates provide control of either receive audio or vehicular repeater audio. These
gates are controlled by the inputs to U524, pin 13 and U524, pin 6 from the serial shift register, U530.
The independent inputs are software selected by the VOCONs microcontroller.
The audio power amplifier (PA), U450, is a DC-coupled-output bridge-type amplifier. The gain is
internally fixed at 36 dB. Speaker audio leaves U450 on pins 11 and 13. For dash-mount models, the
audio is routed to the speaker via P503, pins14 and 16. The amplifier is biased to one half of the A+
voltage and connected directly to the speaker from the rear accessory connector (J2, pins 6 and 7).
The speaker outputs must NOT be grounded in any way. An audio isolation transformer must be
used if grounded test equipment (such as a service monitor) is to be connected to the speaker
outputs.
When the radio is squelched, the audio PA is disabled by the VOCON boards controller, providing a
low output state to P501, pin 44 (speaker-enable input). The low input turns off Q401 and Q400,
removing SWB+ voltage to the audio PA, U450. When U450, pin 10 does not have SW+B applied,
the speaker is totally muted and the audio PA current drain is greatly reduced. Diode CR402 (not
normally installed) is used when a vehicular repeater is installed and audio muting is required.
A second output for filtered receive audio is provided to drive accessory hardware. The output of
P501, pin 49 (MOD IN/DISC AUDIO) is primarily used for transmitter modulation. In the receive
mode, the digital signal processor (DSP), via ADSIC, outputs audio at a fixed level (approximately
800 mV pp). This output can be connected to the accessory connector (P503, pin 21) by selecting
the appropriate jumper settings.
3.2.9 Microphone Audio
The mobile microphone connects to the front of the control head through connector P104.
Microphone high audio enters the command board via P502, pin 6 and is routed to differential
amplifier buffer U402. Resistors R414 and R415 provide 9.6-V bias voltage for the microphones
internal circuitry. Amplifier U402 pre-emphasizes and limits the incoming microphone audio through
components C462, R407, C463, and R408, which perform an active filter function. Components
R441, R442, C467, C465, R443, C466, and C568 provide de-emphasis, developing the required
clamped microphone audio, referred to as mic audio in (MAI).
68P81076C25-C July 1, 2002
3.2.10 Transmit Deviation
The analog transmit deviation (MAI) enters the VOCON board through P501, pin 39, and is
converted to a digital format. The digital representation is processed and pre-emphasized by the
DSP processor. The pre-emphasized digital bit stream is converted back to analog by the ADSIC
device.
The modulation enters the command board through P501, pin 49 (MOD IN) and P501, pin 48 (REF
MOD). The two audio signals are required to compensate for low-frequency non-linearities caused
by the loop filter in the VCO. The two transmit modulation signals enter a buffer (U401, pin 5 and
U401, pin 3). The outputs are sent to a multiplex gate (U523), used to disable the outputs during the
receive mode. The multiplex gate is controlled by the serial shift register (U530), and the control lines
(U530, pins 10 and 11) are pulled low in the transmit mode.
The modulation is sent out on U530, pins 14 (MOD IN) and 15 (REF MOD). Modulation from U530,
pin 14, is coupled through R400 to a non-inverting amplifier, U401. Resistors R403 and R437 fix the
closed-loop output gain to 4. Modulation from U530, pin 15 is coupled through R420 to the second
non-inverting amplifier, U401. Resistors R422 and R438 fix the closed-loop output gain to 6. The
amplified modulation leaves the command board through J500, pins 11 and 17, and is routed to the
RF board to provide the transmit modulation.
3.2.11 RS-232 Line Driver
The U526 device is a driver/receiver IC, capable of interfacing with external hardware that utilizes
the RS-232 protocol. The device includes an internal oscillator, a voltage doubler, a voltage inverter,
and a level shifter. The IC is sourced by +5 V and outputs digital signals at voltage levels of
10 Vdc.
The device accepts incoming RS-232 data and converts it to a 5-V logic level. The command board
jumper default settings are arranged to have the RS-232 driver normally connected to the accessory
outputs, except when ordered as Motorcycle models.
3.2.12 Flash Programming
The command board provides multiplexing of the receive and transmit data inputs from the control
heads microphone connector (P104). The microphone connector is used (during certain conditions)
as a Flash programming input port. When the special programming cable is inserted into P104, the
microphone high line (normally 9.6 V) increases to 13 V, due to internal connections made within
the radio interface box (RIB). Zener diode VR401 (and resistor R519), connected to the Mic Hi
input (P502, pin 6), is forward-biased beyond its breakdown voltage of 11 Vdc. The voltage drop
across R516 forward-biases Q401, turning on the transistor. The collector of Q401 pulls the voltage
provided by R521 to ground. The change in state causes the multiplex control line (U525, pins 9, 10,
11) to change the gate inputs. The change allows the receive and transmit data paths to be
multiplexed to P502, pin 23 (Key Fail), P502, pin 15 (P_RX data), and P502, pin 2 (PTT*/P reset).
3.2.13 Encryption Voltages
The command board produces two voltages that are used by the encryption module: 10-V (9-V on G
and earlier boards) constant and 5-V key storage. The constant 10 V is generated using components
U604, R608, R609, and C605 (R420, VR403, C457, and Q508 on G and earlier boards) and is fed to
pin 38 of P501. On the VOCON board, the 10 V provides continuous unswitched voltage when the
vehicular battery is connected to the radio and is also switched via VOCON transistors Q206 and
Q207 to provide SWB+ to the encryption module. A 5-V storage circuit comprised of components
R532, R533, and C571 (0.47 farad capacitor) provides +5 Vdc to the encryption module via P501 pin
36 to hold encryption keys for a period of three days with no A+ voltage present. Provision is made
for a battery holder to replace capacitor C571. The addition of the battery will increase encryption
key hold time to approximately one year.
July 1, 2002 68P81076C25-C
3.2.14 Regulator and Power-Control IC
The regulator and power-control IC (RPCIC), U500, contains internal circuitry for the 9.6-V regulator
and the switched +5-V regulator. Refer to Section 3.2.4, "Regulators," on page 3-10 for detailed
theory of operation.
The power-control section of the device is responsible for maintaining a constant RF output power. A
directional coupler and detector network, located within the RF power amplifier circuit, rectifies the
sensed forward power from the last RF gain stage. The detected voltage is routed back to the
command board control circuitry (U500) via P503, pin 8. The voltage is then coupled through a buffer
amplifier and summed, through a resistor network (R509, R508, and R507), with the transmit power
set voltage (U500, pin 6) and the temperature sense voltage. The resulting voltage is applied to the
control amplifiers inverting port (U502, pin 2) for automatic RF gain control.
The U500 current-sense inputs, pin 37 (sense +) and pin 38 (sense -), are sourced from the current-
sensing resistor on the RF power amplifier. The two inputs are applied to a differential amplifier
internal to the RPCIC. The current limit is set by a software-programmable D/A device (U502) that
causes a cut back in RF output power when the set limit is exceeded.
The transmitter attack and off times are software programmable to meet domestic and international
specifications. Transistors Q514 and Q515 are controlled by a serial shift register (U530). The
transistors, when turned on (logic 1 input) cause the output of Q504 (the PA control line) to ramp up
slowly to prevent an abrupt RF PA turn-on. The slower rate is required to meet international spurious
requirements. When the transistors are turned off, the attack times return to a standard domestic
response with fast rise times. Refer to Figure 3-6 for attack time diagrams.
Figure 3-6. Transmitter Attack Time
Trigger Standard spec. European spec.
T1 T2
1.87 mS
MAEPF-25186-O
68P81076C25-C July 1, 2002
Theory of Operation: ASTRO Spectra VOCON Board 3-15
3.3 ASTRO Spectra VOCON Board
This section of the theory of operation provides a detailed circuit description of an ASTRO Digital
Spectra Vocoder/Controller (VOCON) Board. When reading the Theory of Operation, refer to your
appropriate schematic and component location diagrams located in Chapter 7. Schematics,
Component Location Diagrams, and Parts Lists. This detailed Theory of Operation will help isolate
the problem to a particular component. However, first use the ASTRO Digital Spectra and Digital
Spectra Plus Mobile Radios Basic Service Manual to troubleshoot the problem to a particular board.
NOTE: The information in this subsection applies to the non Plus VOCON Board. Refer to Section
3.4, "ASTRO Spectra Plus VOCON Board," on page 3-38 for information on the ASTRO
Spectra Plus VOCON board.
3.3.1 General
The VOCON board consists of two subsystems; the vocoder and the controller. Although these two
subsystems share the same printed circuit board and work closely together, it helps to keep their
individual functionality separate in describing the operation of the radio.
The controller section is the central interface between the various subsystems of the radio. It is very
similar to the digital logic portion of the controllers on many existing Motorola radios. Its main task is
to interpret user input, provide user feedback, and schedule events in the radio operation, which
includes programming ICs, steering the activities of the DSP, and sending messages to the display
through the control head.
The vocoder section performs all tone signaling, trunking signalling, conventional analog voice, etc.
All analog signal processing is done digitally utilizing a DSP56001. In addition it provides a digital
voice plus data capability utilizing VSELP or IMBE voice compression algorithms. Vocoder is a
general term used to refer to these DSP based systems and is short for voice encoder.
In addition, the VOCON board provides the interconnection between the microcontroller unit (MCU),
digital-signal processor (DSP), command board, and encryption board on secure-equipped radios.
3.3.2 Controller Section
Refer to Figure 3-7 and your specific schematic diagram.
The controller section of the VOCON board consists entirely of digital logic comprised of a
microcontrol unit (MCU-U204), a custom support logic IC (SLIC-U206), and memory consisting of:
SRAM (U202), EEPROM (U201), and FLASH ROM (U205).
The MCU (U204) memory system is comprised of a 32k x 8 SRAM (U202), 32k x 8 EEPROM
(U201), and 512k x 8 FLASH ROMs (U205). The MCU also contains 1024 bytes of internal SRAM
and 512 bytes of internal EEPROM. The EEPROM memory is used to store customer specific
information and radio personality features. The FLASH ROM contains the programs which the
HC11F1 executes. The FLASH ROM allows the controller firmware to be reprogrammed for future
software upgrades or feature enhancements. The SRAM is used for scratchpad memory during
program execution.
July 1, 2002 68P81076C25-C
3-16 Theory of Operation: ASTRO Spectra VOCON Board
The SLIC (U206) performs many functions as a companion IC for the MCU. Among these are
expanded input/output (I/O), memory decoding and management, and interrupt control. It also
contains the universal asynchronous receiver transmitter (UART) used for the RS232 data
communications. The SLIC control registers are mapped into the MCU (U204) memory space.
Figure 3-7. VOCON Board - Controller Section
The controller performs the programming of all peripheral ICs. This is done via a serial peripheral
interface (SPI) bus. ICs programmed through this bus include the synthesizer prescaler, DAIC, and
ADSIC. On secure-equipped model, the encryption board is also controlled through the SPI bus.
In addition to the SPI bus, the controller also maintains two asynchronous serial buses; the SB9600
bus and an RS232 serial bus. The SB9600 bus is for interfacing the controller section to different
hardware option boards, some of which may be external to the radio. The RS232 is used as common
data interface for external devices.
User input from the control head is sent to the controller via the SB9600 bus. Feedback to the user is
provided by the display on the control head. The display is 2 line 14 characters on the W3 model, 8
characters on W4, W5, and W7 models, and 11 characters on the W9 model.
The controller schedules the activities of the DSP through the host port interface. This includes
setting the operational modes and parameters of the DSP. The controlling of the DSP is analogous to
programming analog signaling ICs on standard analog radios.
U205
256Kx8
FLASH
U210
256Kx8
FLASH
U202
32Kx8
SRAM
U201
32Kx8
EEPROM
Address/Data/
Control
Resets Clocks
Controls
Chip Selects/
Bank Control
General
Purpose I/O
RS232
U206
SLIC IV
SPI
SCI
A/D
Address/Data/
Control
Clocks
General
Purpose I/O
512 Bytes
EEPROM
1024 Bytes
SRAM
U204
MC68HC11F1
HC11/DSP
Interface
Command Board
Command Board
Command Board
Encryption Board
MAEPF-25105-O
ADSIC
68P81076C25-C July 1, 2002
3.3.3 Vocoder Section
Refer to Figure 3-8 and your specific schematic diagram.
The vocoder section of the VOCON board is made up of a digital signal processor (DSP) (U405),
24k x24 static-RAM (SRAM) (U414, U403, and U402), 256kB FLASH ROM (U404), and
ABACUS II/DSP support IC (ADSIC) (U406).
The FLASH ROM (U404) contains the program code executed by the DSP. As with the FLASH ROM
used in the controller section, the FLASH ROM is reprogrammable so new features and algorithms
can be updated in the field as they become available. Depending on the mode and operation of the
DSP, corresponding program code is moved from the FLASH ROM into the faster SRAM, where it is
executed at full bus rate.
The ADSIC (U406) is basically a support IC for the DSP. It provides among other things, the interface
from the digital world of the DSP to the analog world. The ADSIC also provides some memory
management and provides interrupt control for the DSP processing algorithms. The configuration
programming of the ADSIC is performed by the MCU. However some components of the ADSIC are
controlled through a parallel memory mapped register bank by the DSP.
In the receive mode, The ADSIC (U406) acts as an interface to the ABACUS II IC, which can provide
digital output of I (In phase) and Q (Quadrature) data words directly to the DSP for processing. Or
the data can be filtered and discriminated by the ADSIC and data provided to the DSP as raw
discriminator sample data. The latter mode, with the ADSIC performing the filtering and
discrimination, is the typical mode of operation.
In the transmit mode, the ADSIC (U406) provides a serial digital-to-analog (D/A) converter. The data
generated by the DSP is filtered and reconstructed as an analog signal to present to the VCO and
Synthesizer as a modulation signal. Both the transmit and receive data paths between the DSP and
ADSIC are through the DSP SSI port.
July 1, 2002 68P81076C25-C
When transmitting, the microphone audio is passed from the command board to the ADSIC, which
incorporates an analog-to-digital (A/D) converter to translate the analog waveform to a series of
data. The data is available to the DSP through the ADSIC parallel registers. In the converse way, the
DSP writes speaker data samples to a D/A in the ADSIC, which provides an analog speaker audio
signal to the audio power amplifier on the command board.
Figure 3-8. VOCON Board - Vocoder Section
3.3.4 RX Signal Path
The vocoder processes all received signals digitally. This requires a unique back end from a
standard analog radio. This unique functionality is provided by the ABACUS II IC with the ADSIC
(U406) acting as the interface to the DSP. The ABACUS II IC located on the RF board provides a
digital back-end for the receiver section. It provides a digital output of I (In phase) and Q
(Quadrature) data words at 20 kHz sampling rate through the ADSIC interface to the DSP. Refer to
the appropriate transceiver section for details on ABACUS II operation.
The ADSIC interface to the ABACUS II is comprised of the four signals SBI, DIN, DIN*, and ODC
(refer to Figure 3-9).
SSI
SERIAL
E
X
T
A
L
M
O
D
B
M
O
D
A
HC11/DSP
Interface
D0-D23
BUS
CONTROL
A0-A15
U405
DSP56001 SCI
SERIAL
Encryption
Interface
Host
Port
System
Clock
Gata Array
Logic
ABACUS Rx
Interface
Tx D/A
General
Purpose I/O
Speaker
D/A
Microphone
A/D
Serial
Config.
U406
ADSIC
ABACUS
Interface
Modulation
Out
Command
Board
U414
8Kx24
SRAM
U404
256Kx8
FLASH
U403
8Kx24
SRAM
U402
8Kx24
SRAM
HC11
SPI
MAEPF-25106-O
68P81076C25-C July 1, 2002
Figure 3-9. DSP RSSI Port - RX Mode
NOTE: An asterisk symbol (*) next to a signal name indicates a negative or NOT logic true signal.
ODC is a clock ABACUS II provides to the ADSIC. Most internal ADSIC functions are clocked by this
ODC signal at a rate of 2.4 MHz and is available as soon as power is supplied to the circuitry. This
signal may initially be 2.4 or 4.8 MHz after power-up. It is programmed by the ADSIC through the SBI
signal to 2.4 MHz when the ADSIC is initialized by the MCU through the SPI bus. For any
functionality of the ADSIC to exist, including initial programming, this reference clock must be
present. SBI is a programming data line for the ABACUS II. This line is used to configure the
operation of the ABACUS II and is driven by the ADSIC. The MCU programs many of the ADSIC
operational features through the SPI interface. There are 36 configuration registers in the ADSIC of
which four contain configuration data for the ABACUS II. When these particular registers are
programmed by the MCU, the ADSIC in turn sends this data to the ABACUS II through the SBI.
DIN and DIN* are the data lines on which the I and Q data words are transferred from the ABACUS
II. These signals make up a differentially encoded current loop. Instead of sending TTL type voltage
signals, the data is transferred by flowing current one way or the other through the loop. This helps to
reduce internally generated spurious emissions on the RF board. The ADSIC contains an internal
current loop decoder which translates these signals back to TTL logic and stores the data in internal
registers.
In the fundamental mode of operation, the ADSIC transfers raw baseband data to the DSP. The DSP
can perform IF filtering and discriminator functions on this data to obtain a baseband demodulated
signal. However, the ADSIC contains a digital filter and discriminator function and can provide this
baseband demodulated signal directly to the DSP, this being the typical mode of operation. The
internal digital IF filter is programmable up to 24 taps. These taps are programmed by the MCU
through the SPI interface.
48KHz TX Data Interrupt
Serial Transmit Data
Serial Receive Data
2.4 MHz Receive Data Clock
20 KHz RX Data Interrupt
1.2 MHz Tx Data Serial Clock
D8-D23
A0-A2,A13-A15,RD*,WR*
SCKR
RFS
TFS
SCKT
RXD
TXD
ADSIC
U406
Command Board
Interface
J501-40 SDO
SC0
SC1
SC2
SCK
SRD
STD
SSI
SERIAL
DSP56001
U405
IRQB IRQB
8KHz
SBI
DIN
DIN-
IDC
ODC
Data In
Data In*
SBI
ABACUS II
Interface
J501-1
J501-2
J501-7
J501-6
MAEPF-25107-O
July 1, 2002 68P81076C25-C
The DSP accesses this data through its SSI port. This is a 6 port synchronous serial bus. It is used
by the DSP for both transmit and receive data transferal, but only the receive functions will be
discussed here. The ADSIC transfers the data to the DSP on the SRD line at a rate of 2.4 MHz. This
is clocked synchronously by the ADSIC which provides a 2.4 MHz clock on SC0. In addition,
a 20 kHz interrupt is provided on SC1 signaling the arrival of a data packet. This means a new I and
Q sample data packet is available to the DSP at a 20 kHz rate which represents the sampling rate of
the received data. The DSP then processes this data to extract audio, signaling, etc. based on the
20 kHz interrupt.
In addition to the SPI programming bus, the ADSIC also contains a parallel configuration bus
consisting of D8-D23, A0-A2, A13-A15, RD*, and WR*, This bus is used to access registers mapped
into the DSP memory starting at Y:FFF0. Some of these registers are used for additional ADSIC
configuration controlled directly by the DSP. Some of the registers are data registers for the speaker
D/A. Analog speaker audio is processed through this parallel bus where the DSP outputs the
speaker audio digital data words to this speaker D/A and an analog waveform is generated which is
output on SDO (Speaker Data Out). In conjunction with the speaker D/A, the ADSIC contains a
programmable attenuator to set the rough signal attenuation. However, the fine levels and
differences between signal types is adjusted through the DSP software algorithms. The speaker D/A
attenuator setting is programmed by the MCU through the SPI bus.
The ADSIC provides an 8 kHz interrupt to the DSP on IRQB for processing the speaker data
samples. IRQB is also one of the DSP mode configuration pins at start up. This 8 kHz signal must be
enabled through the SPI programming bus by the MCU and is necessary for any audio processing to
occur.
For secure messages, the digital signal data must be passed to the secure module for decryption
prior to processing speaker data. The DSP transfers the data to and from the secure module through
it's SCI port consisting of TXD and RXD. The SCI port is a two wire duplex asynchronous serial port.
Configuration and mode control of the secure module is performed by the MCU through the SPI bus.
The ADSIC presents the analog speaker audio to the command boards audio power amplifier.,
which drives an external speaker. For more information on this subject, refer to Section
3.2, "Command Board," on page 3-8.
Since all of the audio and signaling is processed in DSP software algorithms, all types of audio and
signalling follow this same path. There is, however, one exception. Low-speed trunking data is
processed by the host C through the SCLK port of the DSP. This port is connected to port PA0 on
the host C. The DSP extracts the low-speed data from the received signal and relays it to the host
C for processing.
68P81076C25-C July 1, 2002
3.3.5 TX Signal Path
The transmit signal path follows some of the same design structure as the receive signal path
described in Section 3.3.4, "RX Signal Path," on page 3-18 (refer to Figure 3-10). It is advisable to
read through the section on RX Signal Path that precedes this section.
Figure 3-10. DSP RSSI Port - TX Mode
The ADSIC contains a microphone A/D with a programmable attenuator for coarse level adjustment.
As with the speaker D/A attenuator, the microphone attenuator value is programmed by the MCU
through the SPI bus. The analog microphone signal from the command board is input to the A/D on
MAI (Mic Audio In). The microphone A/D converts the analog signal to a digital data stream and
stores it in internal registers. The DSP accesses this data through the parallel configuration bus
consisting of D8-D23, A0-A2, A13-A15, RD*, and WR*. As with the speaker data samples, the DSP
reads the microphone samples from registers mapped into it's memory space starting at Y:FFF0.
The ADSIC provides an 8 kHz interrupt to the DSP on IRQB for processing these microphone data
samples.
As with the received trunking low-speed data, low speed Tx data is processed by the MCU and
returned to the DSP at the DSP SCLK port connected to the MCU port PA0.
For secure messages, the digital signal may be passed to the secure module for encryption prior to
further processing. The DSP transfers the data to and from the secure module through its SCI port,
consisting of TXD and RXD. Configuration and mode control of the secure module is performed by
the MCU via the SPI bus.
The DSP processes these converted microphone samples, generates and mixes the appropriate
signalling, and filters the resultant data. This data is then transferred to the ADSIC IC on the DSP
SSI port. The transmit side of the SSI port consists of SC2, SCK, and STD. The DSP SSI port is a
synchronous serial port. SCK is the 1.2 MHz clock input derived from the ADSIC, which makes it
synchronous. The data is clocked over to the ADSIC on STD at a 1.2 MHz rate. The ADSIC
generates a 48 kHz interrupt on SC2 so that a new sample data packet is transferred at a 48 kHz
rate which sets the transmit data sampling rate at 48Ksp.
48KHz TX Data Interrupt
Serial Transmit Data
Serial Receive Data
2.4 MHz Receive Data Clock
20 KHz RX Data Interrupt
1.2 MHz Tx Data Serial Clock
D8-D23
A0-A2,A13-A15,RD*,WR*
SCKR
RFS
TFS
SCKT
RXD
TXD
ADSIC
U406
MAI
VVO
MODIN
J501-49
J501-39
SC0
SC1
SC2
SCK
SRD
STD
SSI
SERIAL
DSP56001
U405
IRQB IRQB
8KHz
SBI
DIN
DIN-
IDC
ODC
Data In
Data In*
SBI
ABACUS II
Interface
J501-1
J501-2
J501-7
J501-6
VRO
REF MOD
J501-48
MAEPF-25108-O
July 1, 2002 68P81076C25-C
These samples are then input to a transmit D/A, which converts the data to an analog waveform.
This waveform is the modulation out signal from the ADSIC ports, VVO and VRO. These signals are
both sent to the command board, where they go through a gain stage and then to the VCO and
Synthesizer. VVO is used primarily for audio frequency modulation; VRO is used to compensate for
low-frequency response to pass Digital Private Line (DPL) modulated signals.The transmit side of
the transceiver is virtually identical to a standard analog FM radio.
Also required is the 2.4 MHz ODC signal from the ABACUS II IC. Although the ABACUS II IC
provides receiver functions, it is important to note that this 2.4 MHz reference is required for all of the
ADSIC operations.
3.3.6 Controller Bootstrap and Asynchronous Buses
The SB9600 bus (see Figure 3-11) is an asynchronous serial communication bus, utilizing a
Motorola proprietary protocol. It provides a means for the MCU to communicate with other hardware
devices. In the ASTRO Digital Spectra radio, it communicates with hardware accessories connected
to the accessory connector and the remote interface board.
The SB9600 bus utilizes the UART internal to the MCU, operating at 9600 baud. The SB9600 bus
consists of LH/TX_Data (J501-18), LH/RX_Data (J501-17), and Busy_RTS (J501-20) signals.
LH/TX_Data and LH/RX_Data are the SCI TXD and RXD ports (U204-PD0 and PD1), respectively.
Busy_RTS (U204-PA3) is an active-low signal, which is pulled low when a device wants control of
the bus.
68P81076C25-C July 1, 2002
The same UART internal to the MCU is used in the controller bootstrap mode of operation. This
mode is used primarily in downloading new program code to the FLASH ROMs on the VOCON
board. In this mode, the MCU accepts special code downloaded at 7200 baud through the SCI bus
instead of operating from program code resident in its ROMs.
Figure 3-11. Host SB9600 and RS232 Ports
A voltage greater than 10 Vdc applied to J501-31 (Vpp) will trip the circuit comprising Q203, Q204,
and VR207. This circuit sets the MODA and MODB pins of the MCU to bootstrap mode (logic 0,0). If
the Vpp voltage is raised to 12 Vdc required on the FLASH devices for programming, the circuit
comprising VR208, Q211, and Q208 will trip, supplying Vpp to the FLASH devices, U205 and U404.
The ASTRO Digital Spectra radio has an additional asynchronous serial bus which utilizes RS232
bus protocol. This bus utilizes the UART in the SLIC IC (U206). It consists of TX/RS232 (J501-43),
RX/RS232 (J501-50), CTS/RS232 (J501-5), and RTS/RS232 (J501-42). It is a four-wire duplex bus
used to connect to external data devices.
PD1 (TXD)
PD0 (RXD)
HC11F1
U204
J501-18
LH_DATA/BOOT_DATA_OUT
J501-43
RS232_DATA_OUT
BOOT_DATA_IN
BOOT_DATA_OUT
J501-20
SB9600_BUSY
PA3
J501-42
RTS_IN*
J501-50
RS232_DATA_IN
J501-5
CTSOUT*
RXDIN
PJ2
PJ3
RTSBIN
SLIC IV
U206
MAEPF-25109-O
J501-17
BOOT_DATA_IN
July 1, 2002 68P81076C25-C
3.3.7 Vocoder Bootstrap
The DSP has two modes of bootstrap: from program code stored in the FLASH ROM U404, or
retrieving code from the host port.
During normal modes of operation, the DSP executes program code stored in the FLASH ROM,
U404. Unlike the MCU, however, the DSP moves the code from the FLASH ROM into the three
SRAMs, U402, U403, and U414, where it is executed from. Since, at initial start-up, the DSP must
execute this process before it can begin to execute system code, it is considered a bootstrap
process. In this process, the DSP fetches 512 words, 1536 bytes, of code from the FLASH ROM,
starting at physical address $C000, and moves it into internal P memory. This code contains the
system vectors, including the reset vector. It then executes this piece of bootstrap code, which
basically in turn moves additional code into the external SRAMs.
A second mode of bootstrap allows the DSP to load this initial 512 words of data from the host port,
being supplied by the MCU. This mode is used for FLASH programming the DSP ROM when the
ROM may initially be blank. In addition, this mode may be used for downloading some diagnostic
software for evaluating that portion of the board.
The bootstrap mode for the DSP is controlled by three signals; MODA/IRQA*, MODB/IRQB*, and
D23. All three of these signals are on the DSP (U405). MODA and MODB configure the memory
map of the DSP when the DSP reset become active. These two signals are controlled by the ADSIC
(U406) during power-up, which sets MODA low and MODB high for proper configuration. Later these
lines become interrupts for analog signal processing. D23 controls whether the DSP will look for
code from the MCU or will retrieve code from the FLASH ROM. D23 by default is pulled high through
R404 which will cause the DSP to seek code from the FLASH ROM (U404) if this line is read high out
of reset. This line is also connected to an I/O port on the MCU which can configure it for the second,
host port, mode of bootstrap.
3.3.8 Serial Peripheral Interface (SPI) Bus
This bus is a synchronous serial bus made up of a data, a clock, and an individual IC unique select
line. It's primary purpose is to configure the operating state of each IC. ICs programmed by this
include; ADSIC, Synthesizer, Prescaler, DAIC, and, if equipped, the secure module.
The MCU (U204) is configured as the master of the bus. It provides the synchronous clock
(SPI_SCK), a select line, and data (MOSI [Master Out Slave In]). In general the appropriate select
line is pulled low to enable the target IC and the data is clocked in. The SPI bus is a duplex bus with
the return data being clocked in on MISO (Master In Slave Out). The only place this is used is when
communicating with the secure module. In this case, the return data is clocked back to the MCU on
MISO (master in slave out).
3.3.9 Controller Memory Map
Figure 3-12 depicts the controller section memory map for the parallel data bus as used in normal
modes of operation. There are three maps available for normal operation, but map 2 is the only one
used. In bootstrap mode, the mapping is slightly different and will be addressed later.
The external bus for the host controller (U204)) consists of one 32Kx8 SRAM (U202), one 32Kx8
EEPROM (U201), one IMEG FLASH ROM U205, and SLIC (U206) configuration registers. In
addition the DSP host port is mapped into this bus through the SLIC address space. The purpose of
this bus is to interface the MCU (U204) to these devices
68P81076C25-C July 1, 2002
Figure 3-12. Controller Memory Mapping
$1060
$1500
$1600
HOST PORT
$0000
$1800
$3fff
Ext RAM
$1000
$1400
F1
INT RAM
F1 REGS
* *
$0000
$1000
$2000
$3000
$4000
$5000
$6000
$7000
$8000
$9000
$A000
$B000
$C000
$D000
$E000
$F000
$FFFF
MAP 2
NON-MUX 32K COMMON
Int EE
$0E00
COMMON ROM
BANKED ROM/EEPROM
CONTROLLED BY SLIC
RAM
EXTERNAL EEPROM
CONTROLLED BY F1
F1 REGISTERS
AND MEMORY:
*
SLIC III REGISTER
$1400 - $14FF
INT RAM: $1060-$13FF
INT EE: $0E00-$0FFF
REGISTERS: $1000-$105F
External
RAM
MAEPF-24346-O
*
SLIC REG
External
RAM
External
RAM
July 1, 2002 68P81076C25-C
The MCU executes program code stored in the FLASH ROMs. On a power-up reset, it fetches a
vector from $FFFE, $FFFF in the ROMs and begins to execute code stored at this location. The
external SRAM along with the internal 1Kx8 SRAM is used for temporary variable storage and stack
space. The internal 512 bytes of EEPROM along with the external EEPROM are used for non
volatile storage of customer-specific information. More specifically the internal EEPROM space
contains transceiver board tuning information and on power-down some radio state information is
stored in the external EEPROM.
The SLIC is controlled through sixteen registers mapped into the MCU memory at $1400-$14FF.
This mapping is achieved by the following signals from the MCU: R/W*, CSIO1*, HA0-HA4,HA8,
HA9. Upon power-up, the MCU configures the SLIC including the memory map by writing to these
registers.
The SLIC memory management functions in conjunction with the chip selects provided by the MCU
provide the decoding logic for the memory map which is dependent upon the map selected in the
SLIC. The MCU provides a chip select, CSGEN*, which decodes the valid range for the external
SRAM. In addition CSI01* and CSPROG* are provided to the SLIC decoding logic for the external
EEPROM and FLASH ROM respectively. The SLIC provides a chip select and banking scheme for
the EEPROM and FLASH ROM. The FLASH ROM is banked into the map in 16KB blocks with one
32KB common ROM block. The external EEPROM may be swapped into one of the banked ROM
areas. This is all controlled by EE1CS*, ROM1CS*, ROM2CS*, HA14_OUT, HA15_OUT, HA16, and
HA17 from the SLIC (U206) and D0-D8 and A0-16 from the MCU (U204).
The SLIC provides three peripheral chip selects; XTSC1B, XTCS2B, and XTCS3B. These can be
configured to drive an external chip select when its range of memory is addressed. XTSC1B is used
to address the host port interface to the DSP. XTSC2B is used to address a small portion of external
SRAM through the gate U211. XTSCB3 is used as general purpose I/O for interrupting the secure
module.
In bootstrap mode the memory map is slightly different. Internal EEPROM is mapped at $FE00-
$FFFF and F1 internal SRAM starts at $0000-$03FF. In addition, a special bootstrap ROM appears
in the ROM space from $B600-$BFFF. For additional information on bootstrap mode, refer to Section
3.3.6, "Controller Bootstrap and Asynchronous Buses," on page 3-22.
3.3.10 Vocoder Memory Map
The vocoder (DSP) external bus consists of three 32k x 8 SRAMs (U401, U402, and U403), one
256k x 8 FLASH ROM (U404), and ADSIC (U406) configuration registers. Refer to Figure 3-13.
The DSP56001A (U405) has a 24 bit wide data bus (D0-D23) and a 16 bit wide address bus
(A0 - A15). The DSP can address three 64k x 24 memory spaces: P (Program), Dx (Data X), and Dy
(Data Y). These additional RAM spaces are decoded using PS* (Program Strobe), DS* (Data
Strobe), and X/Y*. RD* and WR* are separate read and write strobes.
The ADSIC provides memory decoding for the FLASH ROM (U404). EPS* provides the logic:
and is used as a select for the ROM. The ADSIC provide three bank lines for selecting 16k byte
banks from the ROM. This provides decoding for 128k bytes from the ROM in the P: memory space.
PS* is used to select A17 to provide an additional 128k bytes of space in Dx: memory space for the
ROM.
A15 x (A14 A13)
68P81076C25-C July 1, 2002
Figure 3-13. Vocoder Memory Mapping
The ADSIC internal registers are decoded internally and start at $E000 in Dy:. These registers are
decoded using A0-A2, A13-A15, and PS* from the DSP. The ADSIC internal registers are 16 bits
wide, so only D8-D23 are used.
$0000
$01FF
$0FFF
$0200
$1000
$1FFF
$E000
$DFFF
External
RAM
U403
$2000
$7FFF
$FFFF
External
RAM
U402
$8000
Dy Dx P
ADS Vectors
ADSIC
Registers
$9FFF
$A000
External ROM
16KB Physical
Banks
$00000-1FFFF
Internal P Ram
ADS P Ram
Not Used
External ROM
16KB Physical
Banks
$20000-3FFFF
Internal X Rom Internal Y Rom
MAEPF-26007-A
Internal Dx Ram
ADS Dx Ram
Internal Dy Ram
ADS Dy Ram
External
RAM
U401
July 1, 2002 68P81076C25-C
The DSP program code is stored in the FLASH ROM, U404. During normal modes of operation, the
DSP moves the appropriate program code into the three SRAMs (U401, U402, and U403) and
internal RAM for execution. The DSP never executes program code from the FLASH ROM itself. At
power-up after reset, the DSP downloads 512 words (1536 bytes) from the ROM, starting at $C000,
and puts it into the internal RAM, starting at $0000, where it is executed. This segment of program
code contains the interrupt vectors and the reset vector, and is basically an expanded bootstrap
code. When the MCU messages the DSP that the ADSIC has been configured, the DSP overlays
more code from the ROM into external SRAM and begins to execute it. Overlays occur at different
times when the DSP moves code from the ROM into external SRAM, depending on immediate mode
of operation, such as changing from transmit to receive.
3.3.11 MCU System Clock
The MCU (U701) system clock is provided by circuitry internal to the MCU and is based on the
crystal reference, Y100. The nominal operating frequency is 7.3728 MHz. This signal is available as
a clock at 4XECLK on U701 and is provided to the SLIC (U702) for internal clock timing. The MCU
actually operates at a clock rate of 1/4 the crystal reference frequency or 1.8432 MHz. This clock is
available at ECLK on U701.
The MCU clock contains a crystal warp circuit comprised of L120, Q102, and C162. This circuit is
controlled by an I/O port (PA6) on the MCU. This circuit moves the operating frequency of the
oscillator about 250ppM on certain receive channels to prevent interference from the MCU bus
noise.
3.3.12 DSP System Clock
The DSP (U405) system clock, DCLK, is provided by the ADSIC (U406). It is based off the crystal
reference, Y401, with a nominal operating frequency of 33.0000 MHz. The ADSIC contains an
internal clock-divider circuit that can divide the system clock from 33 MHz to 16.5 MHz or 8.25 MHz
operation. The DSP controls this divider by writing to the ADSIC parallel registers. The frequency is
determined by the processes the DSP is running and, to reduce system power consumption, is
generally configured to the slowest operating speed possible.
The additional circuitry of CR402, L401, C416, C417, C419, and C422 make up a crystal warp
circuit. This circuit is controlled by the OSCw signal from ADSIC, which is configured by the host
through the SPI bus. The crystal warp circuit moves the operating frequency of the oscillator about
400ppM on certain receive channels to prevent interference from the DSP bus noise.
3.3.13 Radio Power-Up/Power-Down Sequence
Radio power-up begins when the user closes the radio on/off switch on the control top, placing 7.5
Vdc on the B+_SENSE line. This signal enables the pass element Q106 through Q105, enabling
SW_B+ to the controller board and the transceiver board. B+_SENSE also enables the +5 Vdc
regulator, U709. When +5 Vdc has been established, it is sensed by the supervisory IC, U726, which
disables the system reset through the delay circuit R208 and C214.
When the MCU comes out of reset, it fetches the reset vector in ROM at $FFFE, $FFFF and begins
to execute the code this vector points to. It configures the SLIC through the parallel bus registers.
Among other things it enables the correct memory map for the MCU. It configures all the transceiver
devices on the SPI bus. The MCU then pulls the ADSIC out of reset and, after a minimal delay, the
DSP also. It then configures the ADSIC via the SPI bus, configuring, among other things, the DSP
memory map. While this is happening, the DSP is fetching code from ROM U404 into internal RAM
and beginning to execute it. It then waits for a message from the MCU that the ADSIC has been
configured, before going on.
68P81076C25-C July 1, 2002
During this process, the MCU does power diagnostics. These diagnostics include verifying the MCU
system RAM, and verifying the data stored in the internal EEPROM, external EEPROM, and FLASH
ROMs. The MCU queries the DSP for proper status and the results of DSP self tests. The DSP self
tests include testing the system RAM, verifying the program code in ROM U404, and returning the
ADSIC configuration register checksum. Any failures cause the appropriate error codes to be sent to
the display. If everything is OK, the appropriate radio state is configured and the unit waits for user
input.
On power-down, the user opens the radio on/off switch, removing the B+_SENSE signal from the
controller board. This does not immediately remove power, as the MCU holds this line active through
B+_CNTL. The MCU then saves pertinent radio status data to the external EEPROM. Once this is
done, B+_CNTL is released, shutting off SW_B+ at Q106 and shutting down the 5-Vdc regulator
U709. When the regulator slumps to about 4.7 Vdc, supervisory IC U726 activates a system reset to
the SLIC, which in turn resets the MCU.
3.3.14 VOCON BOARD Signals
Due to the nature of the schematic-generating program, signal names must be different when they
are not directly connected to the same point. The following tables provide a cross-reference to the
various pinouts for the same functional signal.
Table 3-2. VOCON Board Address Bus (A) Pinouts
Bus U402 U403 U404 U405 U406 U414 U415
A0 A4 A4 20 C2 E9 A4 --
A1 B4 B4 19 D3 E10 B4 --
A2 A3 A3 18 D2 E8 A3 --
A3 B3 B3 17 E2 -- B3 --
A4 A2 A2 16 D4 -- A2 --
A5 B2 B2 15 B1 -- B2 --
A6 J6 J6 14 E3 -- J6 --
A7 K7 K7 13 F1 -- K7 --
A8 J7 J7 3 F2 -- J7 --
A9 K8 K8 2 F3 -- K8 --
A10 B8 B8 31 G1 -- B8 --
A11 A8 A8 1 J2 -- A8 --
A12 B7 B7 12 K1 -- B7 --
A13 J3 -- 4 H3 D9 -- 2
A14 -- -- 5 G2 B9 -- 1
A15 K3 K3 11 H2 D10 J3 --
July 1, 2002 68P81076C25-C
Table 3-3. VOCON Board Address Bus (HA) Pinouts
Bus U201 U202 U204 U205 U206 U210 U405
HA0 13 10 D2 20 D7 20 E9
HA1 11 9 C2 19 C7 19 F8
HA2 10 8 C1 18 C8 18 F9
HA3 8 7 D1 17 D8 17 --
HA4 2 6 E3 16 E6 16 --
HA5 7 5 E2 15 -- 15 --
HA6 6 4 E1 14 -- 14 --
HA7 5 3 E4 13 -- 13 --
HA8 27 25 F1 3 F6 3 --
HA9 12 24 F3 2 F7 2 --
HA10 24 21 F2 31 -- 31 --
HA11 26 23 G1 1 -- 1 --
HA12 4 2 F4 12 -- 12 --
HA13 28 26 G2 4 -- 4 --
HA14 3 1 H1-In 5 H8-In
H4-Out
5 --
HA15 -- -- H2-In 11 H7-In
K3-Out
11 --
HA16 -- -- -- 10 K6 10 --
HA17 -- -- -- 6 G5 6 --
Table 3-4. VOCON Board Data Bus (D) Pinouts
Bus U402 U403 U404 U405 U406 U414
D0 B9 B9 21 G3 -- B9
D1 C8 C8 22 J1 -- C8
D2 C9 C9 23 K3 -- C9
D3 D9 D9 25 L3 -- D9
D4 E8 E8 26 J3 -- E8
D5 E9 E9 27 K4 -- E9
D6 F9 F9 28 H4 -- F9
D7 G9 G9 29 L2 -- G9
D8 G8 G8 -- K2 H10 G8
68P81076C25-C July 1, 2002
D9 H8 H8 -- J4 H9 H8
D10 J9 J9 -- K5 H8 J9
D11 J8 J8 -- L5 J8 J8
D12 J2 J2 -- J5 L9 J2
D13 J1 J1 -- K6 K8 J1
D14 H2 H2 -- J6 L8 H2
D15 G2 G2 -- H7 J7 G2
D16 G1 G1 -- L9 K7 G1
D17 F1 F1 -- K8 L7 F1
D18 E1 E1 -- K7 J6 E1
D19 E2 E2 -- J7 K6 E2
D20 D1 D1 -- L8 J5 D1
D21 C1 C1 -- K10 L6 C1
D22 C2 C2 -- J9 L5 C2
D23 B1 B1 -- J10 K5 B1
Table 3-5. VOCON Board Data Bus (HD) Pinouts
Bus U201 U202 U204 U205 U206 U210 U405
HD0 14 1 C6 21 C3 21 C7
HD1 15 12 B8 22 B1 22 B8
HD2 16 13 C7 23 C2 23 D7
HD3 18 15 D5 25 D4 25 A9
HD4 19 16 C8 26 C1 26 C9
HD5 20 17 D7 27 D2 27 C10
HD6 21 18 D6 28 D3 28 D8
HD7 23 19 D8 29 D1 29 C8
Table 3-4. VOCON Board Data Bus (D) Pinouts (Continued)
Bus U402 U403 U404 U405 U406 U414
July 1, 2002 68P81076C25-C
Table 3-6. U204 (MCU)
U204
Pin #
Description To/From
B1 PE0 R260
B2 PE1 B SENSE/LBAT/PWR DWN VR214
C3 PE2 N/C
A3 PE3 EMERG J901-4
D3 PE4 N/C
A2 PE5 N/C
B3 PE6 SPKR COMMON R263
C4 PE7 EXT SPKR R261
B7 4XECLK (7.3726 MHz) U206-A3
J7 PD0 BOOT DATA IN (RXD) J501-17 U206
G6 PD1 BOOT DATA OUT (TXD) J501-18 U208
H6 PD2 MISO J801-7
J6 PD3 MOSI J501-9 J801-8
G5 PD4 SPI SCK J501-8 J801-9
H5 PD5 DA SEL* J501-13
C5 MOD A Q204C
B5 MOD B Q204C
G3 PA0 SCLK U405-C6
U406-C9
J2 PA1 BOOT MODE U405
H3 PA2 HREQ* U405-B10
J3 PA3 SB9600 BUSY J501-20
G4 PA4 IRQA* U406-F10
U405-H10
H4 PA5 BOOTSTRAP* U206-E5
J4 PA6 ECLK SHIFT Q205B
F5 PA7 N/C
E5 RESET/RESET* U201-31
U206-E4
E6 PG7 CSPROG* U206-E3
F8 PG6 CSGEN* U211-1
G8 PG5 CS101* U206-G1
68P81076C25-C July 1, 2002
G7 PG4 ADSIC RST* U406-A8
F7 PG3 ADSIC SEL* U406-B8
H8 PG2 DSP RST* U405-G9
F6 PG1 ROSC/PSC CE* J501-12
H7 PG0 SYN SEL* J501-11
B6 R/W* U405-D9
U206-B3
A5 ECLK (1.8432 MHz) U206-A4
E8 XIRQ* R233
E7 IRQ* U206-E2
A6 EXTAL 7.3728 MHz Y201
A7 XTAL Q205C
Table 3-7. U206 (SLIC)
U206
Pin #
Description To/From
F3 PH0 N/C
F4 PH1 N/C
F2 PH2 N/C
H1 PH3 N/C
G3 PH4 N/C
H2 PH5 INT PTT* J501-30
U206-H2
H3 PH6 EMC REQ J801-11
K2 PH7 LOCK DET* J501-10
U302-41
CR502
B4 PJ0 MOB IRQ* J501-26
D5 PJ1 VIP IN2 J501-25
A5 RS232 DATA OUT J501-43
B6 PJ3 CTSOUT* J501-5
Table 3-6. U204 (MCU) (Continued)
U204
Pin #
Description To/From
July 1, 2002 68P81076C25-C
A6 PJ4 R268
C6 PJ5 OPT SEL2 (KEYLOAD*) R237
A7 PJ6 VIP IN1 J501-24
D6 PJ7 EMC EN* J801-10
C9 POR* U409-2
E4 HC11RST*/RESET* U204-E5
U201-31
C4 OE* U201-25
U202-22
U205-32
U210-32
B3 R/W* U405-D9
U204-B6
E5 BOOTSTRAP* U204-H4
A2 MEM R/W* U201-29
U202-27
E3 AV*/CSPROG* U204-E6
G1 CE*/CS101* U204-G8
G2 SCNSLB R252
K5 ROM1CS* U205-30
F5 ROM2CS* U210-30
J4 EE1CS* U201-22
J8 KEYFAIL* J801-15
J501-21
B2 RS232 DATA IN J501-50
J2 BOOT DATA IN J501-17 U204-
J7
A3 4XECLK U204-B7
A4 ECLK U204-A5
J3 VIP OUT2 J501-23
G4 SPKREN* J501-44
K8 BUSY OUT* J501-19
G9 TXPA EN* J501-14
F8 5V EN* J501-15
Table 3-7. U206 (SLIC) (Continued)
U206
Pin #
Description To/From
68P81076C25-C July 1, 2002
G7 MICEN J501-45
J9 B+ CNTL U409-2
Q206B
E7 VIP OUT1 J501-22
K7 CS3B EMC MAKEUP* J801-12
G6 CS2B RAM SEL* U211-2
J7 CS1B HEN* U405-E8
G8 DISP EN*/LATCH SEL* J601-4
H9 RED LED N/C
E8 GRN LED N/C
E2 IRQ* U204-E7
Table 3-8. VOCON U405 (DSP)
U405
Pin #
Description To/From
C1 PS* U404-6 U406-D8
C3 DS*
A3 RD* U404-32 U406-F8
C4 WR* U404-7 U406-G10
B3 X/Y*
A4 BR* R411
B4 BG*/BS* R432
H10 MODA/IRQA* U204-G4 U406-F10
H9 MODB/IRQB* U406-F9
J8 XTAL R415
K9 EXTAL U406-G9 (DCLK)
A2 STO U406-H1
C5 SRO U406-L3
B6 SCK U406-G3
B2 SC2 U406-H2
Table 3-7. U206 (SLIC) (Continued)
U206
Pin #
Description To/From
July 1, 2002 68P81076C25-C
B5 SC1 U406-J4
B9 SC0 U406-K4
C6 SCLK U204-G3
U406-C9
A7 TXD/EMC RXD J801-3
B7 RXD/EMC TXD J801-4
G9 RESET/DSP RST* U204-H8
E10 HACK* R409
B19 HREQ* U204-H3
E8 HEN* U206-J7
D9 HR/W* U204-B6
Table 3-9. VOCON U406 (ADSIC)
U406
Pin #
Description To/From
D8 PS* U404-6
U405-C1
G10 WR* U405-C4
U404-7
U402/3/14-K2
F8 RD* U405-A3
U404-32
U402/3/14-K6
J9 RSEL U403-J3
U414-K3
G2 TP1 R407
G1 TP2 N/C
A4 AB1 R402
B8 SEL*/ADSIC SEL* U204-F7
A8 RST*/ADSIC RST* U204-G7
F10 IRQA/IRQA* U204-G4
U405-H10
F9 IRQB/IRQB* 8 kHz U405-H9
Table 3-8. VOCON U405 (DSP) (Continued)
U405
Pin #
Description To/From
68P81076C25-C July 1, 2002
F2 SSW/EPS* U404-30
C9 SCLK/SPI SCK U204-G5
J501-8
J801-9
C10 SPO/MOSI J501-9
J801-8
C1 MA1 U501-39
B5 SDO U501-40
B1 VRO REFMOD J501-48
B2 MODIN J501-49
L3 RXD SRO 2.4 MHz U405-C5
J4 RFS SC1 U405-B5
K4 SCKR SCO U405-B9
H1 TXD STO U405-A2
H2 TFS SC2 48 kHz U405-B2
G3 SCKT SCK 1.2 MHz U405-B6
C8 DA4 BNK2 U404-10
C3 DA7B BNK1 U404-11
B6 DA7A BNK0 U404-5
J1 N/C
J2 N/C
K1 N/C
K2 N/C
H3 DIN*/DOUT* J501-1
K3 DIN/DOUT J501-2
F3 IDC ODC 2.4 MHz J501-7
J3 SBI J501-6
C7 XTL 33 MHz Y401
C6 EXTL Y401
K9 OSC* CR402
G9 DCLK U405-K9
Table 3-9. VOCON U406 (ADSIC) (Continued)
U406
Pin #
Description To/From
July 1, 2002 68P81076C25-C
3-38 Theory of Operation: ASTRO Spectra Plus VOCON Board
3.4 ASTRO Spectra Plus VOCON Board
This section of the theory of operation provides a detailed circuit description of an ASTRO Digital
Spectra Plus Vocoder/Controller (VOCON) Board. When reading the Theory of Operation, refer to
your appropriate schematic and component location diagrams located in Chapter 7. Schematics,
Component Location Diagrams, and Parts Lists of this manual. This detailed Theory of Operation
will help isolate the problem to a particular component. However, first use the ASTRO Digital Spectra
and Digital Spectra Plus Mobile Radios Basic Service Manual to troubleshoot the problem to a
particular board.
NOTE: The information in this subsection applies to the Plus VOCON Board. Refer to Section
3.3, "ASTRO Spectra VOCON Board," on page 3-15 for information on the ASTRO Spectra
VOCON (non Plus) board.
3.4.1 General
The ASTRO Spectra Plus VOCON board consists of two subsystems; the vocoder and the controller.
Although these two subsystems share the same printed circuit board and work closely together, it
helps to keep their individual functionality separate in describing the operation of the radio. The
controller section is the central interface between the various subsystems of the radio. It is very
similar to the digital logic portion of the controllers on many existing Motorola radios. Its main task is
to interpret user input, provide user feedback, and schedule events in the radio operation, which
includes programming ICs (Integrated Circuits), steering the activities of the DSP (Digital Signal
Processor), and sending messages to the display through the control head. The vocoder section
performs functions previously performed by analog circuitry. This includes all tone signaling, trunking
signaling, and conventional analog voice, etc. All analog signal processing is done digitally utilizing a
DSP56600. In addition it provides a digital voice plus data capability utilizing IMBE voice
compression algorithms. Vocoder is a general term used to refer to these DSP based systems and is
short for voice encoder. In addition, the ASTRO Spectra Plus VOCON board provides the
interconnection between the MCU (microcontroller unit), DSP, command board, and UCM (Universal
Encryption Module) on secure-equipped radios.
3.4.2 ASTRO Spectra Plus Controller Section
Refer to Figure 3-14 and your specific schematic diagram located in Chapter 7.
The controller section of the ASTRO Spectra Plus VOCON board consists entirely of digital logic
comprised of a microcontroller unit core (Patriot IC-U300), and memory consisting of: SRAM (U302),
and FLASH ROM (U301). The Patriot IC is a dual-core processor that contains a DSP56600 core, a
MCore 210 microcontroller core and custom peripherals. Note: When the Controller Section
references the MCU, it will be referencing the Mcore 210 inside the Patriot IC (U300).
The MCU (U300) memory system is comprised of a 256k x 16 SRAM (U302) and a 2M x 16 FLASH
ROM (U301). The MCU also contains 22.5k x 32 of internal SRAM. The FLASH ROM contains the
programs that the Patriot IC executes, and is used to store customer specific information and radio
personality features (i.e. codeplug information). The FLASH ROM allows the controller firmware to
be reprogrammed for future software upgrades or feature enhancements. The SRAM is used for
scratchpad memory during program execution.
The controller performs the programming of all peripheral ICs. This is done via a serial peripheral
interface (SPI) bus, and through General Purpose Input/Outputs (GPIO) from the Patriot IC. ICs
programmed through these interfaces include the Synthesizer, Prescaler, DAIC, and KRSIC (U200)
and ADDAG (U201).
68P81076C25-C July 1, 2002
Theory of Operation: ASTRO Spectra Plus VOCON Board 3-39
In addition to the SPI bus, the controller also maintains two asynchronous serial busses; the SB9600
bus and an RS232 serial bus. The SB9600 bus is for interfacing the controller section to different
hardware option boards, some of which may be external to the radio. The RS232 is used as a
common data interface for external devices.
User input from the control head is sent to the controller through SB9600 bus messages. Feedback
to the user is provided by the display on the control head. The display is 2-line 14 characters on the
W3 model, 8 characters on W4, W5, and W7 models; and 11 characters on the W9 model.
The controller schedules the activities of the DSP through the host port interface, which is internal to
the Patriot IC (the MCU and DSP are both contained within the Patriot IC). This includes setting the
operational modes and parameters of the DSP. The controlling of the DSP is similar to programming
analog signaling ICs on standard analog radios.
Figure 3-14. ASTRO Spectra Plus VOCON Board - Controller Section
3.4.3 ASTRO Spectra Plus Vocoder Section
Refer to Figure 3-15 and your specific schematic diagram in Chapter 7.
The vocoder section of the ASTRO Spectra Plus VOCON board is made up of a digital signal
processor (DSP) core, 84Kx24 Program RAM, 2Kx24 Program ROM, and 62Kx16 Data RAM, which
are all integrated into the Patriot IC (U300). The vocoder also contains the KRSIC (U200) and
ADDAG (U201).
The FLASH ROM (U301) contains both the program code executed by the DSP and the controller
firmware. As with the FLASH ROM used in the controller section, the FLASH ROM is
reprogrammable so new features and algorithms can be updated in the field as they become
available. Depending on the mode and operation of the DSP, corresponding program code is moved
from the FLASH ROM into the faster SRAM, where it is executed at the full bus rate.
The KRSIC and ADDAG IC's are the support IC's for the DSP. In the receive mode, the KRSIC
(U200) acts as an interface to the ABACUS IC, which can provide data samples directly to the DSP
for processing. In the transmit mode, the ADDAG (U201) provides a serial digital-to-analog (D/A)
converter. The ADDAG (U201) also has a function in receive mode for special applications. The data
generated by the DSP is filtered and reconstructed as an analog signal to present a modulation
signal to the VCO (voltage-controlled oscillator). Both the transmit and receive data paths between
the DSP and ADDAG are through the DSP SSI port.
PATRIOT
U300
FLASH
U301
2M x 16
Address/Data/
Control
KRSIC
ADDAG
Command Board
Encryption Board SRAM
U302
256k x 16
GPIO
SPI
22.5k x 32
SRAM
SSI
DSP 56600
PATRIOT
U300
FLASH
U301
2M x 16
Address/Data/
Control
KRSIC
ADDAG
Command Board
Encryption Board SRAM
U302
256k x 16
GPIO
SPI
22.5k x 32
SRAM
SSI
DSP 56600
July 1, 2002 68P81076C25-C
When transmitting, the microphone audio is passed from the command board to the MC145483
CODEC (U402), which incorporates an analog-to-digital (A/D) converter to translate the analog
waveform to a data stream. The data is made available to the DSP through the Serial Audio Port
(SAP) of the Patriot IC. In the converse way, the DSP writes speaker data samples to a D/A in the
CODEC (U402) through the SAP. The CODEC (U402) provides an analog speaker audio signal to
the audio power amplifier on the command board.
Figure 3-15. ASTRO Spectra Plus VOCON Board - Vocoder Section
Modulation
Out
Speaker
D/A
ABACUS
Interface
Mic
A/D
PATRIOT
U300
FLASH
U301
2M x 16
Address/Data/
Control
Command Board
Encryption
Board
SRAM
U302
256k x 16
GPIO
SPI
22.5k x 32
SRAM
SSI - BBP
DSP 56600
KRSIC ADDAG CODEC
SSI - SAP
Command
Board
68P81076C25-C July 1, 2002
3.4.4 ASTRO Spectra Plus RX Signal Path
The vocoder processes all received signals digitally. This requires a unique back end from a
standard analog radio. This unique functionality is provided by the ABACUS IC with the KRSIC
(U200) acting as the interface to the DSP. The ABACUS IC located on the transceiver board
provides a digital back-end for the receiver section. It provides a digital output of I (In phase) and Q
(Quadrature) data words at a 20 kHz sampling rate (refer to the Receiver Back-End section for more
details on ABACUS operation). This data is passed to the DSP through an interface with the KRSIC
(U200) for appropriate processing. The KRSIC interface to the ABACUS is comprised of the four
signals SBI, DIN, DIN*, and ODC (refer to Figure 3-16).
Figure 3-16. ASTRO Spectra Plus RX Mode
NOTE: An asterisk symbol (*) next to a signal name indicates a negative or NOT logic true signal.
ODC is a clock ABACUS provides to the KRSIC. Most internal KRSIC functions are clocked by this
ODC signal at a rate of 2.4 MHz and is available as soon as power is supplied to the circuitry. This
signal may initially be 2.4 or 4.8 MHz after power-up. It is programmed by the KRSIC through the SBI
signal to 2.4 MHz when the KRSIC is initialized by the MCU (in the Patriot IC) through GPIO. SBI is
a programming data line for the ABACUS. This line is used to configure the operation of the
ABACUS and is driven by the KRSIC. The MCU programs many of the KRSIC operational features
through the GPIO interface. When the KRSIC is programmed properly by the MCU, the KRSIC in
turn sends this data to the ABACUS through the SBI.
DIN and DIN* are the data lines on which the I and Q data words are transferred from the ABACUS.
These signals make up a differentially encoded current loop. Instead of sending TTL type voltage
signals, the data is transferred by flowing current one way or the other through the loop. This helps to
reduce internally generated spurious emissions on the RF board. There are single-ended driver
circuits between the ABACUS and the KRSIC, which are used to convert the differential current
driven by the ABACUS. After the driver circuits, the I and Q samples are detected and transferred to
a serial transmitter.
SDO
PATRIOT
U300
DSP 56600
KRSIC
U200
ABACUS II
Interface
SBI
ODC
Data In*
Data In
J501-1
J501-7
J501-2
J501-6 RXSBI
RXODC
RXData_HI
RXData_LO
ABA_FSYNC
ABA_CLK
ABA_RXD
Serial Receive Data
20 kHz
800 KHz
SC0B
SRDB
SC1B
D0-D7,
RS0-RS4
GPIO
CODEC
U402
FSR
MCLK
DR
Command
Board
J501-40
SC2A
SCKA
STDA
SAP BBP
RO_NEG
8 kHz
512 kHz
Data
July 1, 2002 68P81076C25-C
The DSP accesses this data through its SSI port. The SSI port is used by the DSP for both transmit
and receive data transferal, but only the receive functions will be discussed in this section. The
KRSIC transfers the data to the DSP on the SRDB line at a rate of 1.2 MHz. This is clocked
synchronously by the KRSIC which provides a 1.2 MHz clock on SC0B. In addition, a 20 kHz
interrupt is provided on SC1B, signaling the arrival of a data packet. This means the I and Q sample
data packets are available to the DSP at a 20 kHz rate which represents the sampling rate of the
received data. The DSP then processes this data to extract audio, signaling, etc. based on the 20
kHz interrupt.
Speaker audio is processed by the DSP (in the Patriot IC), which outputs the audio data words to the
speaker D/A inside the CODEC (U402), and an analog waveform is generated on the SDO (Speaker
Data Out) line. In conjunction with the speaker D/A, the CODEC (U402) has the ability to attenuate
the receive analog output, using three data bits which provide programmable attenuation to set the
rough signal attenuation.
For secure messages, the digital signal data must be passed to the secure module for decryption
prior to DSP processing of the speaker data. The DSP transfers the data to and from the secure
module through it's SSI port consisting of TXD and RXD. The secure module communicates with the
DSP through its SPI bus, therefore a SSI to SPI conversion circuit is on the ASTRO Spectra Plus
VOCON board to ensure communication between the DSP and the secure module. Configuration
and mode control of the secure module is performed by the MCU through the SSI/SPI bus.
The CODEC presents the analog speaker audio to the command board's audio power amplifier,
which drives the external speaker. For more information on this subject, refer to Section
3.2, "Command Board," on page 3-8.
Since all of the audio and signaling is processed in DSP software algorithms, all types of audio and
signaling follow this same path. There is, however, one exception. Low-speed trunking data is
processed by the host uP through the SCLK port of the DSP. The DSP extracts the low-speed data
from the received signal and relays it to the host uP for processing.
3.4.5 ASTRO Spectra Plus TX Signal Path
The transmit signal path (refer to Figure 3-17) follows some of the same design structure as the
receive signal path described in Section 3.4.4, "ASTRO Spectra Plus RX Signal Path," on page 3-41.
Figure 3-17. ASTRO Spectra Plus TX Mode
REF MOD
J501-48
MOD OUT
J501-49
PATRIOT
U300
DSP 56600
ADDAG
U201
FMOUT SFS
SCK
STD
Serial TX Data
48 kHz
2.4 MHz
SCKB
STDB
SC2B
CODEC
U402
FSR
MCLK
DT
SC2A
SCKA
SRDA
SAP BBP
TG
8 kHz
512 kHz
Data
Gain / Attenuation
Stages
U400,401,404
D/A
Conv.
OUTQB
OUTQ
U202
MAI
J501-39
68P81076C25-C July 1, 2002
The analog microphone signal from the command board is passed to the ASTRO Spectra Plus
VOCON on MAI (Mic Audio In). This signal passes through gain and attenuation stages so that the
correct amplitude level of the audio is presented to the CODEC input. The CODEC contains a
microphone A/D. The microphone A/D converts the analog signal to a digital data stream and
transmits them to the SAP of the Patriot IC. The DSP accesses this data through this port. As with
the speaker data samples, the DSP reads the microphone samples from registers mapped into its
memory space.
As with the received trunking low-speed data, low speed transmit data is processed by the MCU and
returned to the DSP. For secure messages, the digital signal data may be passed to the secure
module prior to DSP processing before the ADDAG IC. The DSP transfers the data to and from the
secure module through it's SSI port consisting of TXD and RXD. The secure module communicates
with the DSP through its SPI bus, therefore a SSI to SPI conversion circuit is on the ASTRO Spectra
Plus VOCON board to ensure communication between the DSP and the secure module.
Configuration and mode control of the secure module is performed by the MCU through the SSI / SPI
bus.
The DSP processes these microphone samples, generates and mixes the appropriate signaling, and
filters the resultant data. This data is then transferred to the ADDAG IC on the DSP BBP (Baseband
Port) - SSI port. The transmit side of the SSI port consists of SC2B, SCKB, and STDB. The DSP
BBP-SSI port is a synchronous serial port. SCKB is the 2.4 MHz clock input derived from the
ADDAG, which makes it synchronous. The data is clocked over to the ADDAG on STDB at a
2.4 MHz rate. The ADDAG generates a 48 kHz interrupt on SC2B so that a new sample data packet
is transferred at a 48 kHz rate, which sets the transmit data sampling rate at 48Ksp.
Within the ADDAG IC, these samples are then input to a transmit D/A, which converts the data to an
analog waveform. This waveform is the modulation out signal from the ADDAG ports, FMOUT,
OUTQ, and OUTQB. FMOUT is single-ended, while OUTQ and OUTQB form a differential pair. This
pair is then sent to an Op-Amp (U202), which outputs a single-ended waveform. FMOUT is passed
through an Op-Amp (U202) for attenuation. These signals are both sent to the command board,
where they go through a gain stage and then to the VCO and Synthesizer. MODOUT is used
primarily for audio frequency modulation; REFMOD is used to compensate for low-frequency
response to pass subaudible modulated signals (such as PL).
3.4.6 ASTRO Spectra Plus Controller Bootstrap and Asynchronous Busses
The SB9600 bus (see Figure 3-18) is an asynchronous serial communication bus, utilizing a
Motorola proprietary protocol. It provides a means for the MCU to communicate with other hardware
devices. In the ASTRO Digital Spectra Plus radio, it communicates with hardware accessories
connected to the accessory connector and the remote interface board.
The SB9600 bus utilizes the UART internal to the MCU, operating at 9600 baud. The SB9600 bus
consists of LH / TX_Data (J501-18), LH / RX_Data (J501-17), and BUSY_RTS (J501-20) signals.
LH / TX_Data and LH / RX_Data are the UTXD1 (K11) and URXD1 (K12) ports of the Patriot IC
(U300), respectively. BUSY_RTS (U300-URTS1- L16) is an active-low signal, which is pulled low
when a device wants control of the bus.
The same UART internal to the MCU is used in the controller bootstrap mode of operation. This
mode is used primarily in downloading new program code to the FLASH ROM (U301) on the
VOCON board. In this mode, the MCU accepts special code downloaded at 115k baud through the
UART instead of operating from program code resident in its ROMs.
A voltage greater than 11 Vdc applied to J501-31 (Vpp) will trip the circuit comprising VR304, Q300,
and U307. This circuit sets the MOD pin (J1) of the MCU to bootstrap mode (logic 1). A voltage
greater than 7 Vdc applied to J501-31 (Vpp) will trip the circuit comprising VR305 and Q302. This will
not put the MCU in Bootstrap mode, but the software will detect this using pin PA7 (G11), which will
allow the user to interface with the Customer Programming Software, Tuner, and Flashport.
July 1, 2002 68P81076C25-C
The ASTRO Digital Spectra Plus radio has an additional asynchronous serial bus, which utilizes the
RS232 bus protocol. This bus utilizes the secondary UART in the Patriot IC (U300). It consists of TX
/ RS232 (J501-43), RX / RS232 (J501-50), CTS / RS232 (J501-5), and RTS / RS232 (J501-42). It is
a four-wire duplex bus used to connect to external data devices.
Figure 3-18. ASTRO Spectra Plus Host SB9600 and RS232 Ports
3.4.7 ASTRO Spectra Plus Serial Peripheral Interface Bus
This bus is a synchronous serial bus made up of a data, a clock, and an individual IC unique select
line. Its primary purpose is to configure the operating state of each IC. ICs programmed by this
include: ADDAG, Synthesizer, Prescaler, and the DAIC.
The MCU within the Patriot IC (U300) is configured as the master of the bus. It provides the
synchronous clock (SPI_SCK), a select line, and data (MOSI [Master Out Slave In]). In general the
appropriate select line is pulled low to enable the target IC and the data is clocked in. The SPI bus is
a duplex bus with the return data being clocked in on MISO (Master In Slave Out). The only place
this is used is when communicating with the ADDAG. In this case, the return data is clocked back to
the MCU on MISO (master in slave out).
3.4.8 ASTRO Spectra Plus MCU and DSP System Clocks
The MCU within the Patriot IC (U300) needs two clocks for proper operation. A 16.8 MHz sine-wave
reference is provided at the CKIH (A6) pin of the Patriot IC (U300). The source of this clock is a
16.8 MHz oscillator (Y400), and its associated filtering circuitry. This clock is also provided to the
KRSIC (U200), and the ADDAG IC (U201). The MCU has the capability of running at higher clock
rates, which are programmable and based on this 16.8 MHz reference. The DSP within the Patriot IC
(U300) also uses the 16.8 MHz provided at the CKIH (A6) pin as a reference.
The Patriot IC (U300) also requires a 32 kHz square-wave clock, provided at the CKIL (J7) pin. This
clock is generated by a 32 kHz crystal (Y401), with supporting circuitry for oscillation. This clock is
utilized only for the Patriot IC (U300), and is used for reset capability and other Patriot IC (U300)
functions.
PATRIOT
U300
Secondary
UART
Busy_RTS J501-20
Primary
UART
LH / TX_Data J501-18
TX / RS232 J501-43
LH / RX_Data J501-17
RX / RS232 J501-50
CTS / RS232J501-5
RTS / RS232 J501-42
URXD1
UCTS2
URTS1
UTXD1
UTXD2
URXD2
URTS2
68P81076C25-C July 1, 2002
3.4.9 ASTRO Spectra Plus Voltage Regulators
The ASTRO Spectra Plus VOCON board contains two voltage regulators, a 3-V regulator (U411) and
a 1.8-V regulator (U410). SW+5-V, which is routed to the ASTRO Spectra Plus VOCON board from
the command board, drives the two regulators. Figure 3-19 shows the DC distribution for the ASTRO
Spectra Plus VOCON Board.
Figure 3-19. ASTRO Spectra Plus VOCON DC Distribution
U410 and U411 are on Semiconductor LP2951CD adjustable regulators. The output voltage of these
regulators is determined by the resistive divider network between the regulator output and the error
amplifier feedback input. The LP2951 has error output lines which are open collector and requires a
pull up resistor (R332). The error line is high when the output voltage is high and low otherwise.
U412 is a 4.2-V detect circuit for the SW_5-V line. The output of this detector is tied to the error
outputs of the LP2951 regulators as a low voltage detect (LV_detect ) circuit. C438 provides delay on
the LV_detect line during startup. This is to allow all regulators to settle prior to Patriot U300 coming
out of reset.

V = 3.0 V
V = 1.8V
PATRIOT
Core, EIM
2M x 16
FLASH
256 x 16
SRAM
EEPOTs
MAX5160
USB
PATRIOT
Buses
SSI,SPI,UART
MC145483
CODEC
Audio/
Modulation
OP amps
Clock Gen
buffers
16.8 MHz
Ref Osc
KRSIC
ADDAG
Voltage
Conversion
block
Secure
SSI to SPI
conversion
circuitry
USB/RS232
quad mux
Voltage
Conversion
block
SW_5V
(from RPCIC
on command
board)
5V
5V
ON
Semiconductor
LP2951
ON
Semiconductor
LP2951
V = 3.0 V
V = 1.8V
PATRIOT
Core, EIM
2M x 16
FLASH
256 x 16
SRAM
EEPOTs
MAX5160
USB
PATRIOT
Buses
SSI,SPI,UART
MC145483
CODEC
Audio/
Modulation
OP amps
Clock Gen
buffers
16.8 MHz
Ref Osc
KRSIC
ADDAG
Voltage
Conversion
block
Secure
SSI to SPI
conversion
circuitry
USB/RS232
quad mux
Voltage
Conversion
block
SW_5V
(from RPCIC
on command
board)
5V
5V
ON
Semiconductor
LP2951
ON
Semiconductor
LP2951
July 1, 2002 68P81076C25-C
3.4.10 ASTRO Spectra Plus Radio Power-Up/Power-Down Sequence
The radio power-up sequence begins when the user actuates the control head's on/off switch. The
control head then produces the switched B+ (SWB+) output voltage which is routed to the command
board. Upon sensing the SWB+ voltage, the command board circuitry powers on the 9.6V and the
SW +5-V regulated supplies. The ASTRO Spectra Plus VOCON board contains two voltage
regulators, a 3-V regulator (U411) and a 1.8-V regulator (U410). The SW+5-V from the command
board is routed to the ASTRO Spectra Plus VOCON board via connector P501, and drives the two
regulators. When SW+5-V increases above 4.2 V and after a delay time chosen by C438, the voltage
detector (U412) disables the power-on reset to the Patriot IC (U300), enabling the device.
When the MCU comes out of reset, it fetches the reset vector in ROM at $FFFE, $FFFF and begins
to execute the code this vector points to. Among other things it enables the correct memory map for
the MCU. It configures all the transceiver devices on the SPI bus. The MCU then pulls the ADDAG
and KRSIC out of reset. It then configures the ADDAG through the SPI bus configuring among other
things, the DSP memory map. While this is happening, the DSP is fetching code from the FLASH
(U301) into internal RAM and beginning to execute it. It then waits for a message from the MCU that
the ADDAG has been configured, before going on.
During this process, the MCU does power diagnostics. These diagnostics include verifying the MCU
system RAM and verifying the data stored in the FLASH ROM. The MCU queries the DSP for proper
status and the results of DSP self tests. The DSP self tests include testing the system RAM and
verifying the program code. Any failures cause the appropriate error codes to be sent to the display.
If everything is OK, the appropriate radio state is configured and the unit waits for user input.
On power-down, the user actuates the radio's on/off switch, removing the SW_B+ signal from the
ASTRO Spectra Plus VOCON board. The host processor, after polling ROW3 (G2) and
acknowledging the signal loss, begins the power-down sequence. Since the host holds the 9.6-V/
5V_EN (enable) line active by controlling the state of the ROW5 / 5_EN line at P501, pin 15, this
does not immediately remove power. The host then saves pertinent radio status data to the external
FLASH (U301). Once this is done, the ROW5 / 5V_EN line is released (brought to logical 1), turning
off 9.6-V and the SW+5-V regulators on the command board. When the SW_+5-V slumps to about
4.2 Vdc, the voltage detector (U412) on the ASTRO Spectra Plus VOCON board activates the
system reset to the Patriot IC (U300). This turns off the host processor.
68P81076C25-C July 1, 2002
Theory of Operation: Voltage Control Oscillator 3-47
3.5 Voltage Control Oscillator
This section of the theory of operation provides a detailed circuit description of voltage control
oscillator (VCO). When reading the Theory of Operation, refer to your appropriate schematic and
component location diagrams located in Chapter 7. Schematics, Component Location Diagrams,
and Parts Lists. This detailed Theory of Operation will help isolate the problem to a particular
component. However, first use the ASTRO Digital Spectra and Digital Spectra Plus Mobile Radios
Basic Service Manual to troubleshoot the problem to a particular board.
3.5.1 VHF Band
3.5.1.1 General
The frequency injection string consists of a voltage-controlled oscillator (VCO) constructed on a
ceramic substrate and amplifier and divider stages located on the PC board. The components
associated with the PC board may be repaired by conventional methods while the VCO substrate
should be replaced as a unit.
3.5.1.2 DC Voltage Supplies
The 9.6-V supply enters the VCO carrier board at P601-2. It powers the receiver amplifier (Q675)
and its associated biasing components. The keyed 9.4-V supply enters the carrier board at J601-5,
but only during the transmit mode. K9.4 powers the divider (Q681), and the buffer amplifiers (Q682,
Q683). The 8.6-V supply enters through P601-12 and passes to MP652, MP653, and MP654 on the
VCO substrate. The 8.6 V supplies the output buffer on the VCO substrate, and supplies Q642 and
0643, the PIN diode drivers.
3.5.1.3 VCO
The VCO utilizes a common-gate FET in a Colpitts configuration as the gain device. The LC tank
circuit's capacitive portion consists of a varactor bank and a laser-trimmed stub capacitor. The
inductive portion consists of microstrip transmission-line resonators. The stub capacitor serves to
tune out build variations. Tuning is performed at the factory and is not field adjustable. The varactor
network changes the oscillator frequency when the DC voltage of the steering line changes. The
microstrip transmission lines are shifted in and out of the tank by PIN diodes for coarse frequency
jumps. The varactor bank consists of CR644 CR645 and L648. The positive steering line connects to
the cathodes of both varactors through L3647, an RF choke. This line is normally between 0.5 and
8.5 Vdc, depending on the frequency programmed in the synthesizer. The negative steering line
connects to the anodes of the varactors through L646 and is normally 3.9 (0.3) Vdc.
Diode CR643, a third varactor tapped into the main transmission line resonator, modulates the
oscillator during transmit. The 8.6 Vdc supplies bias to the cathode. Modulation is coupled to the
anode through C639, R636, C636, and R3637, which also provide filtering and attenuation to the
modulation path.
Components CR646, C668, and R655 provide automatic gain control for the FET. A hot carrier
diode, CR3646, detects the peak RF voltage swings on the source of the FET. A negative voltage,
proportional to the magnitude of the RF voltage swing, is applied to the gate of the FET, thereby
lowering its gain and accomplishing automatic gain control. Typical DC value of the gate bias is -0.8
to -1.7 V, depending on the state of the oscillator.
PIN diodes, CR640, CR641, and CR642, serve to couple secondary transmission lines into and out
of the main oscillator tank, depending on which range the VCO is operating. AUX 1* controls CR642
and CR643; AUX 2* controls CR3640. When AUX 1* goes high, Q643 turns off and a reverse-bias
voltage of about 8.6 Vdc is applied to the PIN diodes to turn them off. When AUX1* goes low, Q643
turns on and a forward-bias current of about 15mA is supplied to the PIN diodes to turn them on. The
other PIN diode driver network operates similarly.
July 1, 2002 68P81076C25-C
3-48 Theory of Operation: Voltage Control Oscillator
The VCO output is coupled through C672 to Q645 to amplify the signal and provide load isolation for
the VCO. The collector voltage of Q645 is normally about 5 Vdc.
3.5.1.4 Synthesizer Feedback
The synthesizer locks the VCO on frequency by the VCO feedback to the prescaler IC on the RF
board. The output of the VCO goes into a low-pass filter consisting of C685, L676, and C687. After it
is filtered, the signal splits into three directions - the majority of which passes to the RX buffer
through a 2db attenuator. A smaller portion of the signal passes through C679 to the divider. Finally,
another small portion of the signal is fed back to the RF board through C676 to P601 -1. Although on
a DC connector, P601 -1 is an RF-sensitive node. To measure the synthesizer feedback power, use
a high-impedance probe, or operate the VCO in an external fixture.
3.5.1.5 RX Buffer Circuitry
After the low-pass filtering state, VCO power is attenuated 2dB by R678, R680, and R679. The RX
buffer is a 50-ohm in-and-out stage that uses L681 and C689 for the input match and C691, L678,
C692, and R699 for the output match. The 9.6 Vdc supplies the RX buffer for a gain of about 10db.
Components R677 and C686 help to filter out some of the 9.6-V supply's noise from the RX buffer.
Transistors Q677, Q678, and associated resistors set the bias level of the RX buffer device, Q675.
The collector voltage and current should be near 6.6 V and 29 mA, respectively. Resistor R682 feeds
the base of 0675 while L677 is used as the collector choke; R681, C690, and C688 are added to
increase stability. The cable from the RX frontend is plugged into J642.
3.5.1.6 Frequency Divider and TX Buffer Circuitry
During transmit, the VCO oscillates at twice the transmit frequency. A frequency-divider circuit
following the VCO buffer divides the VCO's output frequency by two. The circuit is known as a
"regenerative frequency divider" in which a mixer and a feedback amplifier are used to divide the
frequency of the input signal. The divider circuit consists of transformers T601 and T602, diodes
CR601, CR602, amplifier Q681, and the associated bias circuitry. The divider action of this circuit
can be understood by tracing the signal through the circuit as follows: The 300 MHz range signal
from the VCO buffer is fed into the primary of T602. Note that T602, T601, and diodes CR601 and
CR602 form a balanced mixer. (CR601 and CR602 are actually two diodes in one SOT-23 package.)
To analyze the frequency division action of the circuit, it must be assumed that the divided output
frequency of 150 MHz already exists at the secondary of T601. This 150 MHz signal passes through
the low-pass filter consisting of L661, L662, and C651. The 150 MHz signal is now at the input of the
amplifier device, Q681. The amplified 150 MHz signal is now applied back into the balanced mixer by
the center tap of T601. The difference frequency of the two applied signals (300 MHz and 150 MHz)
is 150 MHz, which is half the VCO's frequency. The difference frequency is output through the
secondary of T601 where it had been previously assumed to exist. This completes the feedback
loop.
The 150 MHz signal is tapped off of the emitter resistor of Q681 and is amplified by the buffer stage,
Q682. Transistor Q683 amplifies the signal to 10dBm, which is the level required by the power
amplifier. The signal passes through a low-pass filter before exiting the board through J641.
3.5.2 UHF Band
3.5.2.1 General
The VCO is located on an alumina substrate with a metallic cover. The buffer-doubler-buffer section
is located on the PC board and may be repaired using normal repair methods.
68P81076C25-C July 1, 2002
3.5.2.2 Super Filter 8.6 V
Super-filtered 8.6 V enters the carrier board at J601-12, through an R-C filter, then on to the drain of
Q9610 and the collector of Q9635.
3.5.2.3 VCO
The oscillator consists of Q9610, the main transmission line (T-line), varactor bank (CR9616-9617,
C9616-9617, L9616) and feedback capacitors (C9611-9613). Components CR9610, C9614, and
R9613 form an AGC circuit to prevent breakdown of the FET. Components CR9626 and C9626 form
a bandshift circuit to shift the oscillator frequency up 50 MHz; C9630-9631 and CR9630 form the
Receive shift circuit which shifts the VCO up 50 MHz. The main modulation circuit consists of C9621
and CR9621 in conjunction with the deviation compensating capacitors (C9622 and C9623). Finally,
transistor (Q9635), resistors (R9635-9639), and capacitors (C9635-9636, C9638) form the output
buffer.
This VCO utilizes both a positive and negative steering line. The SL- should be -4.O V (.3 V) at all
times. The SL+ will range from 1 to 8 V, depending on frequency and AUX bits.
3.5.2.4 Receive Mode (AUX2* Low)
When AUX2* input is low, the receive pin diode, CR9630, is forward biased by 8.6-V supply thru
Q5650 and R5652. This current is then sunk into the RF board thru R5654. At this time the voltage
divider output of R5649, R5651, and R5653 will keep Q5651 turned off.
3.5.2.5 Transmit Mode (AUX2* High)
When AUX2* is high (8.4 V), Q5650 will be off and Q5651 will be on. This puts -8 V on the anode of
CR9630 and +8.4 V on its cathode. With approximately 16-V reverse bias on the diode, the receive
bandshift T-line is removed from the circuit.
3.5.2.6 Bandshift Circuit
R9625, C9625, L9628, and C9628 form a bandshift circuit which shifts the frequency of the oscillator
slightly. There is one bandshift in receive and one in transmit. The circuitry works similar to the
receive pin circuitry but with the cathode of CR9626 returned to ground. This results in a maximum of
8-V reverse bias on this diode.
3.5.2.7 Output Buffer
Transistor (Q9635), resistors (R9635-9639), and capacitors (C9635-9636, C9638) form a simple
common-emitter buffer to provide isolation to the VCO and an output power of +10 dBm.
3.5.2.8 First Buffer
The VCO output is coupled to the first buffer via blocking capacitor (C5661), resistive pads (R5661
and R5662), and a high-pass filter (L5660 and C5662). Q5660 is a self-biased, common-emitter
amplifier which provides approximately + 10 dBm drive to the doubler as well as reverse isolation to
the VC0.
July 1, 2002 68P81076C25-C
3.5.2.9 Doubler
The first buffer output is coupled to the input of the doubler by C5663. Q5660 doubles the drive
frequency and increases power by approximately 3 dB as a result of the high and low impedances
presented to its collector at the doubled frequency and drive frequency, respectively. The collector
impedances are presented by an elliptical high-pass filter (C5670-C5674, L5670, and L5671). The
filter is terminated in a resistive pad (R5676-R5678) which also serves to terminate one end of the
elliptical low-pass filter (C5675, C5677, and L5672-L5674). In addition to filtering, the low-pass filter
provides part of the impedance match required between the resistive pad and the second buffer. The
remaining impedance match is accomplished with L5680 and C5680, configured to provide
additional high-pass selectivity.
3.5.2.10 Synthesizer Feedback
The base of Q5680 provides the tap location for the synthesizer feedback buffer. C5685-C5686 and
L5681 provide low-pass filtering. R5630, R5631 and R5632 is a resistive pad. Q5630 provides
approximately -5 dBm to the RF board.
3.5.2.11 Second Buffer
The second buffer, Q5680, is a common-emitter amplifier with approximately 12 dB gain. It is biased
to 40 mA. with an active current source, Q5681 and R5580-R5587, which ensures saturated
operation.
3.5.2.12 Receive/Transmit Switch
In the receive mode where K9.4-V is off, Q5640 conducts current to turn on the part of CR5690 (a
dual-common cathode pin diode) that is in series with the receive path, and the part of CR5691 that
is in shunt with the transmit path. The output of Q5680 is then coupled to a resistive pad
R5697-R5699 which sets the power out of J5642 to approximately +12 dBm.
In the transmit mode, K9.4-V applies 9.4 V to the anode of CR5640, thus turning off Q5640. K9.4-V
is also applied to resistors R5688 and R5694 which turn on the parts of CR5690 and CR5691 that
are in series with the transmit path. The output of Q5680 is then coupled to a resistive pad
(R5689-R5691) which sets the power out of J5641 to approximately +16 dBm.
3.5.3 800 MHz Band
3.5.3.1 General
The VCO is located on an alumina substrate with a metal cover. The buffer-doubler-buffer section is
located on the PC board and may be repaired using normal repair methods.
3.5.3.2 Super Filter 8.6 V
Super filter 8.6 V is applied to the VCO carrier board at J601-12. From there, SF8.6 passes to the
drain of Q9641, to the emitters of Q9643 and Q9644, and to the collector of Q9642.
3.5.3.3 VCO
Q9641, the main and transmit/TalkAround transmission lines, and the varactors CR9641 through
CR9644 form the major circuitry of the oscillator. CR9645, C9648, C9647, and R9641 make up an
automatic gain control (AGC) circuit.
68P81076C25-C July 1, 2002
The positive steering line connects to the cathodes of the four varactors and the negative steering
line connects to the anodes. The negative line should be -4.0 0.3 V and the positive line can go as
high as 9 V, allowing a difference of 15 to 16 V between the two. Normally, at room temperature, the
positive steering line will be between 1.5 and 5.5 V and will fluctuate with temperature change in the
radio. Modulation is connected to the negative steering line via R9651 and C9651.
When the radio is transmitting, the oscillator's frequency will be in the 403 to 412 MHz range. When
receiving, the frequency will be between 370.675 and 379.675 MHz. If the radio is in the TalkAround
mode, the frequency will be between 425.5 and 434.5 MHz. The transmit and TalkAround ranges are
produced by coupling an additional length of transmission line to the main transmission line and is
done by a high or low on the AUX 1* or AUX 2* input lines.
3.5.3.4 Receive Mode-AUX 1* and AUX 2* High
When AUX 1* is HIGH, 8.6 V is applied to the cathode of CR9646. Q9643 is turned off and Q9647 is
turned on placing approximately -6.2 V at the anode of CR9646 reverse biasing it. Likewise with AUX
2* high the same occurs except CR9647 is reversed biased with Q9644 off and Q9646 on. This
isolates the TRANSMIT/TALKAROUND transmission line from the MAIN transmission line.
3.5.3.5 Transmit Mode-AUX 1* High; AUX 2* Low
When AUX 1* is high, the same occurs as mentioned above, however, with AUX 2* low, CR9647 is
forward-biased, connecting the TRANSMIT/TALKAROUND transmission line through C9658 and
C9657 to the MAIN transmission line.
3.5.3.6 TalkAround Mode-AUX 1* Low; AUX 2* Low
With AUX 1* and AUX 2* low, CR9647 and CR9646 are forward-biased, connecting the TRANSMIT/
TALKAROUND transmission line through C9656, C9655, C9657, and C9658 to the MAIN
transmission line.
3.5.3.7 VCO Buffer
Q9642 amplifies and provides reverse isolation to the oscillator. The frequency is then applied to the
buffer-doubler-buffer section of the VCO carrier board.
3.5.3.8 First Buffer Circuit
The VCO output is coupled to the first buffer section through C9677. Q9660 amplifies and provides
additional isolation between the doubler and the VCO.
3.5.3.9 Doubler
The first buffer output is coupled to the doubler section through C9662 and a lowpass input match
circuitry (C9675, L9675, C9676, and L9676), which serves two purposes: it matches the input of the
doubler to 50 ohms, and improves isolation between the VCO and doubler. It also keeps the desired
doubler output frequency from getting to the synthesizer. The synthesizer feedback frequency is via
C9674 and R9669.
Q9675 doubles the frequency applied to its base. The components on the collector are built so that a
400 MHz signal is effectively shorted to ground, while the 800 MHz signal sees high impedance to
ground. The doubler is coupled to the buffer through C9681, and into a 50-ohm matching network
made up of C9683 and L9680.
July 1, 2002 68P81076C25-C
Doubler-biasing differs between receive mode and transmit mode. For receive, R9677, R9678, and
R9676 (in parallel to dissipate power) plus R9679 and R9680 bias the base of Q9675 to 0.7-V
potential, if NO input RF power is applied to the base. For transmit mode, keyed 9.4 V is fed through
CR9694 and another parallel resistor network R9674 and R9675. This raises the current to the
collector of Q9675 via L9678, producing more power out.
3.5.3.10 Second Buffer
The second buffer circuit is Q9676 with a 460 MHz trap, made up of L9682 and C9686, on the
collector. The signal is coupled by series LC network of L9683 and C9687. For the receive mode,
Q9676's gain is approximately 1 to 4 dB; in transmit, its gain is approximately 7 dB.
In receive mode, K9.4-volts is off so that the base voltage of Q9692 is controlled by voltage divider,
R9694 an R9695. With temperature changes, the emitter-base junction of Q9691 tracks that of
Q9692's, stabilizing the collector current and collector voltage of Q9676. R9690, R9691, and R9692
set the current level to the collector of Q9676 in receive.
In transmit mode, K9.4-volts is applied to CR9693 and through R9697, R9699, and R9693,
increasing the current flow to Q9676. K9.4-volts on the anode of CR9690 increases the voltage on
the base of Q9692. This increases voltage at Q9692's emitter and Q9676's collector. In the transmit
mode, the buffer draws approximately 60 mA.
3.5.3.11 K9.4 V Switch
In the receive mode, K9.4-volts is off. CR9691 is reverse-biased, CR9692 is forward-biased;
therefore Q9693 conducts to produce 9.4 V on the collector. This forward-biases CR9678 and
CR9677, allowing RF to pass through C9688. R9687, R9688, and R9689 drop the 12 dBm signal on
the anode of CR9678 down to 0 to 5 dBm. This is the receiver injection signal which is applied to the
first mixer in the front end of the radio.
In the transmit mode, K9.4-volts is on. Q9693 turns off, reverse biasing CR9678 and CR9677.
However, CR9675 and CR9676 are forward-biased, allowing the RF signal to pass through C9689.
The signal (approximately 20 dBm) at the junction of CR9675 and CR9677, is attenuated about 1 dB
across the diodes. The transmit signal, at approximately 18 to 23 dBm, is applied to the power
amplifier via C9689.
68P81076C25-C July 1, 2002
Theory of Operation: Receiver Front-End 3-53
3.6 Receiver Front-End
This section of the theory of operation provides a detailed circuit description of receiver front-end
(RXFE). When reading the Theory of Operation, refer to your appropriate schematic and component
location diagrams located in Chapter 7. Schematics, Component Location Diagrams, and Parts
Lists. This detailed Theory of Operation will help isolate the problem to a particular component.
However, first use the ASTRO Digital Spectra and Digital Spectra Plus Mobile Radios Basic Service
Manual to troubleshoot the problem to a particular board.
3.6.1 VHF Band
3.6.1.1 General
The Receiver Front-End (RXFE) performs the first conversion of the received signal. The inbound
signal is mixed with the high side injection signal, to produce the 109.65 MHz first IF. The pre-amp/
mixer configuration of the RXFE includes a preamplifier, a factory-tuned, 5-pole L.C. preselector
unique for two ranges, a fixed injection filter, and a double balanced mixer.
3.6.1.2 Theory of Operation
The RF input from the PA first enters the high pass filter consisting of components L3200, L3201,
L3202, C3200, C3201, C3209, and C3210. The high pass filter attenuates signals below the receiver
passband for both RF frequency ranges.
A pair of Schottky diodes (CR3200) located before the high pass filter and after the 5-pole L.C.
preselector, limit the signal amplitude going into the preamplifier. A second pair of Schottky diodes
(CR3201) located after the 5-pole L.C. preselector, further provide signal protection to the mixer.
The RF board supplies DC voltage to the pre-amp. Transistors Q3200 and Q3201 stabilize the bias
for pre-amp device Q3202 through temperature changes. R3206, R3200, R3210, R3208, and R3209
are adjusted to meet radio performance specifications for High or Low sensitivity.
The factory-tuned preselector filter accepts RF input frequencies ranging from 136-162 MHz (Range
1) or 146-174 MHz (Range 2). L3100, L3101, L3102, L3103, L3104 comprise the set of inductors
which are tuned by the factory.
The double-balanced mixer has an injection level of +20 dBm, common for both ranges; at its output,
a diplexer helps terminate the IF port at all frequencies of interest, and forms the bandpass filter.
From the pre-amp input to the IF output, there should be a conversion gain of -1.5 to +3.5 dB for high
sensitivity, and +7.0 to +10 dB for low sensitivity specifications.
3.6.2 UHF Band
3.6.2.1 General
The receiver ceramic filter has a typical insertion loss of about 0.5 to 1.5 dB; it should not have a loss
greater than 2.0 dB. If any soldering must be done on the filter, be very careful not to get any solder
on the filter tuning pads.
The injection filter is a printed pattern on the substrate which is laser-tuned at the factory. The
insertion loss of this filter is about 3 dB.
July 1, 2002 68P81076C25-C
3-54 Theory of Operation: Receiver Front-End
The factory-tuned ceramic preselector filter accommodates RF input frequencies ranging from 438 to
470 MHz (Range 2), 450 to 482 MHz (Range 3), or 482 to 512 MHz (Range 4). The injection filter is
tuned to pass frequencies from 549 to 580 MHz for Range 2, 559 to 592 MHz for Range 3, or 592 to
622 MHz for Range 4. Each frequency is connected at a node just before C9138 via a transmission
line which acts as a high impedance input to the other frequency.
The RF board supplies DC voltage to bias the mixer Q125. Transistor Q126 controls the voltage to
the base of Q125. The voltage at the collector of Q125 should be approximately 10 V.
3.6.3 800 MHz Band
3.6.3.1 General
The receiver ceramic filter has a typical insertion loss of about 1.6 to 1.7 dB; it should not have a loss
greater than 2.5 dB. If any soldering must be done on the filter, be very careful not to get any solder
on the filter tuning pads.
The injection filter is a printed pattern on the substrate which is laser-tuned at the factory. The
insertion loss of this filter is about 3 dB.
The factory-tuned ceramic prescaler filter accommodates RF input frequencies ranging from 851 to
870 MHz. The injection filter is tuned to pass frequencies from 741 to 760 MHz. Each frequency is
connected at a node just before C8126 via a transmission line which acts as a high impedance input
to the other frequency.
DC voltage, supplied from the RF board, biases the mixer Q8126. Transistors Q8127 and Q8128
control the voltage to the base of Q8126. Q8128 acts as a diode to maintain a voltage on the base of
Q8127, which keeps the bias of Q8126 stable through temperature changes. The voltage for the
collector of Q8126, which passes through R8128, L8131, and L8130 should be approximately 8
volts.
C8129, L8129, C8131, and L8130 form the output network for the mixer. C8131 is a large capacitor
that appears as a short to all frequencies of interest. The remaining components form a bandpass
filter centered at the IF frequency.
R8130, R8129, and R8131 form an attenuator on the output path to stabilize both the mixer output
impedance and the source impedance for the IF amplifier.
From the input to the ceramic filter to the IF output, there should be an 8 dB power gain presented to
the IF. If the beta of Q8126 falls below 60, the mixer (Q8126) is probably bad and must be replaced.
68P81076C25-C July 1, 2002
Theory of Operation: Power Amplifiers 3-55
3.7 Power Amplifiers
This section of the theory of operation provides a detailed circuit description of the power amolifiers.
When reading the Theory of Operation, refer to your appropriate schematic and component location
diagrams located in Chapter 7. Schematics, Component Location Diagrams, and Parts Lists. This
detailed Theory of Operation will help isolate the problem to a particular component. However, first
use the ASTRO Digital Spectra and Digital Spectra Plus Mobile Radios Basic Service Manual to
troubleshoot the problem to a particular board.
3.7.1 VHF Band Power Amplifiers
3.7.1.1 High-Power Amplifier
3.7.1.1.1 Transmitter
The high-power ASTRO Spectra amplifier is discussed in the following text. A block diagram of the
circuit is shown on the foldout drawing.
Transmit Low Level Amplifier (LLA)
The LLA is the first stage of the PA and provides a gain that is a function of the control voltage. This
control voltage comes from the Regulator Power Control IC (RPCIC) on the command board. The
magnitude of the control voltage depends on PA output power, temperature, and final amplifier
current drain. See Section 3.7.1.1.3, "Power Control Circuitry," on page 3-57 for a detailed
explanation of the power control circuitry.
The LLA, Q3801, is unique in that its gain is controlled by varying the collector's current rather than
its voltage. Q3801 and associated circuitry (Q3806 Q3802, R3804, and R3818) are best described
as a voltage-controlled current source. This means that the collector current of Q3801 is controlled
by the magnitude of the control voltage.
Second Amplifier Stage
The second stage of the PA, Q3804, amplifies the output of the LLA to a level sufficient to drive the
third stage device, Q3805. Q3804 amplifies the LLA output from approximately 300 mW to 3.0 Watts.
Driver Stage (Q3805)
The third stage uses a 3.0-Watt input to 30-Watt output device. It is driven by the second stage
through a matching circuit that consists of C3824, L3808, C3819, and C3820. L3812 and L3809 give
the device a zero-Vdc base bias (required for Class-C operation). The network of L3811, L3810,
R3819, and C3821 provide A+ to the collector.
Final Stage (Q3870 AND Q3871)
The final amplifier stage is the parallel combination of two 15-Watt input to 75-Watt output RF
transistors. The matching network, from the collector of the driver device Q3805 to the bases of the
final devices Q3870 and Q3871, utilizes transmission lines as part of a combination matching
network and power splitter. The capacitors C3860, C3861, C3862, and C3863 are on the bottom
side of the PC board underneath the base leads of Q3870 and Q3871.
The DC bias path for the base of Q3870 is via L3930 and L3931. Q3871 has a similar network.
R4007, R4008, and R3859 improve division of driver power between the final devices Q3870 and
Q3871.
A feedback network consisting of C3870, R3870, and L3870 suppresses parasitic oscillations in
Q3870. Q3871 has a similar network.
July 1, 2002 68P81076C25-C
3-56 Theory of Operation: Power Amplifiers
The final stage output network serves the dual purpose of impedance matching and power
combining of the two final devices. R3872 and R3873 help balance the load impedances presented
to the collectors of the final devices. Filtered A+ is routed to the final amplifier devices via the current
sense resistor R3841, the ferrite bead L3881, and the coil L3880. The final stage output network
terminates at C3889, which is the input to the antenna switch. The circuit impedance is 50 ohms at
this point.
3.7.1.1.2 Antenna Switch and Harmonic Filter
Antenna Switch
The antenna switch utilizes PIN diodes to form a low loss, high isolation RF relay. During transmit,
PIN diodes CR3901, CR3902, and CR3903 are forward biased during transmit via the K9.4 supply
and resistors R3900, R3901, R3902, and R3903. In this state, a low loss path exists from the final
amplifier through PIN diode CR3901 and into the harmonic filter. PIN diodes CR3902, and CR3903
effectively shunt the path to the receiver front-end which protects the preamp or mixer device from
excessive RF levels. A properly functioning switch will pass less than 10 mW of transmit power to the
receiver front-end.
During receive, all three PIN diodes remain unbiased. This opens a low loss path from the harmonic
filter to the receiver.
Harmonic Filter
The harmonic filter is a 7-pole low-pass filter consisting of screened plate capacitors and air-wound
coils on a 0.035 inch thick ceramic substrate. The filter's primary function is to.attenuate harmonic
energy generated by the amplifier stages. The filter also adds some selectivity for the receiver.
68P81076C25-C July 1, 2002
3.7.1.1.3 Power Control Circuitry
Command Board Circuitry
Inside U500, the Regulator Power Control IC (see Figure 3-20) is an operational amplifier that has
four inverting inputs, and one non-inverting input (at pin 44) which is the reference input for the entire
power control loop of the power amplifier. The 3.2-V reference voltage at U500-44 is produced by
dividing SW +5-V with the voltage-divider circuit, R514 and R515.
Figure 3-20. RPCIC Block Diagram
The power control loop is controlled by the microprocessor U204 on the VOCON board. Through the
SLIC IC U206, the microprocessor enables the RPCIC by pulling TX PA ENABLE (U500 pin 33) low
while the radio synthesizer is locked (U500 pin 35). U520 writes data to a digital-to-analog converter,
U502, to change and control the power-set voltage from pin 10 of U502 to pin 6 of U500. The voltage
on this line, 1.5 to 5 V, will be inversely proportional to the power out of the PA, with 5 V producing
the lowest power output. This voltage may be set with RSS (Radio Service Software) or CPS
(Customer Programming Software). On U500, the voltage at pin 6 is buffered internally and exits on
pin 7. Through R507, it is connected to pin 2 of U500. Note that pin 2 of U500 is the summing point
of three voltages: forward detect voltage, power set voltage, and temp-sense.
N.C.
A+
TX P.A. ENABLE
LOCK
CURRENT SENSE +
FROM R9875
CURRENT SENSE
FROM R9875
KEYED 9.4V INPUT
9
.
6
V

D
R
I
V
E
U
N
S
W

5
V

R
E
F
9.6V SENSE INPUT
5V DRIVE TO Q502
5V CURRENT SENSE
5V FEEDBACK
TEMPERATURE SENSE
INPUT
TEMPERATURE SENSE
OUTPUT TO 500-2
POWER SET FROM
U502 1.5V 5 VOLTS
FORWARD DET.
VOLTAGE
POWER SET OUT TO
PIN 2 VIA R507
T
X

C
U
R
R
E
N
T
L
I
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I
T

F
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U
5
0
2
-
1
5C
O
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.
A
M
P
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R
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F
.
3
.
2
V
5V
C
O
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T
.
A
M
P

I
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O
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A
G
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C
O
N
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R
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L
I
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I
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P
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E
R
S
E
T
N.C.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
REGULATOR
GROUND
13.8V
9.6 VOLT
REGULATOR
PA ENABLE
ONE-
SHOT
WIDE-BAND
ENABLE
CONTROL AMP
CURRENT SENSE
AMP
CURRENT
LIMIT SET
BUFFER
POWER CONTROL
GROUND
PACKAGE FLAG
GROUND POWER SET
BUFFER
DIRECTIONAL
COUPLER BUFFER
THERMISTER
BUFFER
5V REGULATOR
PACKAGE
GROUND
U500
29
30
31
32
33
34
35
36
37
38
39
28 27 26 25 24 23 22 21 20 19 18
17
16
15
14
13
12
11
10
9
8
7
6 4 3 2 1 44 43 42 40 41 5
+
+
+
Q +
+
+
+ +
Q538
RPCIC ENABLE
FORWARD BUFFERED
OUT
TO PIN 10
U502 DAIC
R516
100K
R509
68K
R507
47K
R508
68K
RESISTIVE
SUMMING
NETWORK
REGULATOR/POWER CONTROL IC U500
MAEPF-22034-O
July 1, 2002 68P81076C25-C
Control Voltage Limiter
R3807 and R3808 form a voltage divider that connects to control voltage drive. The output of this
voltage divider is connected to the control-voltage-limit input (pin 4) of the RPCIC. If the voltage at
this input reaches 3.2 V, then the control voltage will be clamped to a maximum value. For the
high-power VHF PA, this maximum value is 9 V. This voltage control limit is set by the values of
R3807 and R3808.
Current Limiter
U204, the processor on the VOCON board, sends data to U502, the digital-to-analog converter, to
properly set the voltage on U502, pin 15, which is the TX CURRENT LIMIT control line to the RPCIC
(U500, pin 40). Sixteen different voltages, ranging from 1.5 to 4.5 V, can be programmed from U502.
The collector current of the 110-Watt amplifier is monitored by sensing the voltage across R3849.
CURRENT SENSE + connects to one end of R3849; CURRENT SENSE - connects to the other end.
These lines connect to the command board on U500 pins 37 and 38, respectively. If the TX
CURRENT LIMIT is set for 1.5 V, then the voltage difference between U500 pins 37 and 38 must be
0.1 V before the current through R3849 is reduced. If U500 pin 40 is programmed for 4.5 V, then the
difference of potential between pins 37 and 38 must exceed 0.3 V before current limiting begins. The
voltage across R3849, where current sense occurs, can be determined by multiplying the voltage on
U500 pin 40, by 0.067. When current is being limited, the output of the op-amp (U500, pin 42) begins
shutting down the conduction of Q503 and Q504, reducing PA control voltage, and reducing drive to
the final amplifier to, effectively, control the final amplifier's maximum current.
Forward Power Limiter
After the harmonic filter a parallel pair of microstrip lines form a forward power sensing directional
coupler and detector. The output of this directional coupler/detector is a DC voltage that is
proportional to the forward RF power from the final amplifier. During normal transmission, the DC
voltage from the forward detect line to the RPCIC ranges from 2 to 5.0 V. This voltage connects to
U500 pin 9, the directional coupler buffer input.
The directional coupler's buffered output, U500 pin 8, is summed to pin 2 with the digital/analog
buffer's output through R509 and R507, respectively. In typical operation, the closed loop operation
of the circuit attempts to keep the voltage at U500 pin 2 a constant value of 3.2 V. The control amp
will maintain this condition by increasing or decreasing the control amp output voltage. This control
amp output voltage is routed to the LLA via transistors Q503 and Q504. The output of Q504 is
designated "control voltage drive" and is routed to J1 pin 2 of the PA board.
Since control voltage drive controls the gain of the LLA, it determines the drive level to the following
stages and thus the output power of the final amplifier. The output power of the final stage is
detected by the directional coupler and is routed back to U500 pin 2 via the buffer and R507. Thus
the loop is complete and forward power is maintained a constant value. The voltage at pin 2 will drop
below 3.2 V during low line voltage conditions where the PA cannot produce rated power. Current
limit and voltage control limit circuits will also affect the voltage at pin 2 as described in the following.
68P81076C25-C July 1, 2002
Temperature Sensing
The temperature-sensing circuit of the PA works with the RPCIC to protect the PA devices from
excessively high temperatures. On the PA board, this circuit (formed by resistors R3916, R3841, and
thermistor RT3842), provides a temperature dependent voltage to the RPCIC via J1 pin 6. As the PA
temperature increases, the resistance of RT3842 decreases, causing the voltage at pin 6 to
increase. This voltage is routed to the RPCIC, U500 pin 13, which is the input to the thermistor
buffer. The buffer's output on pin 12 is connected to pin 2 via resistor R508. Note that pin 2 is the
control amp input and is a summing point for temperature, forward-power detect, and power set
signals. If the PA temperature becomes high enough so that the voltage at pin 7 exceeds 3.2 V, the
thermistor buffer starts supplying current to the node at pin 2. Due to the fixed output current of the
power-set buffer, the control loop can maintain 3.2 V at pin 2 only by reducing the forward-power
detect voltage and, therefore, reducing the PA output power. Since power output is reduced, the
generated heat is reduced to a safe level. If temperature decreases, the power output of the PA
gradually increases to its nominal value.
NOTE: Under severe environmental conditions, more than one circuit may be attempting to reduce
power output at the same time (i.e., during high VSWR conditions, the current limiter may
initially reduce power, but eventual heat buildup will cause further power reduction by the
thermal cut-back circuit).
The temperature sense circuitry can easily be tested by placing an ordinary leaded 4.7k ohm
resistor across RT3842. PA output power should drop significantly if this circuit is working
properly.
3.7.1.2 25/10-Watt Power Amplifier
Transmitter
The 25/10-Watt Spectra power amplifier is discussed in the following text.
NOTE: The minimum input drive level to the PA into J3850 is 10 mW. Refer to the synthesizer section
if input drive is less than 10 mW.
The Low Level Amplifier, the first stage of the PA, provides a gain that is a function of a control
voltage. This control voltage comes from the Regulator Power Control IC (RPCIC) on the command
board. The magnitude of the control voltage depends on PA output power, temperature, and final
amplifier current drain.
its voltage. Q3801 and associated circuitry (Q3806, Q3802, R3804, and R3818) are best described
by the magnitude of the control voltage. Proper operation of the LLA can be checked by monitoring
the voltage across the resistor R3804. The voltage should measure in the range of 0.1 V to
1.0 V, depending on the value of control voltage. A 0.1-V reading corresponds to a low control
voltage (1 to 5 V) and a 1.0 V reading corresponds to a high control voltage (up to control voltage
limit).
Driver Stage
The second stage of the PA, Q3804, is the driver. The purpose of this stage is to amplify the output of
the LLA to a level sufficient to drive the final device, Q3850. Input power to this stage is
approximately 100 mw; output power from this stage is 3.5 Watts.
July 1, 2002 68P81076C25-C
Final Stage
The final device is a 3- to 33-Watt device and is driven by the driver through a low-pass matching
circuit that consists of C3815, C3816, C3817, L3811, C3819, C3821, C3822, C3823 and associated
transmission lines. Base network, L3852, L3851, and R3815, R3819 provide the zero-DC bias
required by the final device's Class-C operation. L3852 and L3851 provide the DC path from base to
ground. R3815 and R3819 help lower the network's Q at low frequencies. The collector DC network
consists of L3875, L3876, R3876, R3877, C3880, C3885, C3881, C3882, and CR3875. This network
provides the A+ voltage to the final while blocking RF from getting up the DC line. L3875 and L3876
provide the DC path and block RF. R3876 and R3877 resistively load down the final's collector at low
frequencies and prevent unwanted oscillations. C3881, C3882, C3880, and C3885 are all bypass
capacitors ranging from very low frequencies up to VHF frequencies. R3875 is the current-sense
resistor. CR3875 protects against reverse polarity. Finally, the RF signal goes through a low-pass
matching network (C3875, C3877, C3878, C3879, L3877, and associated transmission lines) to the
rest of the output network (Directional Coupler, Antenna Switch, and Harmonic Filter).
Antenna Switch
The antenna switch's impedance inverter circuit, made up of C3920 and L3920, takes the place of a
quarter-wave microstrip line. During transmission, Keyed 9.4 V forward-biases CR3921, producing
low impedance on CR3921's anode and high impedance on the C3920/L3920 node. Effectively, this
isolates the transmitted power from the receiver. C3910 couples the power to the harmonic filter and
on to the antenna.
Total TX to RX isolation exceeds 50 dB from 136-174 MHz. The impedance inverter contributes
approximately 30 db to transmit isolation. A second shunt switch, made up of CR3922, L3921,
C3922, and C3921, provide additional isolation. C3926 and C3923 block DC.
During RX, CR3920 has an OFF capacitance of approximately 1 pF. CR3921 and CR3922,
incorporated in the RX match, have similar OFF capacitance.
Harmonic Filter
The 25/10-Watt harmonic filter is a 7-pole, low-pass filter, consisting of high-Q chip capacitors
(C3911, C3913, C3912, and C3914) and discrete inductors (L3911, L3912, and L3913). The filter's
primary function is to attenuate harmonic spurs generated by the transmitter. It also adds low-pass
selectivity for the receiver. L3914 protects the PA from static discharge.
Inside U500, the Regulator Power Control IC (see Figure 3-21), is an operational amplifier that has
four inverting inputs, and one non-inverting input (at pin 44) which is the reference input for the entire
68P81076C25-C July 1, 2002
(Customer Programming Software).
Figure 3-21. Regulator/Power Control IC Block Diagram
voltage divider is connected to the control-voltage-limit input ( pin 4) of the RPCIC. If the voltage at
25/10-Watt VHF PA, this maximum value is 9.2 V. This voltage-control limit is set by the values of
R3813 and R3814.
Current Limiter
N.C.
A+
TX P.A. ENABLE
LOCK
CURRENT SENSE +
FROM R9875
CURRENT SENSE
FROM R9875
KEYED 9.4V INPUT
9
.
6
V

D
R
I
V
E
U
N
S
W

5
V

R
E
F
9.6V SENSE INPUT
5V DRIVE TO Q502
5V CURRENT SENSE
5V FEEDBACK
TEMPERATURE SENSE
INPUT
TEMPERATURE SENSE
OUTPUT TO 500-2
POWER SET FROM
U502 1.5V 5 VOLTS
FORWARD DET.
VOLTAGE
POWER SET OUT TO
PIN 2 VIA R507
T
X

C
U
R
R
E
N
T
L
I
M
I
T

F
R
O
M
U
5
0
2
-
1
5C
O
N
T
.
A
M
P
O
U
T
R
E
F
.
3
.
2
V
5V
C
O
N
T
.
A
M
P

I
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A
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C
O
N
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R
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L
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I
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T
N.C.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
REGULATOR
GROUND
13.8V
9.6 VOLT
REGULATOR
PA ENABLE
ONE-
SHOT
WIDE-BAND
ENABLE
CONTROL AMP
CURRENT SENSE
AMP
CURRENT
LIMIT SET
BUFFER
POWER CONTROL
GROUND
PACKAGE FLAG
GROUND POWER SET
BUFFER
DIRECTIONAL
COUPLER BUFFER
THERMISTER
BUFFER
5V REGULATOR
PACKAGE
GROUND
U500
29
30
31
32
33
34
35
36
37
38
39
28 27 26 25 24 23 22 21 20 19 18
17
16
15
14
13
12
11
10
9
8
7
6 4 3 2 1 44 43 42 40 41 5
+
+
+
Q +
+
+
+ +
Q538
RPCIC ENABLE
FORWARD BUFFERED
OUT
TO PIN 10
U502 DAIC
R516
100K
R509
68K
R507
47K
R508
68K
RESISTIVE
SUMMING
NETWORK
MAEPF-22034-O
July 1, 2002 68P81076C25-C
The collector currents of the 25/10-Watt amplifier is monitored by sensing the voltage across R3875.
These lines connect to the command board on U500, Pins 37 and 38, respectively. If the TX
CURRENT LIMIT is set for 1.5 V, then the voltage difference between U500, Pins 37 and 38 must be
0. 1 V before the current through R3875 is reduced. If U500, pin 40 is programmed for
4.5 V, then the difference of potential between Pins 37 and 38 must exceed 0.3 V before current
limiting begins. The voltage across R3875, where current sense occurs, can be determined by
multiplying the voltage on U500, pin 40, by 0.067. When current is being limited, the output of the
op-amp (U500, pin 42) begins shutting down the conduction of Q503 and Q504, reducing PA control
voltage, and reducing drive to the final amplifier to control the final amplifier's maximum current.
After the final amplifier, a parallel pair of non-symmetrical microstrip lines form a forward
power-sensing directional coupler. Because of increased coupling with frequency, C3902 is used to
compensate and filter out harmonics. R3905, R3906, C3903, and L3903 provide DC bias to
CR3900, which rectifies the signal. During normal transmission, the DC voltage from the
forward-detect line to the RPCIC ranges from 1.5 to 5.0 V. This voltage connects to U500, pin 9, the
directional coupler buffer input.
The directional coupler's output, U500 pin 8, is summed to pin 2 with the digital/analog buffer's
output through R509 and R507, respectively.
Closed loop operation reduces the control amp's output ( pin 42), reduces the power amplifier's gain,
and reduces power output to maintain the coupler buffer output (U500, pin 2) at 3.2 V regardless of
the D/A voltage level. If the D/A voltage is high (4.5 V), little detected voltage is needed to keep pin 2
at 3.2 V, and the power, consequently, is low. If the D/A voltage is low (1.5 V), a large forward
detected voltage is needed to keep pin 2 at 3.2 V and power, consequently, is at maximum value.
The voltage at pin 2 drops below 3.2 V under proper operation during low line voltage conditions
where the PA cannot produce rated power, or if, under any conditions, the control voltage, or the final
device current exceeds safe levels.
Temperature Sensing
excessively high temperatures. On the PA board, this circuit, formed by resistors R3878, R3879, and
thermistor RT3876, provides a temperature-dependent voltage to the RPCIC via P0853, pin 7. As
the PA temperature increases, the resistance of RT3876 decreases, causing the voltage at pin 7 to
increase. This voltage is routed to the RPCIC, U500, pin 13, which is the input to the thermistor
gradually increases to its nominal value. Temperature cutback should occur at about 140F (60C).
The temperature sense circuitry can easily be tested by placing an ordinary leaded 4.7k ohm resistor
across RT3876. PA output power should drop significantly if this circuit is working properly.
NOTE: Under severe environmental conditions, more than one circuit may he attempting to reduce
68P81076C25-C July 1, 2002
3.7.1.3 50-Watt Power Amplifiers
The 50-Watt ASTRO Spectra power amplifiers (PA's) are discussed in the following text. A block
diagram of the circuit is shown in Figure 3-22.
Figure 3-22. 50-Watt Power Amplifier Block Diagram
NOTE: The minimum input drive level to the PA into J3850 is 10 mW. Refer to the synthesizer section
The LLA, the first stage of the of the PA, provides a gain that is a function of a control voltage. This
current drain.
its voltage. Transistor Q3801 and associated circuitry (Q3806, Q3802, R3804, and R3818) are best
described as a voltage-controlled current source. This means that the collector current of Q3801 is
controlled by the magnitude of the control voltage. Proper operation of the LLA can be checked by
monitoring the voltage across the resistor R3804. The voltage should measure in the range of
0.1 V to 1.0 V, depending on the value of control voltage. A 0.1-V reading corresponds to a low
control voltage (1 to 5 V) and a 1.0-V reading corresponds to a high control voltage (up to control
voltage limit).
Predriver Stage
The second stage of the PA, Q3804, is the predriver. The purpose of this stage is to amplify the
output of the LLA to a level sufficient to drive the driver device, Q3850. Input power to this stage is
approximately 100 mW; output power from this stage is 1.0 Watt.
Driver Stage
The driver is a 1.2- to 15-Watt device. It is driven by the predriver device through a matching circuit
that consists of C3815, C3816, C3817, C3818, and L3811. A ferrite bead L3810, and a parallel
resistor, R3815, give the driver a zero-DC bias required for the driver's Class C operation, and
provides a low Q network to prevent unwanted oscillations. The network of L3851, L3854, C3858,
C3856, C3855, and R3850 provide A+ to the collector. L3851 and L3854 provide the DC path and
block RF from coming up the DC line. R3850 resistively loads down the collector at low frequencies,
preventing unwanted oscillations. C3856, C3855, C3858, and C3855 are bypass capacitors.
E3850
MALE SMB/
TAIKO DENKI
10 mW
Q3801
82D50
TX INJECTION
PREDRIVER DRIVER
FINAL
AMPLIFIER
DIRECTIONAL
COUPLER
P.I.N. SWITCH HARMONIC FILTER
ANTENNA 100 mW 1 W 12 W 65 W
CONTROL
VOLTS K9.4
9.6V
Q3804
M9859
Q3850
25C28
Q3875
11L04
A+
A+
CURRENT
SENSE
TEMP
SENSE
DET
VOLTAGE
K9.4
55 W
E3852
RECEIVE
E3851
MINI UHF
CONTROLLED
TX BUFFER
MALE SMB/
TAIKO DENKI
July 1, 2002 68P81076C25-C
Final Stage
The final device is a 12- to 75-Watt device and is driven by the driver through a low pass matching
circuit that consists of C3850 through C3854 and associated transmission lines. Base network,
L3852, L3853, and R3851, provide the zero-DC bias required by the final device's Class C operation.
L3852 and L3851 provide the DC path from base to ground. R3851 helps lower the network's Q at
low frequencies. The collector DC network consists of L3875, L3876, R3876, C3880, C3885, C3881,
C3882, and CR3875. This network provides the A+ voltage to the final stage while blocking RF from
getting up the DC line. L3875 and L3876 provide the DC path and block RF. R3850 resistively loads
down the final stage's collector at low frequencies and prevents unwanted oscillations. C3881,
C3882, C3880, and C3885 are all bypass capacitors ranging from very low frequencies up to VHF
frequencies. R3875 is the current sense resistor. CR3875 protects against reverse polarity. Finally,
the RF signal goes through a low pass matching network (C3875, C3876, C3877, C3878, C3879,
L3877, and associated transmission lines) to the rest of the output network (directional coupler,
antennal switch, and harmonic filter).
Antenna Switch
The antenna switches impedance inverter circuit, made up of C3920 and L3920, takes the place of a
quarter-wave microstrip line. During transmission, keyed 9.4 V forward biases CR3921, producing a
low impedance on CR3921's anode and a high impedance on the C3920/L3920 node. Effectively,
this isolates the transmitted power from the receiver. C3910 couples the power to the harmonic filter
and on to the antenna.
Total TX to RX isolation exceeds 55dB from 136-174MHz. The impedance inverter contributes
approximately 35dB to transmit isolation. A second shunt switch made up of CR3922, L3921 and
C3921, provide additional isolation. Capacitors C3922 and C3923 block DC.
During RX, CR3920 has an OFF capacitance of approximately 1 pF. CR3921 and CR3922
incorporated in the RX match have a similar OFF capacitance.
Harmonic Filter
The 50-Watt harmonic filter is a 7-pole, low-pass filter, consisting of high Q chip capacitors (C3911
thru C3914) and discrete inductors (L3911 thru L3913). The filter's primary function is to attenuate
harmonic spurs generated by the transmitter, It also adds low-pass selectivity for the receiver. L3914
protects the PA from static discharge.
68P81076C25-C July 1, 2002
Inside U500, the Regulator Power Control IC (Figure 3-23), is an operational amplifier that has four
inverting inputs, and non-inverting input at pin 44 which is the reference input for the entire power
control loop of the power amplifier. The 3.2-V reference voltage at U500-44 is produced by dividing
SW +5-V with the voltage-divider circuit, R514 and R515.
Figure 3-23. Regulator/Power Control IC Block Diagram
N.C.
A+
TX P.A. ENABLE
LOCK
CURRENT SENSE +
FROM R9875
CURRENT SENSE
FROM R9875
KEYED 9.4V INPUT
9
.
6
V

D
R
I
V
E
U
N
S
W

5
V

R
E
F
9.6V SENSE INPUT
5V DRIVE TO Q502
5V CURRENT SENSE
5V FEEDBACK
TEMPERATURE SENSE
INPUT
TEMPERATURE SENSE
OUTPUT TO 500-2
POWER SET FROM
U502 1.5V 5 VOLTS
FORWARD DET.
VOLTAGE
POWER SET OUT TO
PIN 2 VIA R507
T
X

C
U
R
R
E
N
T
L
I
M
I
T

F
R
O
M
U
5
0
2
-
1
5C
O
N
T
.
A
M
P
O
U
T
R
E
F
.
3
.
2
V
5V
C
O
N
T
.
A
M
P

I
N
V
O
L
T
A
G
E
C
O
N
T
R
O
L
L
I
M
I
T
P
O
W
E
R
S
E
T
N.C.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
REGULATOR
GROUND
13.8V
9.6 VOLT
REGULATOR
PA ENABLE
ONE-
SHOT
WIDE-BAND
ENABLE
CONTROL AMP
CURRENT SENSE
AMP
CURRENT
LIMIT SET
BUFFER
POWER CONTROL
GROUND
PACKAGE FLAG
GROUND POWER SET
BUFFER
DIRECTIONAL
COUPLER BUFFER
THERMISTER
BUFFER
5V REGULATOR
PACKAGE
GROUND
U500
29
30
31
32
33
34
35
36
37
38
39
28 27 26 25 24 23 22 21 20 19 18
17
16
15
14
13
12
11
10
9
8
7
6 4 3 2 1 44 43 42 40 41 5
+
+
+
Q +
+
+
+ +
Q538
RPCIC ENABLE
FORWARD BUFFERED
OUT
TO PIN 10
U502 DAIC
R516
100K
R509
68K
R507
47K
R508
68K
RESISTIVE
SUMMING
NETWORK
MAEPF-22034-O
July 1, 2002 68P81076C25-C
voltage divider is connected to the control-voltage-limit input, pin 4 of the RPCIC. If the voltage at this
input reaches 3.2 V, then the control voltage will be clamped to a maximum value. For the 50-Watt
VHF PA, this maximum value is 8 V. This voltage control limit is set by the values of R3807 and
R3808.
Current Limiter
properly set the voltage on U502, pin 15, which is the TX CURRENT LIMIT control line to the RPCIC,
U500, pin 40. Sixteen different voltages, ranging from 1.5 to 4.5 V, can be programmed from U502.
The collector current of the amplifier is monitored by sensing the voltage across R3875; CURRENT
SENSE + connects to one end of R3875; CURRENT SENSE - connects to the other end. These
lines connect to the command board on U500, pins 37 and 38 respectively. If the TX CURRENT
LIMIT is set for 1.5 V, then the voltage difference between U500, pins 37 and 38 must be
0.1 V before the current through R3875 is reduced. If U500, pin 40 is programmed for 4.5 V, then the
difference of potential between pins 37 and 38 must exceed 0.3 V before current limiting begins, The
U500, pin 40, by 0.067 V. When current is being limited, the output of the operational amplifier, U500,
pin 42 begins shutting down the conduction of Q503 and Q504, reducing PA control voltage, and
reducing drive to the final amplifier to effectively control the final amplifier's maximum current.
After the final amplifier, a parallel pair of non-symmetrical microstrip lines form a forward
power-sensing directional coupler. Because of increased coupling with frequency, C3902 is used to
compensate and filter out harmonics. R3905, R3906, C3902, and L3903 provide DC bias to
CR3900, which rectifies the signal. During normal transmission, the DC voltage from the
forward-detect line to the RPCIC ranges from 2 to 4.5 V. This voltage connects to U500, pin 9, the
output through R509 and R507 respectively.
Closed loop operation reduces the control amplifier's output pin 42, reduces the power module's
gain, and reduces power output to maintain the coupler buffer output U500, pin 2 at 3.2 V regardless
of the D/A voltage level. If the D/A voltage is high (4.5 V), little detected voltage is needed to keep pin
2 at 3.2 V, and the power, consequently, is low. If the D/A voltage is low (1.5 V), a large forward
detected voltage is needed to keep pin 2 at 3.2 V and power, consequently, is at maximum value.
The voltage at pin 2 drops below 3.2 V under proper operation during low line voltage conditions
where the PA cannot produce rated power, or if, under any conditions, the control voltage, or the final
68P81076C25-C July 1, 2002
Temperature Sensing
exclusively high temperatures. On the PA board, this circuit, formed by resistors R3878 thru R3880
and thermistor RT3877, provides a temperature-dependent voltage to the RPCIC via P0853, pin 7.
As the PA temperature increases, the resistance of RT3875 decreases, causing the voltage at pin 7
to increase. This voltage is routed to the RPCIC, U500, pin 13, which is the input to the thermistor
control amplifier input and is a summing point for temperature, forward-power detect, and power set
detect voltage and therefore, reducing the PA output power. Since power output is reduced, the
generated heat is reduced to a safe level, If temperature decreases, the power output of the PA
gradually increases to its nominal value. Temperature cutback should occur at about 140 degrees F
(60 degrees C).
The temperature sense circuitry can easily be tested by placing an ordinary leaded 4.7k ohm across
RT3875, PA output power should drop significantly if this circuit is working properly.
power output at the same time (i.e. during high VSWR conditions). The current limiter may
thermal cut-back circuit.
July 1, 2002 68P81076C25-C
3.7.2 UHF Band Power Amplifiers
The high-power Spectra amplifier is discussed in the following text. A block diagram of the circuit is
shown in.
Figure 3-24. UHF High-Power, Power Amplifier Block Diagram
The LLA is the first stage of the PA and provides a gain that is a function of a control voltage. This
current drain.
The LLA, Q5801, is unique in that its gain is controlled by varying the collectors current rather than
by the magnitude of the control voltage.
Second Amplifier Stage
The second stage of the PA, Q5803, amplifies the output of the LLA to a level sufficient to drive the
third stage device, Q5850. Q5803 amplifies the LLA output from approximately 250 mW to 2.5 Watts.
Third Amplifier Stage
The third stage uses a 2.5-Watt input to 16-Watt output device. It is driven by the second stage
through a matching circuit that consists of C5851, C5852 C5850, C5858, and L5850. L5851 and
L5852 give the device a zero-Vdc base bias (required for Class-C operation). The network of L5853,
L5854, C5856, C5857, and R5850 provide A+ to the collector.
Driver Stage
The driver stage uses a 15-Watt input to 50-Watt output device. It is driven by the third stage through
the matching network consisting of C5853, C5854, C5855, C5861, C5862, and associated
transmission lines. The DC bias path for the base is provided by L5855 and L5857. C5859, R5851,
and C5860 are for the purpose of suppressing parasitic oscillations. Note that the capacitors C5861,
C5862, C5863, and C5864 are placed on the bottom side of the PC board.
FINAL AMPLIFIER
Q5875
25C29
Q5876
25C29
Q5851
25C30
Q5850
25C27
Q5803
25C09
Q5801
82D50
LLA 2ND STAGE 3RD STAGE DRIVER
250mW 2W 15W 50W 30mW
J5901
INJECTION
CONTROL
VOLTAGE
K9.4 9.6V FILTERED
A+
FILTERED
A+
FILTERED
A+
PIN
ANTENNA
SWITCH
HARMONIC
FILTER
DIRECTIONAL
COUPLER AND
DETECTOR
K9.4 TO
RECEIVER
E5802
FORWARD
POWER
DETECT
J3853
ANTENNA
CONNECTOR
MINI UHF
110W 125W
MAEPF-22045-O
68P81076C25-C July 1, 2002
Final Stage
The final amplifier stage is the parallel combination of two 25-Watt input to 75-Watt output RF
transistors. The matching network from the collector of the driver device Q5851 to the bases of the
final devices Q5875 and Q5876 utilizes transmission lines as part of a combination matching
network and power splitter. The capacitors C5885, C5886, C5887, and C5888 are on the bottom
side of the PC board underneath the base leads of Q5875 and Q5876.
The DC bias path for the base of Q5875 is via L5877 and L5879. Q5876 has a similar network.
R5878 improves division of driver power between the final devices Q5875 and Q5876.
A feedback network consisting of C5890, R5879, and L5881 suppresses parasitic oscillations in
Q5875. Q5876 has a similar network.
The final stage output network serves the dual purpose of impedance matching and power
combining of the two final devices. C5891, C5892, C5893, and C5894 are on the bottom side of the
PC board underneath the collectors of the final devices. These capacitors are especially critical in
terms of their exact physical placement.
R5881 and R5882 help balance the load impedances presented to the collectors of the final devices.
Filtered A+ is routed to the final amplifier devices via the current sense resistor R5875, the ferrite
bead L5884, and the coil L5882. The final stage output network terminates at C5900 which is the
input to the antenna switch. The circuit impedance is 50 ohms at this point.
Antenna Switch
The antenna switch utilizes PIN diodes to form a low loss, high isolation RF relay. During transmit,
PIN diodes CR5900, CR5902, CR5904, and CR5905,are forward biased during transmit via the K9.4
supply and resistors R5901, R5900, R5908, and R5909. In this state, a low loss path exists from the
final amplifier through PIN diode CR5900 and into the harmonic filter. PIN diodes CR5902, CR5904,
and CR5905 effectively shunt the path to the receiver front-end, which protects the preamp or mixer
device from excessive RF levels. A properly functioning switch will pass less than 10 mW of transmit
power to the receiver front-end.
During receive, all four PIN diodes remain unbiased. This opens a low loss path from the harmonic
filter to the receiver
Harmonic Filter
The harmonic filter is a 9-pole low-pass filter consisting of screened plate capacitors and air-wound
coils on a 0.035 inch thick ceramic substrate. The filter's primary function is to attenuate harmonic
energy generated by the amplifier stages. The filter also adds some selectivity for the receiver.
Inside U500, the Regulator Power Control IC (Figure 3-25) is an operational amplifier that has four
inverting inputs, and one non-inverting input (at pin 44) which is the reference input for the entire
July 1, 2002 68P81076C25-C
voltage divider is connected to the control-voltage-limit input (pin 4) of the RPCIC. If the voltage at
high-power UHF PA, this maximum value is 10 V. This voltage control limit is set by the values of
R5807 and R5808.
Current Limiter
N.C.
A+
TX P.A. ENABLE
LOCK
CURRENT SENSE +
FROM R9875
CURRENT SENSE
FROM R9875
KEYED 9.4V INPUT
9
.
6
V

D
R
I
V
E
U
N
S
W

5
V

R
E
F
9.6V SENSE INPUT
5V DRIVE TO Q502
5V CURRENT SENSE
5V FEEDBACK
TEMPERATURE SENSE
INPUT
TEMPERATURE SENSE
OUTPUT TO 500-2
POWER SET FROM
U502 1.5V 5 VOLTS
FORWARD DET.
VOLTAGE
POWER SET OUT TO
PIN 2 VIA R507
T
X

C
U
R
R
E
N
T
L
I
M
I
T

F
R
O
M
U
5
0
2
-
1
5C
O
N
T
.
A
M
P
O
U
T
R
E
F
.
3
.
2
V
5V
C
O
N
T
.
A
M
P

I
N
V
O
L
T
A
G
E
C
O
N
T
R
O
L
L
I
M
I
T
P
O
W
E
R
S
E
T
N.C.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
REGULATOR
GROUND
13.8V
9.6 VOLT
REGULATOR
PA ENABLE
ONE-
SHOT
WIDE-BAND
ENABLE
CONTROL AMP
CURRENT SENSE
AMP
CURRENT
LIMIT SET
BUFFER
POWER CONTROL
GROUND
PACKAGE FLAG
GROUND POWER SET
BUFFER
DIRECTIONAL
COUPLER BUFFER
THERMISTER
BUFFER
5V REGULATOR
PACKAGE
GROUND
U500
29
30
31
32
33
34
35
36
37
38
39
28 27 26 25 24 23 22 21 20 19 18
17
16
15
14
13
12
11
10
9
8
7
6 4 3 2 1 44 43 42 40 41 5
+
+
+
Q +
+
+
+ +
Q538
RPCIC ENABLE
FORWARD BUFFERED
OUT
TO PIN 10
U502 DAIC
R516
100K
R509
68K
R507
47K
R508
68K
RESISTIVE
SUMMING
NETWORK
MAEPF-22034-O
68P81076C25-C July 1, 2002
The collector current of the high-power amplifier is monitored by sensing the voltage across R5875.
These lines connect to the command board on U500 pins 37 and 38, respectively. If the TX
CURRENT LIMIT is set for 1.5 V, then the voltage difference between U500 pins 37 and 38 must be
0.1 V before the current through R5875 is reduced. If U500 pin 40 is programmed for 4.5 V, then the
difference of potential between pins 37 and 38 must exceed 0.3 V before current limiting begins. The
U500, pin 40 by 0.067. When current is being limited, the output of the op-amp (U500, pin 42) begins
shutting down the conduction of Q503 and Q504, reducing PA control voltage, and reducing drive to
the final amplifier to, effectively, control the final amplifier's maximum current.
After the harmonic filter a parallel pair of microstrip lines form a forward power sensing directional
coupler and detector. The output of this directional coupler/detector is a DC voltage that is
proportional to the forward RF power from the final amplifier. During normal transmission, the DC
voltage from the forward detect line to the RPCIC ranges from 2 to 5.0 V.
This voltage connects to U500 pin 9, the directional coupler buffer input.
The directional coupler's buffered output, U500 pin 8, is summed to pin 2 with the digital/analog
buffer's output through R509 and R507, respectively. In typical operation, the closed loop operation
of the circuit attempts to keep the voltage at U500 pin 2 a constant value of 3.2 V. The control amp
will maintain this condition by increasing or decreasing the control amp output voltage. This control
amp output voltage is routed to the LLA via transistors Q503 and Q504. The output of Q504 is
designated "control voltage drive" and is routed to J1 pin 2 of the PA board.
Since control voltage drive controls the gain of the LLA, it determines the drive level to the following
stages and thus the output power of the final amplifier. The output power of the final stage is
detected by the directional coupler and is routed back to U500 pin 2 via the buffer and R507. Thus
the loop is complete and forward power is maintained a constant value. The voltage at pin 2 will drop
below 3.2 V during low line voltage conditions where the PA cannot produce rated power. Current
limit and voltage control limit circuits will also affect the voltage at pin 2 as described in the following
discussion on temperature sensing.
Temperature Sensing
excessively high temperatures. On the PA board, this circuit, (formed by resistors R5857, R5843,
R5858, and thermistor RT5875), provides a temperature dependent voltage to the RPCIC via J1 pin
6. As the PA temperature increases, the resistance of RT5875 decreases, causing the voltage at pin
6 to increase. This voltage is routed to the RPCIC, U500 pin 13, which is the input to the thermistor
gradually increases to its nominal value.
July 1, 2002 68P81076C25-C
3.7.2.2 40-Watt Power Amplifier
The 40-Watt ASTRO Spectra power amplifier is discussed in the following text.
NOTE: The minimum input drive level to the PA into P5850 is 30 mW. Refer to the synthesizer section
The Low Level Amplifier, the first stage of the PA, provides a gain that is a function of a control
voltage. This control voltage comes from the Regulator Power Control IC (RPCIC) on the command
board. The magnitude of the control voltage depends on PA output power, temperature, and final
amplifier current drain.
by the magnitude of the control voltage. Proper operation of the LLA can be checked by monitoring
the voltage across the resistor R5805 The voltage should measure in the range of 0.1 to 1.0 V,
depending on the value of control voltage. A 0.1-V reading corresponds to a low control voltage
(1 to 5 V) and a 1.0-V reading corresponds to a high control voltage (up to control voltage limit).
Predriver Stage
The second stage of the PA, Q5803, is the predriver which amplifies the output of the LLA to a level
sufficient to operate the driver device, Q5850. This stage amplifies the LLA output from,
approximately, 250 mW in to 2.0 Watts out.
Driver Stage
The driver is a six-leaded 2.5- to 16-Watt device. It is driven by the predriver device through a
matching circuit that consists of C5851, C5852, C5850, C5858, and L5850. L5851 and L5852 give
the driver a zero-DC bias (required for the driver's Class-C operation). L5852, a ferrite bead, helps
lower the driver base Q and prevent unwanted oscillations. The network of L5853, L5854, C5856,
C5857, and R5850 provide A+ to the collector. L5853 and L5854 provide the DC path and block RF
from coming up the DC line. R5850 resistively loads down the collector at low frequencies,
preventing unwanted oscillations. C5856 and C5857 are bypass capacitors.
Final Stage
The final device is a six-leaded 15- to 50-Watt device and is driven by the driver through a quasi-low
pass matching circuit that consists of C5853, C5854, C5855, C5875, C5876, and associated
transmission lines. Base network, L5875, L5876, L5883, C5891, R5881, and R5882, provide the
zero-DC bias required by the final device's Class-C operation. L5875, L5876, and L5883 provide the
DC path from base to ground. C5891, in parallel with L5875, presents a high impedance at UHF
frequencies, thus minimizing RF losses in the base network. R5881, R5882, and L5883 resistively
load down the base at low frequencies, thus preventing unwanted oscillations. The collector DC
network consists of L5878, L5879 R5879, R5880, R5883, R5884, R5875, C5881, C5883 C5884,
C5885, C5886, C5893, and CR5875. This network provides the A+ voltage to the final while blocking
RF from getting up the DC line. L5878 and L5879 provide the DC path and block RF. R5879, R5880,
R5883, and R5884 resistively load down the final's collector at low frequencies and prevent
unwanted oscillations. C5881, C5883, C5884, C3885, C5886 and C5893 are all bypass capacitors
ranging from very low frequencies up to UHF frequencies. R5875 is the current-sense resistor.
CR5875 protects against reverse polarity. Finally, the power goes through a low-pass matching
network (C5877, C5878, C5887, C5892, C5880, and associated transmission lines) to the rest of the
output network (Directional Coupler, Antenna Switch, and Harmonic Filter).
68P81076C25-C July 1, 2002
Antenna Switch
quarter-wave microstrip line. During transmission, Keyed 9.4 V forward-biases CR5921, producing
low impedance on CR5921's anode and high impedance on the C5923/L5921 node. Effectively, this
isolates the transmitted power from the receiver, C5922 couples the power to the harmonic filter and
on to the antenna.
Total TX to RX isolation exceeds 45 dB from 450-512 MHz. The impedance inverter contributes
approximately 35 dB to transmit isolation. A second shunt switch, made up of CR5922, L5922, and
C5924, provides additional isolation. C5926 and C5927 block DC.
During RX, CR5920 has an OFF capacitance of approximately 1 pF, which is tuned out by L5904.
CR5921 and CR5922, incorporated in the RX match, have similar OFF capacitances.
Harmonic Filter
The 40-Watt harmonic filter is a 7-pole, low-pass filter, consisting of screened plate capacitors and
discrete inductors (1,5924, L5925, and L5926) on a 35-mil alumina substrate. The filter's ground
plane is attached to the PA printed circuit board with solder, while input and output connections are
made via MP5901 and MP5902. The filter's primary function is to attenuate harmonic spurs
generated by the transmitter. It also adds low-pass selectivity for the receiver. L5910, grounded
through MP5903, protects the PA from static discharge.
NOTE: When removing any of the discrete coils, take care to avoid leaching the plate capacitor
metallization. Removal of the entire hybrid is best accomplished by heating the hybrid/PC
board assembly with a heat gun or heat blower until the solder joint reflows.
July 1, 2002 68P81076C25-C
N.C.
A+
TX P.A. ENABLE
LOCK
CURRENT SENSE +
FROM R9875
CURRENT SENSE
FROM R9875
KEYED 9.4V INPUT
9
.
6
V

D
R
I
V
E
U
N
S
W

5
V

R
E
F
9.6V SENSE INPUT
5V DRIVE TO Q502
5V CURRENT SENSE
5V FEEDBACK
TEMPERATURE SENSE
INPUT
TEMPERATURE SENSE
OUTPUT TO 500-2
POWER SET FROM
U502 1.5V 5 VOLTS
FORWARD DET.
VOLTAGE
POWER SET OUT TO
PIN 2 VIA R507
T
X

C
U
R
R
E
N
T
L
I
M
I
T

F
R
O
M
U
5
0
2
-
1
5C
O
N
T
.
A
M
P
O
U
T
R
E
F
.
3
.
2
V
5V
C
O
N
T
.
A
M
P

I
N
V
O
L
T
A
G
E
C
O
N
T
R
O
L
L
I
M
I
T
P
O
W
E
R
S
E
T
N.C.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
REGULATOR
GROUND
13.8V
9.6 VOLT
REGULATOR
PA ENABLE
ONE-
SHOT
WIDE-BAND
ENABLE
CONTROL AMP
CURRENT SENSE
AMP
CURRENT
LIMIT SET
BUFFER
POWER CONTROL
GROUND
PACKAGE FLAG
GROUND POWER SET
BUFFER
DIRECTIONAL
COUPLER BUFFER
THERMISTER
BUFFER
5V REGULATOR
PACKAGE
GROUND
U500
29
30
31
32
33
34
35
36
37
38
39
28 27 26 25 24 23 22 21 20 19 18
17
16
15
14
13
12
11
10
9
8
7
6 4 3 2 1 44 43 42 40 41 5
+
+
+
Q +
+
+
+ +
Q538
RPCIC ENABLE
FORWARD BUFFERED
OUT
TO PIN 10
U502 DAIC
R516
100K
R509
68K
R507
47K
R508
68K
RESISTIVE
SUMMING
NETWORK
MAEPF-22034-O
68P81076C25-C July 1, 2002
voltage divider is connected to the control-voltage-limit input ( pin 4) of the RPCIC. If the voltage at
40-Watt UHF PA, this maximum value is 10 V. This voltage-control limit is set by the values of R5807
and R5808.
Current Limiter
The collector current of the 40-Watt amplifier is monitored by sensing the voltage across R5875.
These lines connect to the command board on U500, Pins 37 and 38, respectively. If the TX
CURRENT LIMIT is set for 1.5 V, then the voltage difference between U500, Pins 37 and 38 must be
0. 1 V before the current through R5875 is reduced. If U500, pin 40 is programmed for 4.5 V, then the
difference of potential between Pins 37 and 38 must exceed 0.3 V before current limiting begins. The
U500, pin 40, by 0.067. When current is being limited, the output of the op-amp (U500, pin 42)
begins shutting down the conduction of Q503 and Q504, reducing PA control voltage, and reducing
drive to the final amplifier to, effectively, control the final amplifier's maximum current.
After the final amplifier, a parallel pair of microstrip lines form a forward power-sensing directional
coupler. Because of increased coupling with frequency, C5903, L5902, C5904, L5903, and C5905
are used to compensate and filter out harmonics. CR5900 rectifies the signal. R5904, R5905, and
RT5904 provide thermal compensation. During normal transmission, the DC voltage from the
forward-detect line to the RPCIC ranges from 2 to 4.5 V. This voltage connects to U500, pin 9, the
output through R509 and R507, respectively. Closed loop operation reduces the control amp's output
( pin 42), reduces the power module's gain, and reduces power output to maintain the coupler buffer
output (U500, pin 2) at 3.2 V regardless of the D/A voltage level. If the D/A voltage is high
(4.5 V), little detected voltage is needed to keep pin 2 at 3.2 V, and the power, consequently, is low. If
the D/A voltage is low (1.5 V), a large forward detected voltage is needed to keep pin 2 at 3.2 V and
power, consequently, is at maximum value. The voltage at pin 2 drops below 3.2 V under proper
operation during low line voltage conditions where the PA cannot produce rated power, or if, under
any conditions, the control voltage or the final device current exceeds safe levels.
July 1, 2002 68P81076C25-C
Temperature Sensing
excessively high temperatures. On the PA board, this circuit, formed by resistors R5878, R5876,
R5877, and thermistor RT5875, provides a temperature-dependent voltage to the RPCIC via P0853,
pin 7. As the PA temperature increases, the resistance of RT5875 decreases, causing the voltage at
pin 7 to increase. This voltage is routed to the RPCIC, U500, pin 13, which is the input to the
thermistor buffer. The buffer's output on pin 12 is connected to pin 2 via resistor R508. Note that pin
2 is the control amp input and is a summing point for temperature, forward-power detect, and power
set signals. If the PA temperature becomes high enough so that the voltage at pin 7 exceeds
3.2 V, the thermistor buffer starts supplying current to the node at pin 2. Due to the fixed output
current of the power-set buffer, the control loop can maintain 3.2 V at pin 2 only by reducing the
forward-power detect voltage and, therefore, reducing the PA output power. Since power output is
reduced, the generated heat is reduced to a safe level. If temperature decreases, the power output
of the PA gradually increases to its nominal value. Temperature cutback should occur at about 140 F
(60 C).
The temperature sense circuitry can easily be tested by placing an ordinary leaded 6.8k ohm resistor
across RT5875. PA output power should drop significantly if this circuit is working properly.
68P81076C25-C July 1, 2002
3.7.3 800 MHz Band Power Amplifiers
3.7.3.1 15- and 35-Watt Amplifiers
The 15-Watt and 35-Watt ASTRO Spectra power amplifiers are discussed in the following text.
Transmit Buffer
The PA receives 18 to 23 dBm (60 to 200 mW) at the transmit injection (TX INJ) coax. The first
stage, TX BUFFER, uses adaptive biasing which varies the base voltage inversely proportional to
the input drive level. With Keyed 9.4 V (K9.4) ON and NO DRIVE, Q9800 base voltage should equal
the voltage drop across CR9800. R9801 sets the diode current, and R9802 sets the base voltage
referenced from CR9800. At the input, L9804, C9801, and C9800 are for matching while C9808 and
R9806 prevent interfacing instability. L9800 is the base feed choke and L9801 is the collector choke.
R9800 parallels L9800 for added stability. L9805, and C9803 are on the buffer's supply (K9.4) for
stability. C9802 and L9802 are for output matching. L9803 and C9804 are added as a "suckout" for
half carrier. Like the input, C9807 and R9805 were added at the output to help prevent interfacing
instability. The power output of this stage should be greater than 325 mW (25 dBm).
The TX Buffer applies the modulated RF signal to pin 1 of U9850, the Power Amplifier Module, which
is a 5-pin, 20-Watt, three-stage amplifier. The control voltage from the power control series-pass
transistor, Q9500, controls the gain of the first two amplifier stages of U9850, through pin 2 and pin 3.
Battery voltage (A +), connected to pin 4, powers the third stage.
Power Module
The power module (U9850) is the major gain block for both the 15- and 35-Watt amplifiers. The
50-ohm input and output impedances connect to adjacent power stages via 50-ohm microstrip lines.
The parallel resistor, R9805, and capacitor C9807, on the input, reduce circuit response at lower
frequencies and improve stability. The 350 mW (typical) input power is increased to approximately
15 Watts. The amplifier power is monitored by the power control IC on the command board and
adjusted by controlling the voltage on U9850, Pins 2 and 3. A+ is applied directly to the final stage
inside the power module via pin 4. No repairs can be made to the module; damaged or failed units
must be replaced.
The power module leads will not tolerate undue stress; handle carefully when repairing.
!
C a u t i o n
July 1, 2002 68P81076C25-C
Final Stage (35-Watt Only)
On the 15-Watt radio, the transmit RF signal from U9850, pin 5, is applied to the 50-ohm microstrip
directional coupler. On the 35-Watt radio, the transmit RF signal is applied to the emitter of the final
power amplifier Q9880 through the coupling capacitor C9856, the 50-ohm quarter-wave matching
transmission line, and the matching capacitors C9875 and C9876. The 100-ohm coupling line,
L9930, R9930, R9931, CR9930, and C9930 form an interstage power detector between U9850 and
Q9880 to limit the drive into Q9880 to about 17 Watts. L9875, the emitter choke, is also the emitter
DC return. The final power amplifier, Q9880, is a 45-Watt, 800 MHz, common-base NPN devise. The
Q9880 output match consists of C9877, C9878, a section of the 50-ohm microstrip line, C9879 and
the DC blocking capacitor, C9883. L9876 isolates the RF signal from A+. C9880 and C9884 are
signal frequency bypass capacitors. L9877 presents a high impedance at low RF frequencies;
therefore the collector of Q9880 is resistively loaded by R9876 at low frequencies where the gain is
much greater. C9881 and C9882 are low frequency bypass capacitors.
Antenna Switch
35-Watt Power Amplifier:
quarter-wave microstrip line. During transmission, K9.4-V forward-biases CR9921, producing a low
impedance at its anode end, and a high impedance at the node of C9922 and L9921, to effectively
isolate the transmitted power from the receiver. C9921 couples the power to the harmonic filter and
on to the antenna.
The impedance inverter contributes approximately 30 dB to transmit isolation. Additional isolation is
obtained by the series switch made up of CR9922, L9923, and associated DC bias components.
During transmit, CR9922 is reverse-biased, thus creating a small series capacitor that is tuned out
by L9923. C9925 is a DC blocking capacitor. The high impedance of the series arm works against
the low impedance of the shunt arm (CR9921) to provide approximately 10 to 15 dB additional
isolation. Total TX to RX isolation is in excess of 45 dB from 851-870 MHz. The preselector provides
over 50 dB isolation from 806-824 MHz.
When receiving, CR9920 has an off capacitance of approximately 1 pF, which is tuned out by L9926.
CR9921, with similar off capacitance, is incorporated in the RX match. CR9922 is forward-biased
with an ON resistance of approximately 1 ohm. The signal passes CR9922 and through L9922, a
series inductor used to complete the RX match. Capacitor C9929 blocks DC.
L9910, at the node of the antenna and harmonic filter, protects the PA from static discharge.
15-Watt Power Amplifier:
The theory for the 15-Watt antenna switch is exactly the same as the 35-Watt except that some of
the components are labeled with different numbers. C9921, in the 15-Watt PA, is located after the
harmonic filter.
L9922, at the node of the antenna and capacitor C9921, protects the PA from static discharge.
Harmonic Filter
The 15- and 35-Watt harmonic filters are 7-pole, low-pass filters implemented with screened plate
capacitors and discrete inductors (L9911, L9912, and L9913) on a 35 mil (0.035") alumina substrate.
The filter's ground plane is attached to the PA printed circuit board with solder, while input and output
connections are made via "J"-straps MP9856 and MP9857. The filter's primary function is to
attenuate harmonic spurs generated by the transmitter and to provide additional low-pass selectivity
for the receiver.
68P81076C25-C July 1, 2002
NOTE: When removing any of the discrete coils, take care to avoid leaching the plate capacitor
metallization. Removal of the entire hybrid is best accomplished by heating hybrid/PC board
assembly with a heat gun or heat blower until solder joint reflows.
power control loop of the power amplifier. The 3.2-V reference voltage at U500, pin 44, is produced
by dividing SW + 5-V with the voltage-divider circuit, R514 and R515.
N.C.
A+
TX P.A. ENABLE
LOCK
CURRENT SENSE +
FROM R9875
CURRENT SENSE
FROM R9875
KEYED 9.4V INPUT
9
.
6
V

D
R
I
V
E
U
N
S
W

5
V

R
E
F
9.6V SENSE INPUT
5V DRIVE TO Q502
5V CURRENT SENSE
5V FEEDBACK
TEMPERATURE SENSE
INPUT
TEMPERATURE SENSE
OUTPUT TO 500-2
POWER SET FROM
U502 1.5V 5 VOLTS
FORWARD DET.
VOLTAGE
POWER SET OUT TO
PIN 2 VIA R507
T
X

C
U
R
R
E
N
T
L
I
M
I
T

F
R
O
M
U
5
0
2
-
1
5C
O
N
T
.
A
M
P
O
U
T
R
E
F
.
3
.
2
V
5V
C
O
N
T
.
A
M
P

I
N
V
O
L
T
A
G
E
C
O
N
T
R
O
L
L
I
M
I
T
P
O
W
E
R
S
E
T
N.C.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
N
.
C
.
REGULATOR
GROUND
13.8V
9.6 VOLT
REGULATOR
PA ENABLE
ONE-
SHOT
WIDE-BAND
ENABLE
CONTROL AMP
CURRENT SENSE
AMP
CURRENT
LIMIT SET
BUFFER
POWER CONTROL
GROUND
PACKAGE FLAG
GROUND POWER SET
BUFFER
DIRECTIONAL
COUPLER BUFFER
THERMISTER
BUFFER
5V REGULATOR
PACKAGE
GROUND
U500
29
30
31
32
33
34
35
36
37
38
39
28 27 26 25 24 23 22 21 20 19 18
17
16
15
14
13
12
11
10
9
8
7
6 4 3 2 1 44 43 42 40 41 5
+
+
+
Q +
+
+
+ +
Q538
RPCIC ENABLE
FORWARD BUFFERED
OUT
TO PIN 10
U502 DAIC
R516
100K
R509
68K
R507
47K
R508
68K
RESISTIVE
SUMMING
NETWORK
MAEPF-22034-O
July 1, 2002 68P81076C25-C
Power Module Control Voltage Limiter
R9562 and R9563 connect in series to the emitter of Q9500. The ratio of R9563 and R9562 feed a
portion of the control voltage (U9850, Pins 2 and 3) to U500, pin 4. When pin 4 exceeds 3.2 V, the
output of the control op-amp (U500, pin 42) is reduced. Eventually, this reduces the control voltage
available to the power module (U9850).
The input RF power to the 45-Watt amplifier Q9880) must stay below 17 Watts. Power is coupled
from the inter-stage 50-ohm transmission line to a 100 ohm transmission line and rectified by
CR9930 on the PA, producing a DC voltage on U500, pin 4. IF this voltage exceeds 3.2 V, the output
voltage on U500, pin 42, is reduced, lowering the control voltage and reducing U9850's gain until its
RF output power is approximately 17 Watts.
Current Limiter
U204, the processor on the VOCON board, sends data to U502, the digital to analog converter, to
The collector current of the 45-Watt final amplifier (in the 35-Watt PA only) is monitored by sensing
the voltage across R9875. CURRENT SENSE + connects to one end of R9875 and CURRENT
SENSE - connects to the other end. These lines connect to the command board on U500, Pins 37
and 38, respectively. If the TX CURRENT LIMIT is set for 1.5 V, then the voltage difference between
U500, Pins 37 and 38 must be 0.1 V before the current through R9785 is reduced. If U500, pin 40 is
programmed for 4.5 V, then the difference of potential between Pins 37 and 38 must exceed 3 V
before current limiting begins. The voltage across R9875, where current sense occurs, can be
determined by multiplying the voltage on U500, pin 40, by 0.067. When current is being limited, the
output of the op-amp (U500, pin 42), begins shutting down the conduction of Q503 and Q504,
reducing base drive to Q9500, reducing drive to the final amplifier to, effectively, control the final
amplifier's maximum current.
The parallel pair of microstrip lines after the final amplifier, form a forward power sensing directional
coupler. Because the coupling increases with frequency, the compensation network of L9806 and
C9901 is used. CR9900 rectifies the signal, C9900 filters it, and R9905 and R9904 form a voltage
divider. During normal transmission, the DC voltage from the forward detect line to the RPCIC
ranges from 2 to 4.5 V. This voltage connects to U500, pin 9, the input to the directional coupler
buffer.
The directional coupler's output, U500, pin 8, is summed to pin 2 with the digital/analog buffer's
output through R509 and R507, respectively. Closed loop operation reduces the control amp's output
( pin 42), reduces the power module's gain, and reduces power output to maintain the coupler buffer
output U500, pin 2) at 3.2 V regardless of the D/A voltage level. If the D/A voltage is high
(4.5 V), little detected voltage is needed to keep pin 2 at 3.2 V, and the power, consequently, is low. If
the D/A voltage is low (1.5 V), a large forward detected voltage is needed to keep pin 2 at 3.2 V and
power, consequently, is at maximum value. The voltage at pin 2 drops below 3.2 V under proper
operation during low line voltage conditions where the PA cannot produce rated power, or if, under
any conditions, either the inter-stage power (in 35-Watt models only), the control voltage, or the final
68P81076C25-C July 1, 2002
3.7.3.1.4 Temperature Sensing
When the radio is keyed, K9.4-V is applied to pin 5 of the PA connector and on one side of thermistor
RT9560. As the temperature increases, the resistance of RT9560 decreases, creating more voltage
across R9561. This temperature voltage is routed via PA connector pin 7 back to U500, pin 13, which
is the input to a thermistor buffer. The thermistor buffer's output on pin 12 is summed to U500, pin 2,
and passes through its scaling resistor, R508. When the temperature of the RT9560 causes its value
to change enough that the voltage exceeds 3.2 V, the thermister buffer starts supplying current to the
node at pin 2. Due to the fixed output of the D/A, the control loop can maintain 3.2 V at pin 2 only by
reducing power out and reducing the forward detected voltage. Since output is reduced, the
generated heat is held to a safe level. As temp decreases, the power output of the PA gradually
increases to its nominal value.
Q9515 and Q9510 switch A+ to one side of R9513. R9513 sums the A+ voltage into the same node
as TEMPSENSE. Together with temp-sense the circuitry protects the power amplifier from unsafe
operating conditions of high line and high temp.
NOTE: Under severe environmental conditions more than one circuit may be attempting to reduce
power output at the same time (i.e., during high VSWR conditions, the inter-stage power limit
may initially reduce power, but eventual heat build-up will cause further power reduction by
the thermal cut-back circuit).
July 1, 2002 68P81076C25-C
Chapter 4 Troubleshooting Procedures
4.1 ASTRO Spectra Procedures
This section will aid you in troubleshooting a malfunctioning ASTRO Digital Spectra radio. It is
intended to be detailed enough to localize the malfunctioning circuit and isolate the defective
component.
NOTE: Refer to 4.2 ASTRO Spectra Plus Procedures on page 4-10 for troubleshooting information
specific to the ASTRO Spectra Plus radio.
4.1.1 Handling Precautions
Complementary metal-oxide semiconductor (CMOS) devices and other high-technology devices, are
used in this family of radios. While the attributes of these devices are many, their characteristics
make them susceptible to damage by electrostatic discharge (ESD) or high-voltage charges.
Damage can be latent, resulting in failures occurring weeks or months later. Therefore, special
precautions must be taken to prevent device damage during disassembly, troubleshooting, and
repair. Handling precautions are mandatory for this radio, and are especially important in low-
humidity conditions. DO NOT attempt to disassemble the radio without observing the following
handling precautions.
1. Eliminate static generators (plastics, Styrofoam, etc.) in the work area.
2. Remove nylon or double-knit polyester jackets, roll up long sleeves, and remove or tie back
loose hanging neckties.
3. Store and transport all static-sensitive devices in ESD-protective containers.
4. Disconnect all power from the unit before ESD-sensitive components are removed or inserted
unless otherwise noted.
5. Use a static-safeguarded workstation, which can be accomplished through the use of an anti-
static kit (Motorola part number 01-80386A82). This kit includes a wrist strap, two ground
cords, a static-control table mat and a static-control floor mat.
6. Always wear a conductive wrist strap when servicing this equipment. The Motorola part
number for a replacement wrist strap that connects to the table mat is 42-80385A59.
Most of the ICs are static-sensitive devices. Do not
attempt to troubleshoot or disassemble a board
without first referring to the following Handling
Precautions section.
!
C a u t i o n
July 1, 2002 68P81076C25-C
4-2 Troubleshooting Procedures: ASTRO Spectra Procedures
4.1.2 Voltage Measurement and Signal Tracing
In most situations, the problem circuit may be identified using a dc voltmeter, RF millivoltmeter, and
oscilloscope (preferably with 100 MHz bandwidth or more). The Recommended Test Equipment,
Service Aids, and Tools section in the ASTRO Digital Spectra and Digital Spectra Plus Mobile
Radios Basic Service Manual (68P81076C20) outlines the recommended tools and service aids
which would be useful. Of special note are:
30-80370E06 Extender Cable which provides an extension cable for VOCON board connector
J501 and command board connector P501.
RPX-4725A Command and Control Service Cable Kit which provides extension cables for
servicing digital and analog circuits.
RPX-4724A RF Service Cable Kit which provides interface cables needed to service the RF
boards.
In some cases dc voltages at probe points are shown in red on the schematics. In other areas
diagrams are included to show time-varying signals, which should be present under the indicated
circumstances. It is recommended that a thorough check be made prior to replacement of any IC or
part. If the probe point does not have a signal reasonably close to the indicated one, a check of the
surrounding components should be made prior to replacing any parts.
4.1.3 Power-Up Self-Check Errors
Each time the radio is turned on the MCU and DSP perform some internal diagnostics. These
diagnostics consist of checking the programmable devices such as the FLASH ROMs, internal and
external EEPROMs, SRAM devices, and ADSIC configuration bus checksum. At the end of the
power-up self-check routines, if an error exists, the appropriate error code is shown on the display.
Self-test errors are classified as either fatal or non-fatal. Fatal errors will inhibit user operation;
non-fatal errors will not. For non-display radios, the error codes may be read using the Radio Service
Software (RSS) from the SB9600 bus on the universal connector. Table 4-1 lists self-check error
codes, describes the codes, and recommends troubleshooting charts for investigating the cause of
the failure.
Table 4-1. Power-Up Self-Check Error Codes
Error
Code
Description Troubleshooting Chart
01/02 External EEPROM checksum non-fatal error Chart C.2 (p. 4), C.7 (p. 8)
01/81 ROM checksum failure Chart C.6 (p. 7)
01/82 External EEPROM checksum failure Chart C.2 (p. 4), C.7 (p. 8)
01/84 EEPROM is blank Chart C.2 (p. 4), C.8 (p. 8)
01/88 RAM failure - Note: Not a checksum failure Chart C.2 (p. 4), C.9 (p. 9)
01/90 General hardware failure Chart C.2 (p. 4), C.5 (p. 7)
When checking a transistor or module, either in or
out of circuit, do not use an ohmmeter having more
than 1.5 Vdc appearing across test leads or use an
ohms scale of less than x100.
!
C a u t i o n
68P81076C25-C July 1, 2002
Troubleshooting Procedures: ASTRO Spectra Procedures 4-3
In the case of multiple errors, the codes are logically ORd and the results displayed. As an example,
in the case of an ADSIC checksum failure and a DSP ROM checksum failure, the resultant code
would be 02/A1. Following is a series of troubleshooting flowcharts which relate to each of these
failure codes.
4.1.3.1 Power-Up Sequence
Upon RESET* going active, the MCU begins to execute code which is pointed to by the vector stored
at $FFFE, $FFFF in the FLASH ROM. The execution of this code is as follows:
1. Initialize the MCU (U204).
2. The control heads MCU turns on the:
- Green LED for the W3 model.
- TX and Busy LEDs for the W4, W5, W7 and W9 models.
3. Initialize the SLIC (U206).
4. CONFIG register check. If the CONFIG register is not correct, the MCU will repair it and loop.
5. Start ADSIC/DSP:
- Bring the ADSIC reset line high.
- Wait 2ms.
- Bring the DSP reset line high.
6. Start EMC:
- Set the EMC wake-up line low (emc irq line).
- Wait 5ms.
- Set the EMC wake-up line high.
- Wait 10ms.
- Set the EMC wake-up line low (emc irq line).
- Wait 5ms.
01/92 Internal EEPROM checksum failure Chart C.10 (p. 9)
02/81 DSP ROM checksum failure Chart C.12 (p. 10)
02/82 DSP RAM 1 failure Chart C.15 (p. 12)
02/84 DSP RAM 2 failure Chart C.14 (p. 11)
02/88 DSP RAM failure - Note: Not a checksum failure Chart C.13 (p. 11)
02/90 General DSP hardware failure (DSP start-up
message not received correctly)
Chart C.16 (p. 12)
02/A0 ADSIC checksum failure Chart C.11 (p. 10)
09/10 Secure option not communicating with radio Chart C.17 (p. 13)
09/90 Secure hardware failure Chart C.18 (p. 13)
Table 4-1. Power-Up Self-Check Error Codes (Continued)
Error
Code
Description Troubleshooting Chart
July 1, 2002 68P81076C25-C
- Set the EMC wake-up line high.
7. Begin power-up self-tests.
8. Begin RAM tests:
- External RAM ($1800-3FFF).
- Internal RAM ($1060-$1300).
- External RAM ($0000-$0DFF).
- Display 01/88 if failure.
The radio will get stuck here if the internal RAM is defective. The radio uses the internal RAM for
stack. The RAM routines use subroutines. Thus, if the internal RAM is defective, the radio will get
lost testing the external RAM.
9. Begin MCU (host C) ROM checksum test.
- Fail 01/81 if this routine fails.
10. Begin DSP power-up tests. The MCU will try this five times before it fails the DSP test.
- Check for HF2.
- Fail 02/90 if 100ms.
- Program the ADSIC.
- Wait for the DSP power-up message.
- Fail 02/A0 if 300ms.
- Fail 02/A0 if wrong message from the DSP.
- Wait for the DSP status information.
- Fail 02/90 if 100ms.
- Fail 02/88 if DSP RAM (U414) fails.
- Fail 02/84 if DSP RAM U403 fails.
- Fail 02/82 if DSP RAM U402 fails.
- Fail 02/81 if DSP RAM fails.
- Wait for the ADSIC checksum.
- Fail 02/A0 if 100ms.
- Fail 02/A0 if failure.
- Wait for the first part of the DSP version number.
- Fail 02/90 if 100ms.
- Wait for the second part of the DSP version number.
- Fail 02/90 if 100ms.
11. Checksum the codeplug.
- Test internal codeplug checksums.
- Fail 01/92 if failure.
- Test external codeplug checksums.
- Error 01/02 if non-fatal error; fail 01/82 if fatal error.
68P81076C25-C July 1, 2002
12. Power-up the EMC (if it is enabled in the codeplug).
13. Turn off the green LED.
14. Start up operating system.
15. Display for one second:
- SELF TEST for the W3, model.
- SELF CHK for the W4, W5, and W7 models.
- SELF CHECK for the W9 models.
16. Turn off the green LED in the W3 model, or the TX and Busy LEDs in the W4, W5, W7, and
W9 models.
Display errors if a fatal error exists at this time.
4.1.4 RF Board Troubleshooting
This information will help you troubleshoot the ASTRO Spectra Radio RF board. Use this
information, along with the Theory of Operation, to diagnose and isolate the cause of failures. The
principal tools needed to troubleshoot a circuit to the component level are the schematic and the
Theory of Operation.
In addition to the schematic and theory, the following troubleshooting information identifies tests and
checks designed to help isolate problems.
Prior to troubleshooting, it is important to review the Theory of Operation, including specific
precautions and troubleshooting methods. Because much of the radios circuitry operates at high
frequencies, measurements must be taken very carefully. Notes and cautions are added to the text
to alert the reader to this need in areas of greatest sensitivity. However, the need for extreme care
does exist in all measurements and tests.
4.1.4.1 Display Flashes FAIL 001
This display indicates a synthesizer out-of-lock condition. Check the dc power supplies for the
correct voltages at the following locations:
1. If any of the dc voltages are not correct, troubleshoot the source of the supplied power and
correct the problem. If the voltages are correct, continue with the following checks.
2. Check U602, pin 19 for reference frequency, 0- to 9-V, square wave. If not correct, go to
Incorrect Values at U602, pin 19; otherwise, continue with the following checks.
3. Check U602, pin 25 for reference frequency, 0- to 9-V, square wave. If not correct, go to
Incorrect Values at U602, pin 25 (MODULUS CONTROL); otherwise, continue with the
following checks.
Table 4-2. Voltage by Location
VOLTAGE LOCATION REMARKS
+5 Vdc Q602 Collector
+8.6 Vdc Q603 Collector
+5 Vdc
+3.25 Vdc
J500 pin 1
J500 pin 2
Power from command board to
reference oscillator
July 1, 2002 68P81076C25-C
4. Check the negative steering line, J601, pin 4. If correct, continue with the following checks.
5. Check the positive steering line, J601, pin 1 or 2 for positive voltage between 1.0 and 8.0 V. If
not correct, go to Incorrect Voltage at Positive Steering Line; otherwise, continue with the
following checks.
NOTE: It is common for both steps 3 and 5 to be incorrect in an out-of-lock condition.
6. Check U602, pin 27 for a 1.5 Vp-p square wave whose frequency is determined in the
following equation. If the values are not correct, go to Incorrect Values at U602, pin 27.
Freq into U601-1 / Prescaler Modulus;
for example, F
in
/ P = 455 MHz / 255 = 1.77 MHz, or
F
in
/ (P+1) = 455 MHz / 256 = 1.76 MHz.
NOTE: The frequency at U601, pin 40, is seldom exactly equal to F
in
divided by P or P+
1 because the prescaler is continuously changing from one division to the other. In
the above example, P is 255 and P+ 1 is 256.
4.1.4.1.1 Incorrect Values at U602, Pin 19
1. If the reference frequency is not equal to 6.25 kHz (800/900 MHz) or 5.0 kHz (VHF/UHF),
check U602-7 for 300 kHz, 0- to 9-V square wave. Then:
a. If 300 kHz is good, check the power to U602, pins 30 and 37. Also, check the serial data
programming by pressing and holding the mode select button and probing pins 11, 12,
and 13. The 0- to 5-V logic waveforms should appear similar to the following:
NOTE: The above waveforms are crude representations.
b. If the programming appears normal and the power supplies have all checked out correctly,
the out-of-lock condition is caused by a defective synthesizer IC (U602).
2. If 300 kHz is not present, check U602, pin 16, for 2.1 MHz, 1.5 Vp-p square wave.
a. If the signal is present and the power to the chip is normal, the condition is caused by a
defective synthesizer IC (U602).
b. If the signal is not present, check for the same signal at U601, pin 18. If not on pin 18,
check the reference oscillator output signal at U601, pin 21; it should be 16.8 MHz,
300 mVp-p. If the reference oscillator signal is present and the prescaler power supply
voltages are normal, the prescaler IC(U601)is defective.
c. If the reference oscillator signal (16.8 MHz) is not present on U601, pin 21, check U600,
pin 1 for 3.25 Vdc, pin 2 for ground, pin 3 for 16.8 MHz at 300 mVp-p, and pin 4 for
5 Vdc.
NOTE: Before concluding that the reference oscillator is defective, remove it from the
board, power it up externally, and test it as an independent circuit.
PIN 13 (Chip Select)
PIN 12 (Data)
PIN 11 (Clock)
68P81076C25-C July 1, 2002
4.1.4.1.2 Incorrect Values at U602 Pin 25 (MODULUS CONTROL)
If the frequency is not 6.25 kHz (or 5.0 kHz for VHF), verify the proper VCO pin-shift logic. See VCO
block diagram (Figure 4-1) for pin-shift logic. Also, check the VCO feedback for approximately -10 to
5 dBm at proper VCO frequency. Use the following table:
If the VCO is running at approximately the correct level and frequency, proceed to Incorrect Values
at U602, pin 27.
4.1.4.1.3 Incorrect Voltage at Positive Steering Line
Verify that the VCO is running; check VCO feedback for -10 to 0 dBm. Verify that the feedback buffer
(if used) is working check U601-1.
4.1.4.1.4 Incorrect Values at U602, pin 27
Check prescaler (U601) operation; U601-40 should be:
EQUATION: F = F
vco
/(P or P+1)
4.1.4.2 Review of Synthesizer Fundamentals
1. The synthesizer is a phase-locked loop system with a sample-and-hold phase detector.
2. In a locked system, the prescaler, in conjunction with the counters in the synthesizer chip,
counts the VCO frequency down to the reference frequency. Think of this division process as
a time domain function rather than frequency domain.
3. For each reference period (if using 6.25 kHz reference), you have 160 microseconds in which
the VCO frequency is divided by N. Recall the equations:
EQUATION: N = F
vco
/ F
r
EXAMPLE: N = F
vco
/ F
r
= 450 MHz / 6.25 kHz or 72,000
EQUATION: A = (fractional remainder of N/P) (P)
EXAMPLE: A = N/P = 72,000 / 255 = 282.3529; .3529 x 255 Or A=90
EQUATlON: B = [N - {A x (P + 1)}] / P
EXAMPLE: B = [72,000 - {90 x (255 +1)}] or 192
Table 4-3. Feedback Frequency Ranges
Band VCO Feedback Frequency
VHF TX Freq x 2 or
RX Freq + 109.65 MHz
UHF TX Freq or
RX Freq + 109.65 MHz
800 MHz TX Freq / 2 or
(RX Freq - 109.65 MHz) / 2
July 1, 2002 68P81076C25-C
At 450 MHz, there are 72,000 counts of 2.22 nanoseconds each per reference period. When
modulus control (MCT) is high, the VCO output is prescaled by 255 (see the diagram below). The
output frequency of the prescaler is 1.765 MHz which corresponds to a period, per-cycle, of 567
nanoseconds. The A counter runs long enough to count down 90 cycles which equals 51
microseconds. When MCT is low, the prescaled output equals 1.758 MHz which corresponds to a
period of 569 nanoseconds. The B counter counts 192 cycles which takes 109 microseconds. The
total time required for proper loop division is thus 160 microseconds (the reciprocal of 6.25 kHz).
4.1.4.3 Second VCO Checks
1. Check for 300 kHz reference frequency at U601, pin 31.
2. Check for 0.5 to 4.0-V phase detector output at U601, pin 30.
3. Check for -12 to -16 dBm at 109.2 MHz feedback (U601, pin 26).
4. Check the divide-by-N test point for a 700-mV p-p waveform at 300 kHz (the second VCO
frequency divided by 364). See the example below.
NOTE: The second VCO circuit is external to U601 and, while it does depend on U601 for proper
phase-locking, it should free-run, open-loop, at some frequency, if U601 fails. If the 8.8-V
super filter and the oscillator are dead, U601 is defective.
4.1.4.4 Troubleshooting the Back-End
Refer to "Chart C.1 RF Board Back-End," on page 5-3.
COUNTER:
COUNTER RESET:
PRESCALER DIVIDES BY:
TIME (Microseconds):
LOOP DIV. TIME ( Sec):
A
90
255
51
A
90
255
51
A
90
255
51
B
192
256
109
B
192
256
109
B
192
256
109
LOW LOW LOW
HI HI HI MODULUS
CONTROL:
160 160 160
109.2 MHz
364
= 300 kHz
68P81076C25-C July 1, 2002
4.1.5 Standard Bias Table
Table 4-4, below, outlines some standard supply voltages and system clocks which should be
present under normal operation. These should be checked as a first step to any troubleshooting
procedure.
Table 4-4. Standard Operating Bias
Signal Name Nominal Value Tolerance Source
UNSW_B+ 13.8 Vdc 11.0-16.6 Vdc J501
SW_B+ 13.8 Vdc 11.0-16.6 Vdc J501
+5V 5.0 Vdc 10% J501
+5VA 5.0 Vdc 10% J501
RESET 5.0 Vdc +0.7, - 1.0 Vdc J501
POR* 5.0 Vdc +0.7, - 1.0 Vdc J501
DSP_RST* 5.0 Vdc +0.7, -1.0 Vdc U204
ADSIC_RST* 5.0 Vdc +0.7, -1.0 Vdc U204
DCLK 33.0000 MHz
a
a. This number may vary due to the operating mode of the radio
when it is measured. The ADSIC contains a divider which may
divide the clock by a modulus of 2. Therefore, the actual
frequency measured may be clock/2
n
. The most common
frequency will be 16.5000 MHz nominal.
500 ppM U406
ODC 2.4 MHz 30 ppM ABACUS
ECLK 1.8432 MHz 500 ppM U204
IRQB* 8 kHz
b
b. This 8 kHz clock will be present only after the MCU has
successfully programmed the ADSIC after power-up. This is a
good indication that the ADSIC is at least marginally
operational.
500 ppM U406
+5V 5.0 Vdc 10% U202
RX_5V
c
c. Receive mode only.
5.0 Vdc 10% U106
July 1, 2002 68P81076C25-C
4-10 Troubleshooting Procedures: ASTRO Spectra Plus Procedures
4.2 ASTRO Spectra Plus Procedures
This section will aid you in troubleshooting a malfunctioning ASTRO Digital Spectra Plus radio. It is
intended to be detailed enough to localize the malfunctioning circuit and isolate the defective
component.
Please review sections 4.1.1 Handling Precautions on page 4-1 and 4.1.2 Voltage Measurement and
Signal Tracing on page 4-2 before continuing. Also, for information on troubleshooting the RF board,
refer to Section 4.1.4 RF Board Troubleshooting on page 4-5.
4.2.1 ASTRO Spectra Plus Power-Up Self-Check Errors
Each time the radio is turned on the MCU and DSP perform some internal diagnostics. These
diagnostics consist of checking the programmable devices such as the FLASH ROMs and SRAM
devices. At the end of the power-up self-check routines any errors produced are recorded. If an error
exists, use the Customer Programming Software (CPS) from the RS232 bus on front and rear of the
radio to read the error code. Table 4-5 lists self-check error codes, describes the codes, and gives
the recommended corrective action.
Table 4-5. ASTRO Spectra Plus Power-Up Self-Check Error Codes
Error Code Description Corrective Action
01/02 FLASH ROM codeplug Checksum Non-Fatal
Error
Reprogram the codeplug
01/12 Security Partition Checksum Non-Fatal Error Send radio to depot
01/20 ABACUS Tune Failure Non-Fatal Error Turn radio off, then on
01/22 Tuning Codeplug Checksum Non-Fatal Error Send radio to depot
01/81 Host ROM Checksum Fatal Error Send radio to depot
01/82 FLASH ROM codeplug Checksum Fatal Error Reprogram the codeplug
01/88 External RAM Fatal Error --Note: Not a checksum
error
Send radio to depot
01/90 General Hardware Failure Fatal Error Turn radio off, then on
01/92 Security Partition Checksum Fatal Error Send radio to depot
01/93 FLASHport Authentication Code Failure Send radio to depot
01/98 Internal RAM Fail Fatal Error Send radio to depot
01/A2 Tuning Codeplug Checksum Fatal Error Send radio to depot
02/81 DSP ROM Checksum Fatal Error Send radio to depot
Most of the ICs are static-sensitive devices. Do not
attempt to troubleshoot or disassemble a board
without first referring to the following Handling
Precautions section.
!
C a u t i o n
68P81076C25-C July 1, 2002
Troubleshooting Procedures: ASTRO Spectra Plus Procedures 4-11
NOTE: In cases of multiple errors, the codes are logically ORd and the results displayed.
4.2.2 ASTRO Spectra Plus Power-Up Self-Check Diagnostics and Repair
The following are additional action items to be utilized for the diagnosis and resolution of the error
codes shown in Table 4-5:
02/88 DSP RAM Fatal Error --Note: Not a checksum
error
Turn radio off, then on
02/90 General DSP Hardware Failure (DSP startup
message not received correctly)
Turn radio off, then on
09/10 Secure Hardware Failure Turn radio off, then on
09/90 Secure Hardware Fatal Error Turn radio off, then on
Error Code 01/02 This non fatal error will likely recover if the radio's power is cycled. In the event that
this does not resolve the issue, the radio should be reflashed. As a last resort, the
FLASH ROM U301 should be replaced.
Error Code 01/12 The radio should be sent to the depot for reflahing of the security codeplug.
Error Code 01/20 Cycling radio power should resolve this issue.
Error Code 01/22 The radio should be sent to the depot for reflash of the tuning codeplug followed by
re-tuning of the radio.
Error Code 01/81 The radio should be sent to the depot for reflashing of the host code.
Error Code 01/82 The radio should be sent to the depot for reflashing of the radio codeplug.
Error Code 01/88 Reflashing of the radio should first be performed. If this fails to resolve the issue,
then replacement of the SRAM U302 is necessary.
Error Code 01/90 Cycle power to radio. Continued failure indicates a likely IC failure. In this event,
radio should be sent to the depot for isolation and repair of the problem IC.
Error Code 01/92 The radio should be sent to the depot for reporgramming of the security codeplug.
Error Code 01/93 The radio should be sent to the depot for reflashing of the host code.
Error Code 01/98 Send radio to the depot for replacement of the SRAM U302.
Error Code 01/A2 The radio should be sent to the depot for reflashing of the tuning codeplug followed
by re-tuning of the radio.
Error Code 02/81 The radio should be sent to the depot for examination and/or replacement of either
the FLASH U301, or the PATRIOT MCU/DSP U300.
Error Code 02/88 Cycle power to the radio. If this does not fix the problem, then the radio should be
sent to the depot for reflashing of the DSP code. Continued failure requires
examination and/or replacement of the SRAM U302.
Error Code 02/90 Cycle power to the radio. If this fails to fix the problem, then the radio should be
sent to the depot for reflashing of the DSP code. Continued failure may require
replacement of U300, the PATRIOT MCU/DSP.
Table 4-5. ASTRO Spectra Plus Power-Up Self-Check Error Codes (Continued)
Error Code Description Corrective Action
July 1, 2002 68P81076C25-C
4-12 Troubleshooting Procedures: ASTRO Spectra Plus Procedures
4.2.3 ASTRO Spectra Plus Standard Bias Table
Table 4-6 outlines some standard supply voltages and system clocks which should be present under
normal operation. These should be checked as a first step to any troubleshooting procedure.
Error Code 09/10 Cycle power to the radio. If this fails then follow instructions as per troubleshooting
chart C.32
Error Code 09/90 Cycle power to the radio. If this fails then follow instructions as per troubleshooting
chart C.32
Table 4-6. ASTRO Spectra Plus Standard Operating Bias
Signal Name
Nominal
Value
Tolerance Probe Point
SINE32K 32.768 kHz +/- 400 ppm R428
CKIH 16.8 MHz C326
16_8MHz 16.8 MHz TP401
POR 3.0 V +/- 5% J501-29
RESET_OUT 3.0 V +/- 5% J501
VCC1.8 1.80 Vdc +/- 5% R419
VCC3.0 3.0 Vdc +/- 5% R420
SW_B+ 13.8 Vdc 11.0-16.6 Vdc J501-35
VCC5 5.0 V +/- 10% J501-34
68P81076C25-C July 1, 2002
Troubleshooting Procedures: VCO Procedures 4-13
4.3 VCO Procedures
This section provides band-specific troubleshooting procedures for the VCO.
4.3.1 VHF Band
Use these instructions along with the Theory of Operation, the block diagram, and the schematic to
help isolate failures: first, to the individual circuits, and finally, to the failing piece part.
4.3.1.1 VCO Hybrid Assembly
The VCO hybrid substrate is glued to the carrier board. The hybrid is not a field-repairable assembly.
If a failure is indicated in this assembly, replace the complete hybrid. You will need a hot-air source to
heat and soften the glue to separate the hybrid from the carrier board. If no hot-air source is
available, replace the entire carrier board.
4.3.1.2 Out-of-Lock Condition
The probable cause of an out-of-lock condition is a failure in the synthesizer circuit. (See Section
4.1.4.2 Review of Synthesizer Fundamentals on page 4-7.) If the voltages on the AUX 1* and AUX
2* lines do not conform to Table 4-7, troubleshoot the synthesizer.
If the AUX 1* and AUX 2* voltages are correct but the synthesizer feedback level is not within the
range indicated, troubleshoot the first buffer on the VCO carrier board. If no problem is found with the
first buffer and the level out of the VCO is below that indicated on the block diagram, then replace the
VCO assembly.
July 1, 2002 68P81076C25-C
4-14 Troubleshooting Procedures: VCO Procedures
If the AUX 1* and AUX 2* voltages are correct and the synthesizer feedback level is correct but an
out-of-lock condition persists, troubleshoot the synthesizer.
Figure 4-1. VCO Block Diagram - VHF Band
RANGE AUX1 AUX2
RX1 >8Vdc >8Vdc
RX2, TX1 <1Vdc >8Vdc
TX2 >8Vdc <1Vdc
TX3 <1Vdc <1Vdc
GPW-5867-O
VCO
AUX 1 AUX 2
J601-11 J601-9
SF 8.6
J601-12
9.6
J601-2
PIN DIODE
DRIVERS BIAS
BIAS
J601-3
J601-4
+SL
-SL
MOD
J601-10
Q3645
VCO SUBSTRATE
LOW
PASS
FILTER
PAD
Q3675
J3642
PAD
PAD
BIAS
RX INJECTION TO
RECEIVER FRONT
END > + 19dBm
SYNTHESIZER
FEEDBACK
J601-1
K9.4
5V
REG.
U3675
K9.4
5V
U3676
Q3676
J601-5
J3641
TX INJECTION TO
PA > +9dBm
_.
. 2
68P81076C25-C July 1, 2002
4.3.1.3 No or Low Output Power (TX or RX Injection)
Use the test cables listed in the Service Aids section in the ASTRO Digital Spectra and Digital
Spectra Plus Mobile Radios Basic Service Manual (68P81076C20). Measure the power at the
synthesizer feedback port - if it is not within the range specified in the block diagram, troubleshoot
the first buffer. If failure is found in the first buffer, replace the defective component. If no failure is
found in the first buffer and the level out of the VCO (measured with an RF millivoltmeter) is below
that indicated in the block diagram, then replace the VCO assembly.
If the level at the synthesizer feedback port is within the indicated range, then troubleshoot the
divider, RX, and TX buffer.
4.3.1.4 No or Low Modulation
Under standard test conditions with a 1 kHz tone injected and 4.5 kHz (50OHz) deviation, there
should be at least 0.8-V peak-to-peak present on J601, pin 10 (modulation input). (See the circuit
board overlay for location.) If this level is not present, troubleshoot the audio circuitry, if it is present,
check the VCO modulation circuitry.
4.3.2 UHF Band
Use these instructions along with the Theory of Operation, the VCO block diagram, and the
schematic to help isolate failures, first to the individual circuits, and finally to the failing piece part.
If a failure is indicated in this assembly, replace the complete hybrid. You will need a hot air source
for heating and softening the glue to separate the hybrid from the carrier board. If no hot air source is
available, replace the entire carrier board.
Table 4-7. VCO Frequency
Mode AUX 1 AUX 2 Radio Freq (MHz) VCO Freq (MHz) Port Freq (MHz) Port
VHF RANGE 1
RX
RX
TX
TX
TX
HIGH
LOW
LOW
HIGH
LOW
HIGH
HIGH
HIGH
LOW
LOW
136.00 - 158.35
158.35 - 162.00
136.00 - 145.20
145.20 - 157.00
157.00 - 162.00
245.65 - 268.00
268.00 - 271.65
272.00 - 290.40
290.40 - 314.00
314.00 - 324.00
245.65 - 268.00
268.00 - 271.65
136.00 - 145.20
145.20 - 157.00
157.00 - 162.00
(RX)
(RX)
(TX)
(TX)
(TX)
VHF RANGE 2
RX
RX
TX
TX
TX
HIGH
LOW
LOW
HIGH
LOW
HIGH
HIGH
HIGH
LOW
LOW
146.00 - 166.15
166.15 - 174.00
146.00 - 150.00
150.00 - 162.00
162.00 - 174.00
255.65 - 275.80
275.80 - 283.65
292.00 - 300.00
300.00 - 324.00
324.00 - 348.00
255.65 - 275.80
275.80 - 283.65
146.00 - 150.00
150.00 - 162.00
162.00- 174.00
(RX)
(RX)
(TX)
(TX)
(TX)
July 1, 2002 68P81076C25-C
4.1.4.2 Review of Synthesizer Fundamentals on page 4-7.) If the voltages on the AUX 1*, AUX 2*, or
-8V lines at P0601 do not conform to the values shown in Figure 4-2, check the pin shift circuitry on
the carrier board for proper operation. If no trouble is found, troubleshoot the synthesizer.
If the AUX1*, AUX2*, and -8-V voltages are correct at P0601, check the pin shift circuitry on the
carrier board for proper operation. If no problem is found, probe the level of the synthesizer feed
back at P0601-1 using an RF millivoltmeter. The meter should indicate greater than -15 dBm. If it
does not, troubleshoot the synthesizer feedback circuitry; then troubleshoot the first buffer on the
VCO carrier board. If no trouble is found and the level out of the VCO is below that indicated on the
block diagram, then replace the VCO assembly.
If the AUX 1*, AUX2*, and -8-V voltages are correct and the synthesizer feedback level is correct but
an out-of-lock condition persists, troubleshoot the synthesizer.
Using an RF millivoltmeter, probe the synthesizer feedback level at P0601-1. If the meter indication
is not greater than -15 dBm, troubleshoot the first buffer. If no failure is found and the level out of the
VCO (measured into 50 ohms at the RF output of the hybrid) is below that indicated in the block
diagram, then replace the VCO assembly.
If the level of synthesizer feedback at P0601-1 is correct, troubleshoot the doubler, second buffer,
and then the RX/TX pin diode switch.
68P81076C25-C July 1, 2002
Under standard test conditions with a 1 kHz tone injected and 4.5 kHz deviation, there should be 700
mV (RMS) 20% present on P0601-10. If this level is not present, troubleshoot the modulation circuit
on the carrier board and then troubleshoot the audio circuitry. If the proper level is present,
troubleshoot the modulation circuitry on the VCO kit. If no failure exists, replace the VCO.
Figure 4-2. VCO Block Diagram - UHF Band
OSC
BUFFER
1
2 3 4
5
6 9 10 11
12
GPW-5861-A
P0601
-8V
AUX1
AUX2
MODULATION
SYNTHESIZER
FEEDBACK
RX
INJECTION
(12 dBm TYPICAL)
* MEASURED WITH VCO OUTPUT
TERMINATED INTO 50 OHMS.
AUX1, AUX2 HIGH 8V
AUX1, AUX2 LOW 1V
>
_ <
_
PINSHIFT
CIRCUITRY
MODULATION
CIRCUITRY
1ST
BUFFER
2ND
BUFFER
X2
DOUBLER
FEEDBACK
BUFFER
SYNTH
ACTIVE
BIAS
P0601
8 dBm Typical*
TX
INJECTION
(16 dBm TYPICAL)
K9.4
9.6 8.6 +SL -SL
July 1, 2002 68P81076C25-C
4.3.3 800 MHz Band
Use these instructions along with the Theory of Operation, the block diagram, and the schematic to
help isolate failures, first, to the individual circuits, and finally to the failing piece part.
If a failure is indicated in this assembly, replace the entire carrier board.
4.1.4.2 Review of Synthesizer Fundamentals on page 4-7.) If the voltages on the AUX 1* and AUX
2* lines do not conform to the table in Figure 4-3, troubleshoot the synthesizer.
If the AUX 1* and AUX 2* voltages are correct but the synthesizer feedback level is not within the
range indicated, troubleshoot the first buffer on the VCO carrier board. If no problem is found with the
first buffer and the level out of the VCO is below that indicated on the block diagram, check J straps
MP9656-MP9668. If no problem is found with these, replace the entire carrier board.
If the AUX 1* and AUX 2* voltages are correct and the synthesizer feedback level is correct but an
out-of-lock condition persists, troubleshoot the synthesizer.
Figure 4-3. VCO Block Diagram - 800 MHz Band
FREQUENCY
RANGE
AUX1 AUX2 OUTPUT FREQUENCY
RX HI HI 741.35 - 759.35
TX HI LOW 806.00 - 824.00
TA LOW LOW 851.00 - 869.00
OSC
VCO HYBRID
+1.0 dBm
Min
1ST
BUFFER
PAD
DOUBLER
2ND
BUFFER
PAD
CARRIER BOARD SYNTH FEEDBACK RX INJ
RX = 370.675 - 379.675
TX = 403.000 - 412.000
TA = 425.500 - 434.500
6.0 dBm + 7 dBm
-
-
GPW-6395-O
TX/RX
SWITCH
TX
INJ
741.35 - 759.35
TX = 806 - 824
TA = 851 - 869
+
S
L
A
U
X
1
A
U
X
2
8
.
6
-
S
L
9
.
6
K
9
.
4
M
O
D
68P81076C25-C July 1, 2002
Use the test cables listed in the Service Aids in the ASTRO Digital Spectra and Digital Spectra Plus
Mobile Radios Basic Service Manual (68P81076C20). Measure the power at the synthesizer
feedback port-if it is not within the range specified in the block diagram, troubleshoot the first buffer.
If failure is found in the first buffer, replace the defective component. If no failure is found in the first
buffer and the level out of the VCO (measured with an RF millivoltmeter) is below that indicated in
the block diagram check J straps MP9656-MP9668. If no problem is found with these, replace the
entire carrier board.
If the level at the synthesizer feedback port is within the indicated range, then troubleshoot the
doubler, second buffer, and PIN diode switch.
Under standard test conditions with a 1 kHz tone injected and 4.6 kHz (250 Hz) deviation, there
should be between 500 and 1000 mV present on J601, pin 10 (modulation input). (See the circuit
board overlay for location.) If this level is not present, troubleshoot the audio circuitry. If it is present,
check J601, pin 4 (NEG S.L.). The negative steering line should be -4.0 V (0.3 V). If this is not
correct, check the negative steering line circuitry on the RF board and/or check R9651 and C9651 on
the carrier board. If no problem is found, check J straps MP9656-MP9668. If no problem is found
with these, replace the entire carrier board.
July 1, 2002 68P81076C25-C
4-20 Troubleshooting Procedures: Receiver Front-End (RXFE)
4.4 Receiver Front-End (RXFE)
This section provides band-specific troubleshooting procedures for the receiver front-end.
4.4.1 VHF Band
This information will help you troubleshoot the Spectra radio. Use this information, along with the
Theory of Operation, to diagnose and isolate the cause of failures. The principle tools needed to
troubleshoot a circuit to the component level are the schematic and the Theory of Operation.
In addition to the schematic and theory, this section includes a troubleshooting chart that will guide
you through a sequence of tests and checks designed to isolate problems.
Prior to troubleshooting, it is important to review the Theory of Operation including specific
precautions and troubleshooting methods.
4.4.2 UHF Band
precautions and troubleshooting methods. Because much of the radios circuitry operates at
500 MHz, measurements must be taken carefully.
4.4.3 800 MHz Band
precautions and troubleshooting methods. Because much of the radios circuitry operates at 800
MHz, measurements must be taken carefully.
68P81076C25-C July 1, 2002
Troubleshooting Procedures: Power Amplifier Procedures 4-21
4.5 Power Amplifier Procedures
This section provides band-specific troubleshooting procedures for the power amplifier.
4.5.1 VHF Band
Theory of Operation, to diagnose and isolate the cause of failures. This section includes
troubleshooting information that will help you test and check the circuits to localize and isolate
problems.
precautions and troubleshooting methods. Because much of the radio's circuitry operates at VHF
does exist in all measurements and tests at VHF frequencies.
4.5.1.1.1 General Troubleshooting and Repair Notes
Most of the common transmitter symptoms are not necessarily caused by failure of circuits on the PA
board. Failure of command board or synthesizer circuits can disable the transmitter. The initial
troubleshooting effort should be toward isolating the problem to one of these areas. If either the
control voltage or keyed 9.4 V are zero, then the problem is likely to be in the control circuit or
synthesizer. If those voltages are present, then the problem is more likely in the power amplifier
circuit.
If, for diagnostic reasons, a chip component needs to be removed to facilitate testing, such as a
series capacitor removed to allow for signal insertion, then the component(s) returned to the circuit
should be new parts. The application of a soldering iron to many chip components will tend to cause
leaching which could lead to failure.
If the harmonic filter is damaged and needs to be replaced, then removal and replacement requires
the use of a hot-air source capable of reflowing the solder beneath the filter hybrid. When replacing
it, add small amounts of fresh solder paste to the silver regions beneath the ceramic to assure
adequate electrical ground contact. Save the original input and output connectors (J-straps); these
are not included with the replacement kit. No tuning is required. The harmonic filter may be ordered
separately, but if the PA kit is ordered a filter kit comes with the PA kit.
After a PA board is replaced, or if any power control circuitry components are replaced, readjust the
power according to instructions in the ASTRO Digital Spectra and Digital Spectra Plus Mobile Radios
Basic Service Manual (68P81076C20).
Due to high operating frequencies, you must use specified Motorola parts when component
replacement is necessary. Substitute components may not work. It is also critical that you use great
care when replacing parts. Excessive solder or flux, longer than original leads on coax connectors,
misorientation of parts and other commonly benign imperfections, may cause the radio's
performance to degrade.
Bench testing the high-power Spectra PA is most easily accomplished if a Spectra control head,
control cable, and power cable are available on the test bench. This greatly simplifies the
troubleshooting as several supply voltages are provided by the command board. Proper operation of
the command board circuitry can be simultaneously verified.
July 1, 2002 68P81076C25-C
4-22 Troubleshooting Procedures: Power Amplifier Procedures
Begin troubleshooting by connecting an RF power meter and appropriate power load to the antenna
connector. Connect the control cable and the power cable. Make sure the ignition sense lead is also
connected to the positive lead of the power supply. Note that a regulated DC power supply capable
of at least 30 A. is necessary to power a high-powered Spectra transmitter. Remove the radio bottom
cover. Remove the PA shield by pulling straight up on the plastic handle. This must be done carefully,
as the edge of the PA shield can damage components on the PA board if it is removed unevenly. Set
the power supply to 13.4 V. The radio may now be turned on. All critical voltages may be measured
at connector J1 from the top side of the PA board. A diagram of the connector pin-out, as viewed
from the top side of the PA board, is shown below.
Figure 4-4. Connector Pin-Out - High-Power Amplifier
Key the transmitter. The RF power meter should read at least 100 Watts if it is calibrated. If power is
low, the power set must be checked first before suspecting a defective PA or command board. This
may be checked using a PC and RSS software. Alternatively, front panel programming may be used.
Please refer to the ASTRO Digital Spectra and Digital Spectra Plus Mobile Radios Basic Service
Manual (68P81076C20) for programming instructions.
If correct power output can not be obtained by following the power set procedure outlined in the
ASTRO Digital Spectra and Digital Spectra Plus Mobile Radios Basic Service Manual
(68P81076C20), it is possible that current limit may be improperly set. This can not be adjusted
using front panel programming. A PC with RSS must be used. A simple way to check for current limit
engagement is to temporarily short out the current sense resistor R3849 with a piece of 12- or 14-
gauge wire. If full power is restored, then RSS must be used to properly set current limit.
12 10 8 6 4 2
11 9 7 5 3 1
Pin Configuration of J1
As Viewed From Top of PA Board
1 Control Voltage Limit
2 Control Voltage Drive
3 Current Sense +
4 Key 9.4V
5 Filtered A+
6 Temp-Sense
7 Not Connected
8 Forward Power Detect
9 9.6V
10 Current Sense
11 Not Connected
68P81076C25-C July 1, 2002
If it is verified that both power set and current limit are not related to the power problem, then the
synthesizer output must be checked. A milliwatt meter connected to the TX injection cable should
indicate at least 10 mW of injection power during key-up. If this is not the case, refer to the RF board
and VCO sections of this manual for troubleshooting procedures.
Table 4-8. Power Control DC Voltage Chart
LOCATION
RX MODE TX MODE
COMMENTS LOW TYP HI LOW TYP HI
J1
1 0 0 2.0 3.2 Control Voltage Limit
2 0 2.0 7.0 10.0 Drive Voltage
3 10.8 13.6 16.5 10.0 13.0 16.0 Current Sense +
4 0 0 0 9.2 9.4 9.8 Keyed 9.4
5 10.8 13.6 16.5 10.0 13.0 16.0 A+ to Command Board
6 0 1.2 Temp Sense (cutback begins at 3.3-V)
7 - - - - - - Key (no pin)
8 0 13.0 9.3 5.0 Forward Detect Voltage
10
11
9.4
10.8
9.6
13.6
9.9
16.5
9.4
9.8
9.6
12.8
9.9
15.8
9.6-V Supply from Command Board
Current Sense - (voltage delta 150 mV)
12 - - - - - - Key (no pin or wire)
U500
1 0 0 0 0 0 0 Ground
2 0 3.2 Control AMP Input
3 0 0 0 0 0 0 Control AMP Input (not used)
4 0 0 2 3.2 Control Voltage Limit (cutback at 3.3 V)
5 9 0 N.C.
6 1.5 3.0 4.5 1.5 3.0 4.5 Power Set from D-A (max power at 1.5 V)
7 0 1.5 3.0 4.5 Power Set Buffer Out
8 0 1.3 3.5 6.0 Coupler Buffer Out
9 0 1.3 3.5 6.0 Forward Detect Volt
10 0 0 Reflected Power Detect (not used)
11 0 1.3 3.5 6.0 Same as pin 8 (not used)
12 0 0 1.2 6.0 Thermister Buffer out (increases as PA gets hot)
July 1, 2002 68P81076C25-C
13 0 0 1.2 6.0 Thermister Buffer in
14 5.0 5.0 5-V Sense Input (follows pin 20 0.1 V)
15 4.9 5.0 5.7 4.9 5.0 5.7 5-V Current Limit (limits at 5.7 V)
16 5.0 5.7 6.4 5.0 5.7 6.4 5-V Series Pass Drive (6.4 at max current)
17 9.5 9.6 9.9 9.5 9.6 9.9 9.6-V Sense Input
18 7 7 5-V Reg. Compensation Capacitor
19 5.7 5.7 N.C.
20 4.9 5.0 5.1 4.9 5.0 5.1 5-V Reference Input (UNSW5V)
21 1.2 1.2 9.6-V Reg. Compensation Capacitor
22 0 0 N.C.
23 0.9 9.6 1.2 9.6 9.6-V Series Pass Drive
24 2.9 3.3 Regulator Enable/Compensation
25 - - - - - - 9.6-V Programming (N.C.)
26 0 0 N.C.
27 13.6 13.6 N.C.
28 - - - - - - 9.6-V Programming (N.C.)
29 - - - - - - 9.6-V Programming (N.C.)
30 - - - - - - 9.6-V Programming (N.C.)
31 0 0 0 0 0 0 Ground
32 10.8 13.6 16.5 10.0 13.0 16.0 Decoupled A+
33 4.0 5.0 0 0.2 TX PA Enable (from U520-25)
34 0 1.3 Control AMP one-shot
35 0 0 Lock (5 V of Synth Out of Lock)
37 10.8 13.6 16.3 10.0 13.0 16.0 A+ (Current Sense +)
38 10.8 13.6 16.3 10.0 13.0 16.0 Current Sense - Voltage Delta 150 mV
39 0 9.2 9.4 9.8 Keyed 9.4-V in
40 1.5 3.0 4.5 1.5 3.0 4.5 Current Limit D-A (max current at 4.5 V)
Table 4-8. Power Control DC Voltage Chart (Continued)
LOCATION
RX MODE TX MODE
J1
68P81076C25-C July 1, 2002
If the command board and synthesizer are functioning properly, the PA must be defective. Details on
troubleshooting each circuit of the PA follow.
4.5.1.1.2 PA Functional Testing
NOTE: When setting or measuring RF power at VHF follow these guidelines to avoid measurement
errors due to cable losses or non-50-ohm connector VSWR:
- All coaxial cables should be low loss and as short as possible.
- Attenuators and 50-ohm loads should have at least 25 dB return loss.
- Mini UHF to 'N' adapter, P/N 58803671321, should be used at the antenna connector. All
other connectors should be 'N' type. No other adapters, barrel connectors, etc. should be
used.
Maximum input level to the PA is 20 mW. Too much input power could result in damage to the
LLA stage.
Methods of analyzing individual stages of the power amplifiers are detailed below. Most of the stages
are Class-C and must be analyzed under relatively high RF power levels. The following information
should help in isolation and repair of the majority of transmitter failures.
41 0 0 0 0 0 0 Ground
42 0 2.2 9.6 Control AMP Output (Approx 1/2-V Control)
43 1.3 7.0 Loop Integrator Capacitor
44 2.1 3.2 Control AMP Reference
Q0500E 13.0 13.0 A+ - CR0500 Drop
Q0501C 12.3 12.3 VQ0500E - B/E Drop
Q0501E 0.2 0.2 V pin 23 - B/E Drop
Q0503E 0 1.5 V pin 42 - B/E Drop (TX)
Q0503C 13.6 9.0
Q0504B 13.6 12.9 A+ - B/E Drop (TX)
LOCATION
RX MODE TX MODE
J1
July 1, 2002 68P81076C25-C
Testing Low-Level Amplifier (LLA) Circuitry
Proper operation of the LLA can be checked by monitoring the voltage across resistor R3804. The
voltage should measure in the range of 0.4 V to 1.0 V, depending on the value of control voltage. A
0.4-V reading corresponds to a low control voltage (4 to 5 V) and a 1.0-V reading corresponds to a
high control voltage (up to control voltage limit).
Measure LLA voltages according to Table 4-9. If the DC bias conditions are correct, check to see if
the LLA is providing drive power to Q3804. Do so by checking Q3804's collector current under
normal drive conditions, as follows:
Remove L3806 (be sure to reinstall after testing).
Solder wires to the remaining pads. Place an ammeter in series with Q3804 collector.
Check for 0.2 to 0.5 A. (depending on control voltage).
NOTE: With no RF drive to the input of the PA, Q3804 collector current should be zero.
NOTE: The LLA voltages change with different control voltages. An example of LLA voltages with
control voltage equal to 8.0 V and 6 V is shown.
If Q3804 draws no current under normal conditions, then check for short or open input cable, or for
defective parts in the matching circuitry between Q3801 and Q3804.
Testing Second Stage Circuitry Q3804
The second stage is a typical Class-C stage, except the base is biased with resistors R3809 and
R3810. The necessary conditions for proper operation of this stage are input drive power, and bias
conditions as shown in Table 4-9.
NOTE: If it is necessary to replace Q3804, use a hot-air blower to remove and replace the part. It is
important that the replacement device's case be properly soldered to its heatsink. Do so by
flowing a small bead of solder around the rim of the device while it is clamped in the hot-air
soldering device. The base and collector leads must be hand-soldered on the bottom side of
the board.
Table 4-9. LLA and 2nd Stage Typical Voltages
CONTROL
VOLTAGE
RF DRIVE OFF RF DRIVE ON
8.0 V 6.0 V 8.0 V 6.0 V
Q3801
Base
Collector
0.7
8.3
0.7
9.0
0.7
8.0
0.5
8.8
Q3802
Base
Collector
Emitter
7.7
2.0
8.3
8.4
1.4
9.0
7.5
2.3
8.0
8.2
1.2
8.8
Q3806
Base
Collector
Emitter
5.1
7.7
4.5
4.1
8.4
3.4
5.1
7.5
4.5
4.1
8.2
3.4
Q3804
Base
Collector
0.5
9.6
0.5
9.6
0.0
9.5
0.2
9.5
68P81076C25-C July 1, 2002
Troubleshooting the Driver Stage (Q3805)
Make sure A+ is at the collector.
Check for shorts and/or opens in the matching circuitry. Also look for faulty components
(cracked parts or parts not properly soldered).
Measure the DC resistance from base to emitter. It should be less than 1-ohm. If not, check
L3812 and L3809 for proper soldering, and replace if faulty.
Check the current drain of Q3805. Remove L3811 and R3819 and solder wires to the pads.
With an ammeter connected to these wires, check the collector current drain during transmit. It
should be around 2.0 to 4.0 A. If current drain is low, go to next step.
Desolder the base of Q3805 and bend its lead slightly so it does not contact the PC board.
Check the base-emitter and base-collector junction diode voltages using the diode check
function of a multimeter. Normal voltage drop should be near 0.6 V. If either junction is open or
short circuited replace the device.
Analysis of the Final Amplifier Stage (Q3870 and Q3871)
Extreme care must be taken when troubleshooting the final amplifier due to the high RF currents and
voltages present.
A visual inspection of the matching networks should be done first. Check for defective solder joints or
burned components. Good soldering of the transistor device leads is essential. Make sure A+
voltage is reaching the collector of each final device.
Check the base-emitter and base-collector junctions of the final devices by removing L3930, L3933,
R3859, and R4007. Using the diode check function of a multimeter, the junctions should have a
forward voltage drop close to 0.6 V. Replace a final device if it has an open or shorted junction.
Capacitors C3860, C3861, C3862, and C3863 are placed on the bottom side of the PA board
underneath the base leads of the final devices. Extreme care should be used when replacing these
parts. Exact positioning is critical. Inspect for solder shorts on these capacitors before installing the
PA board in the radio chassis.
Installation of the PA board into the radio chassis must be done carefully. The PC boards screws use
a T-15 Torx bit and should be torqued to 12 to 14 inch-pounds. The device screws use a T-8 Torx bit
and should be torqued to 12 to 14 inch-pounds. Always apply thermal compound to the area under
the device flanges before installing the PA board.
Current drain of the final amplifier may be checked by measuring the voltage across R3849 during
transmit. A voltage drop of 0.10 V to 0.15 V indicates the finals are drawing 10 to 15 A., which is
within the acceptable range.
Testing the Antenna Switch and Harmonic Filter
Use care when replacing the harmonic filter. Removal of the filter is best accomplished by heating
the filter/PC board assembly with a heat gun or heat blower until the solder joint reflows.
Verify that the receive path of the antenna switch and the harmonic filter are functioning by testing
the receiver insertion loss as follows:
Apply a low-level signal source at the antenna connector.
Verify the conditions indicated in Table 4-8 for RX tests.
Measure the power at the receive coax.
If the difference between the input and output (insertion loss) is less than 1 db, then the circuitry
is functioning properly.
July 1, 2002 68P81076C25-C
Additional antenna switch tests are:
Check CR3901, CR3902, and CR3903 using the diode check function of a multimeter. Note
that CR3903 is on the bottom side of the board. This diode affects the receive path only and is
unrelated to transmitter problems.
Check for proper DC current through the PIN diodes; correct current is indicated if
approximately 1.5 V is present at the junction of R3900 and L3900 during transmit.
4.5.1.1.3 Power Control and Protection Circuitry
Localizing Problems to a Circuit
Power leveling and current limiting are set to values detailed in the ASTRO Digital Spectra and
Digital Spectra Plus Mobile Radios Basic Service Manual (68P81076C20). These values will vary
from unit to unit, depending on the unique variations of each unit. If symptoms indicate that either of
these circuits have failed, verify that the radio has been properly aligned before investigating the
circuitry.
Temperature sense and control voltage limit are fixed by design and are not influenced by the
alignment of the radio. If symptoms indicate that these circuits have failed, then troubleshoot the
circuit.
The tests that follow are intended to provide a convenient means of verifying that a particular circuit
is functioning properly. These tests will isolate the failure to a minimum number of components.
Refer to the Theory of Operation and the schematic for information needed to identify the failed
component(s).
Temperature Sense Circuit Test
Temporarily install a 2.2k ohm resistor in parallel with RT3842. Key the transmitter and monitor the
output power. The power meter should read approximately one-half the rated power.
Control-Voltage-Limit Circuitry Test
Disconnect the transmitter injection cable from J3850. With all other connections in normal condition,
key the transmitter and monitor the control voltage at J1 pin 2. If the voltage exceeds 9.0 V,
troubleshoot the control voltage limit circuitry.
Current-Limiting Circuitry Test
When ready to adjust current limit, decrease the relative current limit value with the keyboard per
instructions. After several decrements, the current limit should begin to reduce power in 0.5 to 1.0
Watt increments. After this test, reset the current limit to its original value. If the circuitry does not
perform as indicated, troubleshoot the current limit circuitry.
Directional Coupler and Power-Leveling Test
The directional coupler combined with the RPCIC form a closed-loop power leveling circuit. This
circuit keeps forward power essentially constant under variations of line voltage, frequency, and
VSWR.
DO NOT measure bias directly at the PIN diodes while in transmit mode unless
TX injection is removed.
!
W A R N I N G
!
68P81076C25-C July 1, 2002
The directional coupler samples a small amount of forward power during transmit. This power is
rectified by a detector diode CR3904. This rectified DC voltage is fed back to the RPCIC where it is
compared to a reference voltage. An error voltage is generated which is ultimately translated into the
control voltage via RPCIC circuitry and amplifiers Q503 and Q504 on the command board. Control
voltage is routed to the LLA stage, thereby completing the feedback loop. In operation, the control
loop tends to maintain the forward detected voltage constant versus frequency and line voltage
variations. Proper operation can be observed by monitoring the forward detected voltage while
varying the supply voltage from 13.4 to 16.1 V. Forward detected voltage should not change more
than a few hundreths of a volt. Note that the forward power may not necessarily be level if one of the
other protection circuits such as temp-sense or current limit is engaged.
NOTE: If any part of the power leveling circuitry is replaced, perform the power set procedure. See
the ASTRO Digital Spectra and Digital Spectra Plus Mobile Radios Basic Service Manual
(68P81076C20) for details.
Miscellaneous Circuits and Notes
Diode CR3840 acts as a reverse protect diode. This diode also protects from over-voltage
conditions, as it has a Zener breakdown voltage of approximately 28 V. When replacing this diode,
care must be taken to place the diode with the cathode marking ring down (towards the PC board)
NOTE: The control voltage drive and K9.4 supplies from the command board are not current limited.
A momentary short on either of these supplies will cause damage to transistors on the
command board. Use caution when troubleshooting circuits that use these.
4.5.1.2 25/10 Watt Power Amplifier
In addition to the schematic and theory, this section includes troubleshooting information that will
help you test and check the circuits to localize and isolate problems.
precautions and troubleshooting methods. Because much of the radio's circuitry operates at high
frequency, measurements must be taken very carefully. Notes and cautions are added to the text to
alert the reader to this need in areas of greatest sensitivity
However, the need for extreme care does exist in all measurements and tests at high frequency.
Most of the common transmitter symptoms are caused by either failure of the power amplifier or a
failure in the control circuitry. The initial troubleshooting effort should be toward isolating the problem
to one of those two areas. If either the control voltage or keyed 9.4 V are zero, then the problem is
likely to be in the control circuit. If those voltages are present, then the problem is more likely in the
power amplifier circuit.
July 1, 2002 68P81076C25-C
NOTE: Due to high operating frequencies, you must use specified Motorola parts when component
replacement is necessary. Substitute components may not work. It is also critical that you use
great care when replacing parts. Excessive solder or flux, longer than original leads on coax
connectors, misorientation of parts, and other commonly benign imperfections may cause the
radio's performance to degrade.
To test the PA assembly for proper operation, perform the following steps:
1. Disassemble the PA assembly from the radio, leaving the power cable connected to the rear
connector. Replace the PA shield and cover. Disconnect the coax connectors and the ribbon
cable. Connect a power meter to the antenna port using minimum cable length.
a. When setting or measuring RF power, follow these guidelines to avoid measurement
errors due to cable losses or non 25/10-ohm connector VSVVR:
- All cables should be very short and have Teflon dielectric.
- Attenuators and 25/10-ohm loads should have at least 25 dB return loss.
- Mini UHF to 'N' adapter, P/N 58-80367B21, should be used at the antenna connector. All
used.
b. Maximum input level to the PA is 20 mW. Too much input power could result in damage to
the LLA stage.
2. Apply the input power and DC voltages indicated in Table 4-10 to the power amplifier
assembly. To make the DC connections, use small spring-clips or make a test adapter similar
to that shown in Figure 4-5.
Table 4-10. DC Voltages and Input Power Chart
Test Keyed 9.4 V
CONTROL
VOLTAGE
DRIVE
POWER IN
(mW)
A+ .V
Transmit 9.4 See note
a
a. Set initially to zero. Increase value until power equals 28 Watts or 9.2 V maximum.
Do NOT exceed 9.2 V.
10 13.4
Receive 0 0 0 13.4
68P81076C25-C July 1, 2002
3. Apply the required input power via an adapter cable. For this application, non 'N' type
connectors are acceptable.
Figure 4-5. PA Test Adapter, 25/10 Watt Power Amplifier
4. With the applied control voltage drive initially at 0 V, slowly increase the voltage until power
out equals 28 Watts. Power should rise smoothly with control voltage once the turn-on
threshold is reached. Control voltage drive should not exceed 9.2 V.
5. If 9.2 V does not produce 28 Watts, then a failure exists in the power amplifier circuit.
6. Refer to the voltage chart (see Table 4-11). Measure the indicated voltages. If they are not
within the limits shown in the chart, then a failure exists in the PA assembly.
7. If the voltages in the chart are correct, verify that the injection is at least 10 mW. (See the
VCO troubleshooting section.)
8. If no failure is located from the previous checks, troubleshoot the power control circuitry.
LOCATION
RX MODE TX MODE
COMMENTS
LOW TYP HI LOW TYP HI
P0853
1 Key (no pin or wire)
3 0 2.0 7.0 9.2 Control Drive Voltage
4 10.8 13.8 16.6 10.4 13.4 16.2 Current Sense +
5 0 0 0 9.2 9.4 9.8 Keyed 9.4
7 0 1.2 Temp Sense (cutback begins at 3.3 V)
8 Key (no pin)
1
2
3
4
5
6
7
8
9
10
11
12
A+ TO COMMAND
BOARD
A+ TO COMMAND BOARD
CURRENT SENSE +
CURRENT SENSE -
CONTROL VOLTAGE LIMIT
CONTROL VOLTAGE DRIVE
K9.4
FEMALE RECEPTACLE
CONNECTOR W 100 MIL
SPACING MATES TO P853
REGULATED 9.6V
V DETECT
TEMP SENSE
July 1, 2002 68P81076C25-C
11 9.4 9.6 9.9 9.4 9.6 9.9 9.6-V Supply from Command Board
12 10.8 9.8 13.1 15.9 Current Sense - (voltage delta 150 mV)
U0500
1 0 0 0 0 0 0 Ground
5 0 0 N.C.
7 0 0 1.5 3.0 4.5 Power Set Buffer Out
17 9.5 9.6 9.9 9.5 9.6 9.9 9.6-V Sense Input
19 5.7 5.7 N.C.
20 4.9 5.0 5.1 4.9 5.0 5.1 5-V Reference Input (UNSW5-V)
22 0 0 N.C.
25 9.6-V Programming (N.C.)
LOCATION
RX MODE TX MODE
COMMENTS
68P81076C25-C July 1, 2002
NOTE: For antenna switch transmit bias conditions, RF drive must be removed from PA.
26 0 0 N.C.
27 13.6 13.6 N.C.
31 0 0 0 0 0 0 Ground
32 10.8 13.6 16.5 10.0 13.0 16.0 Decoupled A+
35 0 0 Lock (5-V of Synth Out of Lock)
37 10.8 13.6 16.3 10.0 13.0 16.0 A+ (Current Sense +)
38 10.8 13.6 16.3 10.0 13.0 16.0 Current Sense - Voltage Delta 150 mV (30 Watt
only)
39 0 9.2 9.4 9.8 Keyed 9.4-V in
41 0 0 0 0 0 0 Ground
Q0500E 13.0 13.0 A+ - CR0500 Drop
Q0501C 12.3 12.3 VQ0500E - B/E Drop
Q0501E 0.2 0.2 V pin 23 - B/E Drop
Q0503E 0 1.5 V pin 42 - B/E Drop (TX)
Q0503C 13.6 9.0
Q0504B 13.6 12.9 A+ - B/E Drop (TX)
LOCATION
RX MODE TX MODE
COMMENTS
July 1, 2002 68P81076C25-C
4.5.1.2.3 Localizing Problems
Failure locations often can be determined by externally measured symptoms. Basic symptoms are
noted below with probable failure locations.
1. Low Power and High Current
- Check for improper load conditions caused by high VSWR external to the radio.
- Check output coax and mini-UHF connector.
- Check harmonic filter.
- Check output impedance-matching circuitry from the final device to the harmonic filter.
2. Low Power and Low Current
- If control voltage drive is equal to 9.2 V, then check per the above.
- If control voltage drive is less than 9.2 V, then check the control circuitry.
3. Power Intermittently Low (or Zero) and Current Less than 1 A. When Power Drops
- Check LLA stage.
4. Power Zero and Current Greater Than 3 A.
- Check harmonic filter, antenna switch, and matching circuits beyond final stage.
5. Power Zero and Current Between 1 and 3 A.
- Check driver and/or final stages.
6. Power Zero and Current Less Than 1 A.
- Check LLA/driver circuitry.
Table 4-12. Antenna Switch DC Voltage Chart
LOCATION TYPICAL RX
TYPICAL TX
NO PRE-
DRIVE
COMMENTS
CR3920 ANODE 0 1.6
CATHODE 0 0.8
CR3921 ANODE 0 0.8
CATHODE
CR3922 ANODE 0 <0.8
CATHODE
68P81076C25-C July 1, 2002
4.5.1.2.4 Isolating Failures
Methods of analyzing individual stages of the Power Amplifiers are detailed below. Most of the
stages are Class C and must be analyzed under relatively high RF power levels. Generators capable
of such levels may not be available in all service shops, therefore the tests below are arranged in
order of ascending power. This tends to allow the preceding stage to be the source of RF power for
testing the next stage.
The required DC and RF conditions are defined in Table 4-10. Measure LLA voltages according to
Table 4-13.
If the above DC bias conditions are correct, check to see if the LLA is providing drive power to the
pre-driver, Q3804. Do so by checking Q3804's collector current under normal drive conditions, as
follows:
Remove R3810 and L3806 (Be sure to reinstall after testing.)
Solder wires to the remaining pads.
Place an ammeter in series with Q3804 collector.
NOTE: With no RF drive to the input of the PA, Q3804's collector current should be zero.
If Q3804 draws no current under normal conditions, then check for shorted or open input cable, or for
defective parts in the input network or matching circuitry between Q3801 and Q3804. If all of the
above check out OK, then replace Q3801.
Table 4-13. LLA and Driver Typical Voltages
CONTROL
VOLTAGE
9.2 V 6.0 V 9.2 V 6.0 V
Q3801
Base
Collector
0.7
8.3
0.7
9.0
0.7
8.0
0.5
8.8
Q3802
Base
Collector
Emitter
7.7
2.0
8.3
8.4
1.4
9.0
7.5
2.3
8.0
8.2
1.2
8.8
Q3806
Base
Collector
Emitter
5.1
7.7
4.5
4.1
8.4
3.4
5.1
7.5
4.5
4.1
8.2
3.4
Q3804
Base
Collector
0.5
13.8
0.5
13.8
0.0
13.3
0.2
13.4
July 1, 2002 68P81076C25-C
Testing Driver Circuitry
The driver is a typical Class-C stage, except the base is biased with resistors R3809 and R3810. The
necessary conditions for proper operation of this stage are input drive power, and bias conditions as
shown in Table 4-13.
the board.
Troubleshooting the Final Device
Make sure A+ is at the final's collector; if not, check for shorts and/or opens.
Check the matching circuitry for shorts and/or opens. Also, check for faulty components.
Measure the resistance from base to emitter; it should be less than 1 ohm. If not, check for
proper soldering on L3852 and L3851; replace faulty component(s).
Current drain on the final device should be >3.5 A. for 25-Watt operation. If low current, go on to
the next step.
Remove L3851 from the board and check the base-emitter and base-collector junction diode
drops. Normal voltage drop should be between 0.4 and 1.0 V. If either junction is outside this
range, replace the final device.
NOTE: When replacing either the driver or final device, apply thermal compound on the heatsink
surface. Torque the screws to the correct value; see the ASTRO Digital Spectra and Digital
Spectra Plus Mobile Radios Basic Service Manual (68P81076C20).
Verify that most of this circuit is functioning properly by testing the receiver insertion loss as follows:
Apply the conditions indicated in Table 4-10 for RX tests.
If the difference between the input and output (insertion loss) is less than 1 dB, then the circuitry
- Check CR3920, CR3921, and CR3922 with an ohmmeter for forward and reverse
continuity.
- In the transmit mode, adjust control voltage for 28 Watts at the antenna connector. Check
for less than 10 mW at the end of the receive input cable. If power exceeds 10 mW, then
check CR3922 and associated circuitry. Receiver sensitivity can degrade if power at this
port exceeds 10 mW.
68P81076C25-C July 1, 2002
- Check for proper DC current through the PIN diodes; correct current is indicated if
approximately 1.5 V is present at the junction of C3900 and L3900 during transmit mode.
circuitry.
circuit.
component(s).
output power. The power meter should read approximately one-half the rated power (12 Watts).
Disconnect the transmitter injection from the internal transceiver chassis. This will require removal of
the power amplifier assembly. With all other connections in normal condition, key the transmitter and
monitor the control voltage. If the voltage exceeds 9.2 V, troubleshoot the control voltage limit
circuitry.
Refer to Chapter 6 of the ASTRO Digital Spectra and Digital Spectra Plus Mobile Radios Basic
Service Manual (68P81076C20) for current limit setting instructions. When ready to adjust current
limit, decrease the relative current limit value with the keyboard per instructions. After several
decrements, the current limit should begin to reduce power. After this test, reset the current limit to its
original value. If the circuitry does not perform as indicated, troubleshoot the current limit circuitry.
!
W A R N I N G
!
July 1, 2002 68P81076C25-C
Power-Leveling Circuitry Test
With the radio connected for power measurements, vary the line voltage from 12.5 to 16 V. The
power should not vary more than 2 Watts. At a line voltage of 13.8 V, vary the frequency using the
three test modes. If power varies more than 2 Watts, measure the detected voltage on P0853, pin 9.
If this voltage varies more than 0.2 V over line and frequency variations, the power control circuitry
(most of which is located on the command board) may be malfunctioning. If the detected voltage
varies less than 0.2 V, the problem is likely in diode CR3900, the harmonic filter, the antenna switch,
or the output coax. Check continuity through the 12-pin DC connector P0853 on the PA board; check
digital/analog circuitry, and check 5-V regulator operation. See Table 4-12, DC Voltage Chart, for
typical values.
With the radio connected for power measurements and a disconnected TX injection coax, the
detected voltage at P0853, pin 9, should measure approximately 1.3 V.
4.5.1.3 50 Watt Power Amplifiers
This information will help you troubleshoot the ASTRO Spectra radio. Use this information, along
with the Theory of Operation, to diagnose and isolate the cause of failures. The principle tools
needed to troubleshoot a circuit to the component level are the schematic and the Theory of
Operation.
precautions and troubleshooting methods. Because much of the radio's circuitry operates at high
frequency, measurements must be taken very carefully. Notes and cautions are added to the text to
alert the reader to this need in areas of greatest sensitivity. However, the need for extreme care does
exist in all measurements and tests at high frequency.
series capacitor removed to allow for signal insertion, then the components (s) returned to the circuit
68P81076C25-C July 1, 2002
a. When setting or measuring RF power, follow these guidelines to avoid measurement
- Attenuators and 50 ohm loads should have at least 25dB return loss.
- Mini UHF to 'N' adapter, P/N 58-803671321, should be used at the antenna connector. All
used.
b. Maximum input level to the PA is 20 mW. Too much input power could result in damage to
the LLA stage.
assembly. To make the DC connections, use small spring clips or make a test adapter similar
3. Apply the required input power via an adapter cable. For this application, non 'N' type
4. With the applied control voltage initially at 0 V, slowly increase the voltage until power out
equals 55 Watts. Power should rise smoothly with control voltage once the turn-on threshold
is reached. Control voltage should not exceed 8.0 V.
within the limits shown on chart, then a failure exists in the PA assembly.
7. If the voltages in the chart are correct, verify that the injection is at least 10 mW (see the VCO
Troubleshooting Section).
Test Keyed 9.4 V
CONTROL
VOLTAGE
DRIVE
POWER IN
(mW)
A+ .V
Transmit 9.4 See note
a
a. Set initially to zero. Increase value until power equals 28 wafts or 9.2 V maximum.
10 13.4
Receive 0 0 0 13.4
July 1, 2002 68P81076C25-C
Figure 4-6. PA Test Adapter, 50 Watt Power Amplifier

LOCATION
RX MODE TX MODE
COMMENTS
P0853
3 0 2.0 7.0 9.2 Control Drive Voltage
4 10.8 13.8 16.6 10.4 13.4 16.2 Current Sense +
5 0 0 0 9.2 9.4 9.8 Keyed 9.4
8 v Key (no pin)
12 10.8 9.8 13.1 15.9 Current Sense - (voltage delta 150 mV)
U0500
1 0 0 0 0 0 0 Ground
1
2
3
4
5
6
7
8
9
10
11
12
A+ TO COMMAND
BOARD
A+ TO COMMAND BOARD
CURRENT SENSE +
CURRENT SENSE -
K9.4
FEMALE RECEPTACLE
CONNECTOR W 100 MIL
REGULATED 9.6V
V DETECT
TEMP SENSE
68P81076C25-C July 1, 2002
5 0 0 N.C.
17 9.5 9.6 9.9 9.5 9.6 9.9 9.6-V Sense Input
19 5.7 5.7 N.C.
22 0 0 N.C.
26 0 0 N.C.
27 13.6 13.6 N.C.
30 v 9.6-V Programming (N.C.)
31 0 0 0 0 0 0 Ground
LOCATION
RX MODE TX MODE
COMMENTS
July 1, 2002 68P81076C25-C
- Check output coax and mini UHF connector.
- Check harmonic filter.
- If control voltage drive is equal to 8.0 V, then check per the above.
- It control voltage drive is less than 8.0 V, then check the control circuitry.
32 10.8 13.6 16.5 10.0 13.0 16.0 Decoupled A+
37 10.8 13.6 16.3 10.0 13.0 16.0 A+ (Current Sense +)
only)
39 0 9.2 9.4 9.8 Keyed 9.4-V in
41 0 0 0 0 0 0 Ground
Q0500E 13.0 13.0 A+ - CR0500 Drop
Q0501C 12.3 12.3 VQ0500E - B/E Drop
Q0501E 0.2 0.2 V pin 23 - B/E Drop
Q0503E 0 1.5 V pin 42 - B/E Drop (TX)
Q0503C 13.6 9.0
Q0504B 13.6 12.9 A+ - B/E Drop (TX)
LOCATION
RX MODE TX MODE
COMMENTS
68P81076C25-C July 1, 2002
- Check LLA stage.
5. Power Zero and Current Between 2 and 5 A.
- Check driver and/or final stages.
- Check LLA/driver circuitry.
are Class C and must be analyzed under relatively high RF power levels. Generators capable of
such levels may not be available in all service shops, therefore the tests below are arranged in order
of ascending power. This tends to allow the preceding stage to be the source of RF power for testing
the next stage.
The required DC and RF conditions are defined in Table 4-15. Measure LLA voltages according to
Table 4-16.
driver Q3804. Do so by checking Q3804's collector current under normal drive conditions, as follows:
Remove R3810 and L3806 (Be sure to reinstall after testing).
Place an ammeter in series with the collector of Q3804.
Check for 0.1 to 0.5 A. depending on the control voltage.
NOTE: With no RF drive to the input of the PA, the collector current of Q3804 should be zero.
Table 4-16. LLA and Pre-Driver Typical Voltages
CONTROL
VOLTAGE
9.2 V 6.0 V 9.2 V 6.0 V
Q3801
Base
Collector
0.7
8.3
0.7
9.0
0.7
8.0
0.5
8.8
Q3802
Base
Collector
Emitter
7.7
2.0
8.3
8.4
1.4
9.0
7.5
2.3
8.0
8.2
1.2
8.8
Q3806
Base
Collector
Emitter
5.1
7.7
4.5
4.1
8.4
3.4
5.1
7.5
4.5
4.1
8.2
3.4
Q3804
Base
Collector
0.5
13.8
0.5
13.8
0.0
13.3
0.2
13.4
July 1, 2002 68P81076C25-C
pre-driver, Q3804. Do so by checking Q3804's collector current under normal drive conditions, as
follows:
Place an ammeter in series with the collector of Q3804. Check for 0.1 to 0.5 A. depending the
control voltage.
NOTE: With no RF drive to the input of the PA, Q3804's collector current should be zero.
If Q3804 draws no current under normal conditions, then check for a shorted or open input cable, or
for defective parts in the input network or matching circuitry between Q3801 and Q3804. If all the
above check out OK, then replace Q3801.
Testing Pre-Driver Circuitry
The pre-driver is a typical Class C stage, except the base is biased with resistors R3809 and R3806.
The necessary conditions for proper operation of this stage are input drive power, and bias
conditions as shown in Table 4-16 above.
soldering device. The base and collector leads must be hand-soldered on the bottom of the
board.
Troubleshooting the Driver Stage
Check for shorts and/or opens in the matching circuitry. Also look for faulty components.
Measure the DC resistance from base to emitter. It should be less than 1 ohm. If not, check
L3810 for proper soldering and replace if faulty.
Check the current drain of the driver. It should be around 0.5 to 2.5 A. for 50-Watt operation. If
current drain is low, go to next step.
Unsolder the base lead. Making sure the lead is not touching the PC board, check the
base-emitter and base-collector junction diode drops. Normal voltage drop should be between
0.4 and 1.0 V. If either junction reads outside this range, replace the driver device.
Unsolder either L3854, R3875, or L3851 to isolate the driver and final stages. Measure the
collector emitter DC resistance. If the resistance is below 5k ohms, then replace the driver
device.
Troubleshooting the Final Device
Make sure A+ is at the final's collector; if not, check for shorts and/or opens.
proper soldering on L3852 and L3853; replace faulty component (s).
Current drain on the final device should be >6 A. for 50-Watt operation. If low current, go on to
the next step.
drops. Normal voltage drop should be between 0.4 and 1.0 V. If either junction is outside the
range, replace the final device.
68P81076C25-C July 1, 2002
Unsolder either L3859, R3875, or L3851 to isolate the driver and final stages. Measure the
collector emitter DC resistances. If the resistance is below 5k ohms, then replace the driver
device.
NOTE: The position of capacitors C3853 and C3854 is critical to the performance of the circuit. If they
are removed for any reason, they must be re-installed as close to the cap of the final device
as possible.When replacing either the driver or final device, apply thermal compound on the
heatsink surface. Torque the screws to the correct value; see the ASTRO Digital Spectra and
Digital Spectra Plus Mobile Radios Basic Service Manual (68P81076C20).
Verify that most of this circuit is functioning properly by testing the receiver insertion loss as follows:
Apply the conditions indicated in Table 4-14 for RX tests.
Check CR3920, CR3921, and CR3922 with an ohm meter for forward and reverse continuity.
In the transmit mode, adjust the control voltage for 55 Watts at the antenna connector. Check
for less than 10 mW at the end of the receive input cable. If power exceeds 10 mW, then check
CR3922 and associated circuitry. Receiver sensitivity can degrade if power at this port exceeds
10 mW.
Check for proper DC current through the PIN diodes; correct current is indicated if
approximately 1.5 V is present at the junction of C3900 an L3900 during the transmit mode.
circuitry.
circuit.
component(s).
!
W A R N I N G
!
July 1, 2002 68P81076C25-C
Temporarily place a leaded 6.8k ohm resistor in parallel with RT3875. Key the transmitter and
monitor the output power. The power meter should read approximately 1/2 the rated power
(25 Watts).
Disconnect the transmitter injection from the internal transceiver chassis. This will require removal of
the power amplifier assembly. With all other connections in normal condition, key the transmitter and
monitor the control voltage. It the voltage exceeds 9.0 V, troubleshoot the control voltage limit
circuitry.
instructions. After several decrements, the current limit should begin to reduce power. After this test,
reset the current limit to its original value. If the circuitry does not perform as indicated, troubleshoot
the current limit circuitry.
Power-Leveling Circuitry Test
With the radio connected for power measurements, vary the line voltage from 12.5 to 16 V. The
power should not vary more than 12.5 to 16 V. The power should not vary more than 2 Watts. At a
line voltage of 13.6 V, vary the frequency using the three test modes.
If power varies more than 2 Watts, measure the detected voltage on P0853, pin 9. If this voltage
varies more than 0.2 V over line and frequency variations, the power control circuitry (most of which
is located on the command board) may be malfunctioning. If the detected voltage varies less than
0.2 V, the problem is probably in diode CR3900, the harmonic filter, the antenna switch, or the output
coax. Check continuity through the 12-pin connector P0853 on the PA board; check digital/analog
circuitry, and check 5-V regulator operation. See Table 4-15 for typical values.
With the radio connected for power measurements and a disconnected TX injection coax, the
detected voltage at P0853, pin 9, should measure approximately 1.3 V.
68P81076C25-C July 1, 2002
4.5.2 UHF Band
Theory of Operation, to diagnose and isolate the cause of failures. This section includes
troubleshooting information that will help you test and check the circuits to localize and isolate
problems.
precautions and troubleshooting methods. Because much of the radio's circuitry operates at UHF
does exist in all measurements and tests at UHF frequencies.
Most of the common transmitter symptoms are not necessarily caused by failure of circuits on the PA
board. Failure of command board or synthesizer circuits can disable the transmitter. The initial
troubleshooting effort should be toward isolating the problem to one of these areas. If either the
control voltage or keyed 9.4 V are zero, then the problem is likely to be in the control circuit or
synthesizer. If those voltages are present, then the problem is more likely in the power amplifier
circuit.
separately, but if the PA kit is ordered a filter kit comes with the PA kit.
great care when replacing parts. Excessive solder or flux, Longer than original leads on coax
connectors, misorientation of parts, and other commonly benign imperfections, may cause
the radio's performance to degrade.
Bench testing the high-power Spectra PA is most easily accomplished if a Spectra control head,
control cable, and power cable are available on the test bench. This greatly simplifies the
troubleshooting as several supply voltages are provided by the command board. Proper operation of
the command board circuitry can be simultaneously verified.
July 1, 2002 68P81076C25-C
Begin troubleshooting by connecting an RF power meter and appropriate power load to the antenna
connector. Connect the control cable and the power cable. Make sure the ignition sense lead is also
connected to the positive lead of the power supply. Note that a regulated DC power supply capable
of at least 30 A. is necessary to power a high-power Spectra transmitter. Remove the radio bottom
cover. Remove the PA shield by pulling straight up on the plastic handle. This must be done carefully,
as the edge of the PA shield can damage components on the PA board if it is removed unevenly. Set
the power supply to 13.4 V. The radio may now be turned on. All critical voltages may be measured
at connector J1 from the top side of the PA board. A diagram of the connector pin-out as viewed from
the top side of the PA board is shown below.
Figure 4-7. Connector Pin-Out - High-Power Amplifier
12 10 8 6 4 2
11 9 7 5 3 1
Pin Configuration of J1
As Viewed From Top of PA Board
1 Control Voltage Limit
2 Control Voltage Drive
3 Current Sense +
4 Key 9.4V
5 Filtered A+
6 Temp-Sense
7 Not Connected
8 Forward Power Detect
9 9.6V
10 Current Sense
11 Not Connected
68P81076C25-C July 1, 2002
LOCATION
RX MODE TX MODE
J1
3 10.8 13.6 16.5 10.0 13.0 16.0 Current Sense +
4 0 0 0 9.2 9.4 9.8 Keyed 9.4
7 Key (no pin)
10
11
9.4
10.8
9.6
13.6
9.9
16.5
9.4
9.8
9.6
12.8
9.9
15.8
9.6-V Supply from Command Board
Current Sense - (voltage delta 150 mV)
U0500
1 0 0 0 0 0 0 Ground
5 9 0 N.C.
July 1, 2002 68P81076C25-C
17 9.5 9.6 9.9 9.5 9.6 9.9 9.6-V Sense Input
19 5.7 5.7 N.C.
22 0 0 N.C.
25 v 9.6-V Programming (N.C.)
26 0 0 N.C.
27 13.6 13.6 N.C.
31 0 0 0 0 0 0 Ground
32 10.8 13.6 16.5 10.0 13.0 16.0 Decoupled A+
37 10.8 13.6 16.3 10.0 13.0 16.0 A+ (Current Sense +)
38 10.8 13.6 16.3 10.0 13.0 16.0 Current Sense - Voltage Delta 150 mV
39 0 9.2 9.4 9.8 Keyed 9.4-V in
41 0 0 0 0 0 0 Ground
LOCATION
RX MODE TX MODE
J1
68P81076C25-C July 1, 2002
Key the transmitter. The RF power meter should read at least 100 Watts if it is calibrated. Range 3
UHF radios will have power set to 78 Watts at modes above 470 MHz. R4 UHF radios will be set to
78 Watts on all modes. If power is low, the power set must be checked first before suspecting a
defective PA or command board. This may be checked using a PC and RSS software. Alternatively,
front panel programming may be used. Please refer to the ASTRO Digital Spectra and Digital
Spectra Plus Mobile Radios Basic Service Manual (68P81076C20) for programming instructions.
If correct power output can not be obtained by following the power set procedure outlined in the
(68P81076C20), it is possible that current limit may be improperly set. This can not be adjusted
using front panel programming. A PC with RSS must be used. A simple way to check for current limit
engagement is to temporarily short out the current sense resistor R5875 with a piece of 12- or 14-
gauge wire. If full power is restored, then RSS must be used to properly set current limit.
If it is verified that both power set and current limit are not related to the power problem, then the
synthesizer output must be checked. A milliwatt meter connected to the TX injection cable should
indicate at least 30 mW of injection power during key-up. If this is not the case, refer to the RF Board
and VCO troubleshooting procedures in this chapter.
If the command board and synthesizer are functioning properly, the PA must be defective. Details on
troubleshooting each circuit of the PA follow.
NOTE: When setting or measuring RF power at UHF, follow these guidelines to avoid measurement
- All coaxial cables should be low loss and as short as possible.
- Mini UHF to 'N' adapter, P/N 58803671321, should be used at the antenna connector. All
used.
Maximum input level to the PA is 50 mW. Too much input power could result in damage to the
LLA stage.
Q0500E 13.0 13.0 A+ - CR0500 Drop
Q0501C 12.3 12.3 VQ0500E - B/E Drop
Q0501E 0.2 0.2 V pin 23 - B/E Drop
Q0503E 0 1.5 V pin 42 - B/E Drop (TX)
Q0503C 13.6 9.0
Q0504B 13.6 12.9 A+ - B/E Drop (TX)
LOCATION
RX MODE TX MODE
J1
July 1, 2002 68P81076C25-C
are Class-C and must be analyzed under relatively high RF power levels. The following information
should help in isolation and repair of the majority of transmitter failures.
Proper operation of the LLA can be checked by monitoring the voltage across resistor R5805. The
voltage should measure in the range of 0.4 to 1.2 V, depending on the value of control voltage. A 0.4-
V reading corresponds to a low control voltage (4 to 5 V) and a 1.2-V reading corresponds to a high
control voltage (up to control voltage limit).
Measure LLA voltages according to Table 4-18. If the DC bias conditions are correct, check to see if
the LLA is providing drive power to Q5803. Do so by checking Q5803 collector current under normal
drive conditions, as follows:
Place an ammeter in series with Q5803 collector.
NOTE: With no RF drive to the input of the PA, Q5803 collector current should be zero.
defective parts in the transmit injection filter or matching circuitry between Q5801 and Q5803.
Testing Second Stage Circuitry Q5803
The second stage is a typical class-C stage, except the base is biased with resistors R5809 and
R5806. The necessary conditions for proper operation of this stage are input drive power, and bias
conditions as shown in Table 4-18.
Table 4-18. LLA and 2nd Stage Typical Voltages
CONTROL
VOLTAGE
10.0 V 6.0 V 10.0 V 6.0 V
Q5801
Base
Collector
0.7
8.1
0.7
9.1
0.7
8.0
0.3
8.8
Q5800
Base
Collector
Emitter
7.6
2.3
8.1
8.5
1.4
9.1
7.4
2.8
8.0
8.3
1.1
8.8
Q5806
Base
Collector
Emitter
6.4
7.6
5.7
3.8
8.5
3.2
6.4
7.4
5.7
3.9
8.3
3.2
Q5803
Base
Collector
0.6
9.6
0.6
9.6
0.0
9.5
0.3
9.5
68P81076C25-C July 1, 2002
the board.
Troubleshooting the Third Stage Q5850
Check for shorts and/or opens in the matching circuitry. Also look for faulty components
(cracked parts or parts not properly soldered).
Measure the DC resistance from base to emitter. It should be less than 1-ohm. If not, check
L5851 and L5852 for proper soldering, and replace if faulty.
Check the current drain of Q5850. Remove L5854 and R5850 and solder wires to the pads.
With an ammeter connected to these wires, check the collector current drain during transmit. It
should be around 1.5 to 2.0 A. If current drain is low, go to next step.
voltages using the diode check function of a multimeter. Normal voltage drop should be near
0.6 V. If either junction is open or short circuited replace the device.
Troubleshooting the Driver Stage Q5851
Make sure A+ is at the driver's collector. Check for shorts and or opens.
(Cracked parts or parts not properly soldered.)
proper soldering on L5855 and L5857. Replace faulty component(s).
Current drain for this stage should be close to 5 A. If low current, go to the next step.
drops. Normal voltage drops should be near 0.6 V. If either junction is open or shorted, replace
the device.
NOTE: The position of capacitors C5861, C5862, C5863 and C5864 is critical to the performance of
the circuit. If they are removed for any reason, they must be re-installed in the exact same
physical location from which they were removed.
Analysis of the Final Amplifier Stage (Q5875 and Q5876)
Extreme care must be taken when troubleshooting the final amplifier due to the high RF currents and
voltages present.
A visual inspection of the matching networks should be done first. Check for defective solder joints or
burned components. Good soldering of the transistor device leads is essential. Make sure A+
voltage is reaching the collector of each final device.
Check the base-emitter and base-collector junctions of the final devices by removing L5877, L5876,
and R5878. Using the diode check function of a multimeter, the junctions should have a forward
voltage drop close to 0.6 V. Replace a final device if it has an open or shorted junction.
Capacitors C5885, C5886, C5887, and C5888 are placed on the bottom side of the PA board
underneath the leads of the final devices. Extreme care should be used when replacing these parts.
Exact positioning is critical. Inspect for solder shorts on these capacitors before installing the PA
board in the radio chassis.
July 1, 2002 68P81076C25-C
Installation of the PA board into the radio chassis must be done carefully. The PC board screws use
a T-15 Torx bit and should be torqued to 6 to 8 inch-pounds. The device screws use a T-8 Torx bit
and should be torqued to 6 to 8 inch-pounds. Always apply thermal compound to the area under the
device flanges before installing the PA board.
Current drain of the final amplifier may be checked by measuring the voltage across R5875 during
transmit. A voltage drop of 0.10 to 0.15 V indicates the finals are drawing 10 to 15 A., which is within
the acceptable range.
Use care when replacing the harmonic filter. Removal of the filter is best accomplished by heating
the filter/PC board assembly with a heat gun or heat blower until the solder joint reflows.
Verify that the receive path of the antenna switch and the harmonic filter are functioning by testing
the receiver insertion loss as follows:
Verify the conditions indicated in Table 4-17 for RX tests.
is functioning properly. Additional antenna switch tests are:
- Check CR5900, CR5902, CR5904, and CR5905 using the diode-check function of a
multimeter. Note that CR5904 and CR5905 are on the bottom side of the board. These two
diodes affect the receive path only and are unrelated to transmitter problems.
approximately 1.5 V is present at the junction of R5900 and L5900 during transmit.
circuitry.
circuit.
component(s).
output power. The power meter should read approximately one-half the rated power.
!
W A R N I N G
!
68P81076C25-C July 1, 2002
Disconnect J5901 (transmitter injection) from the PA input. With all other connections in normal
condition, key the transmitter and monitor the control voltage at J1 pin 2. If the voltage exceeds
10.0 V, troubleshoot the control voltage limit circuitry.
instructions. After several decrements, the current limit should begin to reduce power in 0.5 to 1.0
Watt increments. After this test, reset the current limit to its original value. If the circuitry does not
perform as indicated, troubleshoot the current limit circuitry.
Directional Coupler and Power-Leveling Test
The directional coupler combined with the RPCIC form a closed-loop power leveling circuit. This
circuit keeps forward power essentially constant under variations of line voltage, frequency, and
VSWR.
The directional coupler samples a small amount of forward power during transmit. This power is
rectified by a detector diode CR5906. This rectified DC voltage is fed back to the RPCIC where it is
compared to a reference voltage. An error voltage is generated which is ultimately translated into the
control voltage via RPCIC circuitry and amplifiers Q503 and Q504 on the command board. Control
voltage is routed to the LLA stage, thereby completing the feedback loop. In operation, the control
loop tends to maintain the forward detected voltage constant versus frequency and line voltage
variations. Proper operation can be observed by monitoring the forward detected voltage while
varying the supply voltage from 13.4 to 16.1 V. Forward-detected voltage should not change more
than a few hundreths of a volt. Note that the forward power may not necessarily be level if one of the
other protection circuits such as temp-sense or current limit are engaged.
PA Voltage Protection Circuit
Some versions of the PA board may include a voltage protection circuit. This circuit is intended to
prevent premature failure of a transmitter operated in extreme conditions. An example of an extreme
condition would be operation at above normal battery voltages (greater than 15 V) combined with
high temperatures (greater than 500C or 122F).
The circuit monitors the A+ voltage from the battery, and it is activated if the A+ voltage exceeds
approximately 15 V. R5825 and R5823 form a voltage divider connected to A+. The divided A+
voltage is connected to the base of Q5805. The emitter of Q5805 is connected to Zener diode Z1.
This 5-V Zener diode, combined with the voltage divider action of R5825 and R5823, sets the
voltage trip point" at which 05805 turns on (A+ near 15 V). When Q5805 turns on, this provides a
path for current to flow through the base-emitter junction of Q5802. Q5802 then acts as a switch to
connect the K9.4 voltage supply to R5826 and the directional coupler circuit composed of C5924,
R5916, R5905, and R5904. A fixed DC bias voltage is applied to the forward power detector.
This fixed DC bias voltage is summed with the rectified RF signal that is coupled from the output of
the transmitter. Since the PA power control requires that the detected voltage is a constant value, the
output power of the power amplifier must be reduced by an amount proportional to the applied DC
bias. The values of R5916, R5905, and R5904 are chosen such that power is cut in half. The
reduced output power decreases the current drain of the transmitter, and therefore reduces the
internal temperature of the amplifier devices which increases their lifetime. The circuit disengages
and full rated power is restored if the over-voltage condition is corrected.
July 1, 2002 68P81076C25-C
Low-Voltage Current Drain Cutback
An additional circuit associated with the over-voltage protection circuit is the low-voltage current
drain circuit. This circuit acts to reduce the transmitter current drain under conditions of low supply
voltage. This action extends the available transmit time when, for example, the transmitter in a
vehicular installation must be used when the engine is not running. Operation of this circuit is similar
to the over-voltage circuit. R5819 and R5820 form a voltage divider which is connected to the base
of transistor Q5804. If the A+ voltage drops below approximately 12 V, Q5804 will begin to conduct.
This turns on Q5802, which supplies a DC bias voltage to the forward power detector as explained in
the Theory of Operation for the over-voltage protection circuit. The transmitter output power is
reduced by the power control, which results in reduced current drain and extended battery life.
Miscellaneous Circuits and Notes
Diode CR5875 acts as a reverse-protect diode. This diode also protects from over-voltage
conditions, as it has a Zener breakdown voltage of approximately 28 V. When replacing this diode,
care must be taken to place the diode with the cathode marking ring down (towards the PC board).
Figure 4-8. Block Diagram for Spectra High-Power Power Amplifier
4.5.2.2 40 Watt Power Amplifiers
precautions and troubleshooting methods. Because much of the radio's circuitry operates at UHF
does exist in all measurements and tests at UHF frequencies.
FINAL AMPLIFIER
Q5875
25C29
Q5876
25C29
Q5851
25C30
Q5850
25C27
Q5803
25C09
Q5801
82D50
LLA 2ND STAGE 3RD STAGE DRIVER
250mW 2W 15W 50W 30mW
J5901
INJECTION
CONTROL
VOLTAGE
K9.4 9.6V FILTERED
A+
FILTERED
A+
FILTERED
A+
PIN
ANTENNA
SWITCH
HARMONIC
FILTER
DIRECTIONAL
COUPLER AND
DETECTOR
K9.4 TO
RECEIVER
E5802
FORWARD
POWER
DETECT
J3853
ANTENNA
CONNECTOR
MINI UHF
110W 125W
MAEPF-22045-O
68P81076C25-C July 1, 2002
separately, but if the PA kit is ordered, a filter kit comes with the PA kit.
Test the PA assembly for proper operation as follows:
- When setting or measuring RF power at UHF, follow these guidelines to avoid
measurement errors due to cable losses or non-50-ohm connector VSWR:
- Mini UHF to 'N' adapter, P/N 5880367B21, should be used at the antenna connector. All
used.
- Maximum input level to the PA is 50 mW. Too much input power could result in damage to
the LLA stage.
assembly. To make the DC connections, use small spring--clips or make a test adapter similar
to that shown in "Figure 4-9. PA Test Adapter, 40 Watt Power Amplifier".
3. Apply the required input power via an adapter cable. For this application, non N-type
4. With the applied control voltage initially at 0 V, slowly increase the voltage until power out
equals 46 Watts. Power should rise smoothly with control voltage once the tum-on threshold
is reached. Control voltage should not exceed 10.0 V.
6. Refer to the voltage chart (Table 4-20). Measure the indicated voltages. If they are not within
the limits shown in the chart, then a failure exists in the PA assembly.
July 1, 2002 68P81076C25-C
Figure 4-9. PA Test Adapter, 40 Watt Power Amplifier
Test Keyed 9.4 V 9.6 V
CONTROL
VOLTAGE
DRIVE
POWER IN
(mW)
A+ .V
Transmit 9.4 9.6 See note
a
a. Set initially to zero. Increase value until power equals 46 Wafts or 10.0 V maximum.
30 13.0
Receive 0 9.6 0 0 13.0
1
2
3
4
5
6
7
8
9
10
11
12
A+ TO COMMAND
BOARD
A+ TO COMMAND BOARD
CURRENT SENSE +
CURRENT SENSE -
K9.4
FEMALE RECEPTACLE
CONNECTOR W 100 MIL
REGULATED 9.6V
V DETECT
TEMP SENSE
68P81076C25-C July 1, 2002
LOCATION
RX MODE TX MODE
COMMENTS
P0853
4 10.8 13.6 16.5 10.0 13.0 16.0 Current Sense +
5 0 0 0 9.2 9.4 9.8 Keyed 9.4
8 Key (no pin)
12 10.8 13.6 16.5 9.8 12.8 15.8 Current Sense - (voltage delta 150 mV)
U0500
1 0 0 0 0 0 0 Ground
5 0 0 N.C.
July 1, 2002 68P81076C25-C
17 9.5 9.6 9.9 9.5 9.6 9.9 9.6-V Sense Input
19 5.7 5.7 N.C.
22 0 0 N.C.
26 0 0 N.C.
27 13.6 13.6 N.C.
31 0 0 0 0 0 0 Ground
32 10.8 13.6 16.5 10.0 13.0 16.0 Decoupled A+
37 10.8 13.6 16.3 10.0 13.0 16.0 A+ (Current Sense +)
only)
39 0 9.2 9.4 9.8 Keyed 9.4-V in
41 0 0 0 0 0 0 Ground
LOCATION
RX MODE TX MODE
COMMENTS
68P81076C25-C July 1, 2002
- Check harmonic filter and J-straps for opens and/or shorts.
- If control voltage is equal to 10.0 V, then check per the above.
- If control voltage is less than 10.0 V, then check the control circuitry.
Q0500E 13.0 13.0 A+ - CR0500 Drop
Q0501C 12.3 12.3 VQ0500E - B/E Drop
Q0501E 0.2 0.2 V pin 23 - B/E Drop
Q0503E 0 1.5 V pin 42 - B/E Drop (TX)
Q0503C 13.6 9.0
Q0504B 13.6 12.9 A+ - B/E Drop (TX)
LOCATION TYPICAL RX
TYPICAL TX
NO PRE-
DRIVE
COMMENTS
CR5920 ANODE 0 1.6
CATHODE 0 0.8
CR5921 ANODE 0 0.8
CATHODE
CR5922 ANODE 0 <0.8
CATHODE
LOCATION
RX MODE TX MODE
COMMENTS
July 1, 2002 68P81076C25-C
- Check LLA stage.
- Check harmonic filter, antenna switch, matching circuits between driver and final stages,
and matching circuits beyond final stage.
- Check LLA/pre-driver circuitry.
are Class C and must be analyzed under relatively high RF power levels. Generators capable of
such levels may not be available in all service shops, therefore the tests below are arranged in order
of ascending power. This tends to allow the preceding stage to be the source of RF power for testing
the next stage.
1. Testing Low-Level Amplifier (LLA) Circuitry
The required DC and RF conditions are defined in Table 4-19. Measure LLA voltages
according to Table 4-22.
If the above DC bias conditions are correct, check to see if the LLA is providing drive power to
the pre-driver, Q5803. Do so by checking Q5803 collector current under normal drive
conditions, as follows:
- Remove R5810 and L5806 (Be sure to reinstall after testing.)
- Solder wires to the remaining pads.
- Place an ammeter in series with Q5803 collector.
- Check for 0.2 to 0.5 A. (depending on control voltage).
NOTE: With no RFdrive to the input of the PA, Q5803 collector current should be zero.
Table 4-22. LLA and Pre-Driver Typical Voltages
CONTROL
VOLTAGE
10.0 V 6.0 V 10.0 V 6.0 V
Q5801
Base
Collector
0.7
8.1
0.7
9.1
0.7
8.0
0.3
8.8
Q5800
Base
Collector
Emitter
7.6
2.3
8.1
8.5
1.4
9.1
7.4
2.8
8.0
8.3
1.1
8.8
Q5806
Base
Collector
Emitter
6.4
7.6
5.7
3.8
8.5
3.2
6.4
7.4
5.7
3.9
8.3
3.2
Q5803
Base
Collector
0.6
9.6
0.6
9.6
0.0
9.5
0.3
9.5
68P81076C25-C July 1, 2002
defective parts in the transmit injection filter or matching circuitry between Q5801 and Q5803. If all of
the above check out OK, then replace Q5803.
2. Testing Pre-Driver Circuitry.
The pre-driver is a typical class-C stage, except the base is biased with resistors R5809 and
R5806. The necessary conditions for proper operation of this stage are input drive power, and
bias conditions as shown in Table 4-22, above.
the board.
3. Troubleshooting the Driver Stage
- Make sure A+ is at the collector.
- Check for shorts and/or opens in the matching circuitry. Also look for faulty components.
(Cracked parts or parts not properly soldered).
- Measure the DC resistance from base to emitter. It should be less than 1-ohm. If not,
check L5851 and L5852 for proper soldering, and replace if faulty.
- Check the current drain of the driver. It should be around 1.5 to 2.0 A. for 40-Watt
operation. If current drain is low, go to next step.
- Remove L5851 from the board and check the base-emitter and base-collector junction
diode drops. Normal voltage drop should be between 0.4 and 1.0 V. If either junction
reads outside this range, replace the driver device.
4. Troubleshooting the Final Device
- Make sure A+ is at the final's collector; if not, check for shorts and/or opens. If A+ is
shorted, check C5877 and C5878 first for shorts, by lifting L5878 and measuring the
resistance from collector to ground.
- Check the matching circuitry for shorts and/or opens. Also, check for faulty components.
(Cracked parts or parts not properly soldered.)
- Measure the resistance from base to emitter; it should be less than 1 ohm. If not, check
for proper soldering on L5875, L5876, and L5883; replace faulty component(s).
- Current drain on the final device should be >5 A. for 40-Watt operation. If low current, go
on to the next step.
- Remove L5875 from the board and check the base-emitter and base-collector junction
diode drops. Normal voltage drop should be between 0.4 and 1.0 V. If either junction is
outside this range, replace the final device.
NOTE: The position of capacitors C5875, C5876, C5877, and C5878 is critical to the performance of
the circuit. If they are removed for any reason, they must be re-installed as close to the cap
of the final device as possible.
When replacing either the driver or final device, apply thermal compound on the heatsink
surface. Torque the screws to the correct value; see the ASTRO Digital Spectra and Digital
July 1, 2002 68P81076C25-C
5. Testing the Antenna Switch and Harmonic Filter
Verify that most of this circuit is functioning properly by testing the receiver insertion loss as
follows:
- Apply a low-level signal source at the antenna connector.
- Apply the conditions indicated in Table 4-19 for RX tests.
- Measure the power at the receive coax.
- If the difference between the input and output (insertion loss) is less than 1 dB, then the
circuitry is functioning properly.
- Check CR5920, CR5921, and CR5922 with an ohmmeter for forward and reverse
continuity.
port exceeds 10 mW.
1. Localizing Problems to a Circuit
Power leveling and current limiting are set to values detailed in the ASTRO Digital Spectra
and Digital Spectra Plus Mobile Radios Basic Service Manual (68P81076C20). These values
will vary from unit to unit, depending on the unique variations of each unit. If symptoms
indicate that either of these circuits have failed, verify that the radio has been properly aligned
before investigating the circuitry.
alignment of the radio. If symptoms indicate that these circuits have failed, then troubleshoot
the circuit.
The tests that follow are intended to provide a convenient means of verifying that a particular
circuit is functioning properly. These tests will isolate the failure to a minimum number of
components. Refer to the Theory of Operation and the schematic for information needed to
identify the failed component(s).
2. Temperature Sense Circuit Test
Temporarily install a 6.8k ohm resistor in parallel with RT5875. Key the transmitter and
monitor the output power. The power meter should read approximately one-half the rated
power (25 Watts).
!
W A R N I N G
!
68P81076C25-C July 1, 2002
3. Control-Voltage-Limit Circuitry Test
Disconnect J5901 (transmitter injection) from the internal transceiver chassis. This will
require removal of the power amplifier assembly. With all other connections in normal
condition, key the transmitter and monitor the control voltage at the node of R5811,
C5814,L5808, and R5808. If the voltage exceeds 10.0 V, troubleshoot the control voltage limit
circuitry.
4. Current-Limiting Circuitry Test
When ready to adjust current limit, decrease the relative current limit value with the keyboard
per instructions. After several decrements, the current limit should begin to reduce power in 0.
1- to 0.5-Watt increments. After this test, reset the current limit to its original value. If the
circuitry does not perform as indicated, troubleshoot the current limit circuitry.
5. Power-Leveling Circuitry Test
With the radio connected for power measurements, vary the line voltage from 12.5 to
16 V. The power should not vary more than 2 Watts. At a line voltage of 13.6 V, vary the
frequency using the three test modes. If power varies more than 2 Watts, measure the
detected voltage on P0853, pin 9. 1 this voltage varies more than 0.2 V over line and
frequency variations, the power control circuitry (most of which is located on the command
board) may be malfunctioning. If the detected voltage varies less than 0.2 V, the problem is
likely in diode CR5900, the harmonic filter, the antenna switch, or the output coax. Check
continuity through the 12-pin DC connector P0853 on the PA board; check digital/analog
circuitry, and check 5-V regulator operation. See Table 4-20 for typical values.
With the radio connected for power measurements and, disconnected TX injection coax, the
detected voltage a P0853, pin 9, should measure approximately 1.3 V.
July 1, 2002 68P81076C25-C
4.5.3 800 MHz Band
4.5.3.1 15 Watt and 35 Watt Power Amplifiers
precautions and troubleshooting methods. Because much of the radio's circuitry operates at 800
MHz, measurements must be taken very carefully. Notes and cautions are added to the text to alert
the reader to this need in areas of greatest sensitivity. However the need to extreme care does exist
in all measurements and tests at 800 MHz.
If for diagnostic reasons, a chip component needs to be removed to facilitate testing, such as a
the use of a hot air source capable of reflowing the solder beneath the filter hybrid. When replacing it,
add small amounts of fresh solder paste to the silver regions beneath the ceramic to assure
adequate electrical ground contact. Save the original input and output connectors ('J' straps); these
are not included with the replacement kit. No turning is required. The harmonic filter may be ordered
separately, but if the PA kit is ordered, a filter kit comes with the PA kit.
The pass device may be ordered separately or may be received as part of the hardware kit-it is not
part of the PA kit. The PA kit comes with all surface-mount components, including the harmonic filter
hybrid, but the harmonic filter cover is not included. Neither does the PA kit include the Power
Module, nor, on 35-Watt models, the final device and associated matching capacitors.
NOTE: Due to the high frequency of operation, it is imperative that you use specified Motorola parts
when component replacement is necessary. At these frequencies, second and third order
properties of the components are very important and are part of the circuit's design. Substitute
components may not work. It is also critical that you use great care when replacing parts.
Excessive solder or flux, longer than original leads on coax connectors, misorientation of
parts, and other commonly benign imperfections may cause the radio's performance to
degrade.
68P81076C25-C July 1, 2002
NOTE: The following instructions pertain to both the 15 Watt and 35 Watt power amplifiers. A
distinction between the two PAs is given only where necessary.
connector. Replace the 15-Watt PA shield (or the 35-Watt PA shield and cover). Disconnect
the coax connectors and the ribbon cable. Connect a power meter to the antenna port using
minimum cable length.
When setting or measuring RF power at 800 MHz, follow these guidelines to avoid
measurement errors due to cable losses or non-50-ohm connector VSWR:
- Mini UHF to 'N' adapter P/N 5880367B21, should be used at the antenna connector. All
used.
Maximum input level to the PA is 200 mW. Over driving the buffer could result in damage to
the PA buffer stage.
assembly. To make the DC connections, use small spring-clips or make a test adapter similar
Figure 4-10. PA Test Adapter, 15 and 35 Watt Power Amplifier
1
2
3
4
5
6
7
8
9
10
11
12
A+ TO COMMAND
BOARD
A+ TO COMMAND BOARD
CURRENT SENSE +
CURRENT SENSE -
K9.4
FEMALE RECEPTACLE
CONNECTOR W 100 MIL
REGULATED 9.6V
V DETECT
TEMP SENSE
July 1, 2002 68P81076C25-C
3. Apply the required input power via adapter cable 30-80373B27 or equivalent. For this
application, non N-type connectors are acceptable.
4. With the applied control voltage initially at 0 V slowly increase the voltage until power out
equals 17 Watts (15-Watt radio) or 38 Watts (38-Watt radio) Power should rise smoothly with
control voltage once the turn-on threshold is reached. Control voltage should no exceed
11.0 V.
5. If 11.0 V does not produce 17 (or 38) Watts, then a failure exists in the power amplifier circuit.
within the limits shown in the chart, then a failure exists in the PA assembly.
8. If no failure is located from the previous checks troubleshoot the power control circuitry.
Test Keyed 9.4 V 9.6 V
CONTROL
VOLTAGE
DRIVE
POWER IN
(mW)
A+ .V
Transmit 9.4 9.6 See note
a
a. Set initially to zero. Increase value until power equals 17 wafts(15-Watt radio) or 38 Watts
(35-Watt radio) or 11.0 V maximum.
0.1 13.0
Receive 0 9.6 0 0 13.0
LOCATION
RX MODE TX MODE
COMMENTS
P0853
4 10.8 13.6 16.5 10.0 13.0 16.0 Current Sense +
5 0 0 0 9.2 9.4 9.8 Keyed 9.4
8 Key (no pin)
12 20.8 13.6 16.5 10.0 13.0 16.0 Current Sense - (voltage delta 150 mV)
68P81076C25-C July 1, 2002
U0500
1 0 0 0 0 0 0 Ground
5 0 0 N.C.
17 9.5 9.6 9.9 9.5 9.6 9.9 9.6-V Sense Input
19 5.7 5.7 N.C.
22 0 0 N.C.
23 0.9 9.6 1.2 9.6 9.6V Series Pass Drive
26 0 0 N.C.
27 13.6 13.6 N.C.
LOCATION
RX MODE TX MODE
COMMENTS
July 1, 2002 68P81076C25-C
31 0 0 0 0 0 0 Ground
32 10.8 13.6 16.5 10.0 13.0 16.0 Decoupled A+
37 10.8 13.6 16.3 10.0 13.0 16.0 A+ (Current Sense +)
only)
39 0 9.2 9.4 9.8 Keyed 9.4-V in
41 0 0 0 0 0 0 Ground
Q0500E 13.0 13.0 A+ - CR0500 Drop
Q0501C 12.3 12.3 VQ0500E - B/E Drop
Q0501E 0.2 0.2 V pin 23 - B/E Drop
Q0503E 0 1.5 V pin 42 - B/E Drop (TX)
Q0503C 13.6 9.0
Q0504B 13.6 12.9 A+ - B/E Drop (TX)
LOCATION
RX MODE TX MODE
COMMENTS
68P81076C25-C July 1, 2002
- Check harmonic filter and J-straps.
- If control voltage is greater than 10 V, then check per the above.
- If control voltage is less than 10 V, then check the control circuitry.
3. Power Intermittently Low (or zero) and Current less than 1 A. when Power Drops
- Check Buffer Stage.
4. Power Zero and Current greater than 5 A.
5. Power Zero and Current between 2 and 5 A.
- Check Power Module.
6. Power Zero and Current less than 1 A.
- Check input coax.
- Check Buffer Stage.
LOCATION TYPICAL RX
TYPICAL TX
NO PRE-
DRIVE
COMMENTS
CR9920 ANODE 0 1.6 TX Series P.I.N. diode
CATHODE 0 0.8 (on in TX mode)
CR9921 ANODE 0 0.8 TX Shunt P.I.N. diode
CATHODE (on in TX mode)
CR9922 ANODE 5.15V <0.2 RX Series P.I.N. diode
CATHODE 4.45V 8.7 (off in TX mode)
Q9920 COLLEC 5.15V <0.2
July 1, 2002 68P81076C25-C
Methods of analyzing individual stages of the Power Amplifiers are detailed below. Most of the
stages are Class C and must he analyzed under relatively high RF power levels. Generators capable
of such levels may not be available in all service shops, therefore the tests below are arranged in
order of increasing power. This tends to allow the preceding stage to be the source of RF power for
testing the next stage. If adequate power sources are available, then any stage may be tested with
external signal injection.
1. Testing Buffer Circuitry
The required DC and RF conditions are defined in Table 4-23. With no RF input applied, the
collector voltage of Q9800 should be 9.4V. If not, check L9805, L9801, and the feed runners.
The base voltage should be 0.6-V (0.7-V without RF). If not, check R9801, CR9800, and
related adaptive bias circuitry.
To check for power out, remove R9805 and lift the output end of C9807. Solder the center
conductor of a small-diameter 50-ohm, coax to the vacated pad on the buffer side. Solder the
coax's shield to ground. Under the conditions specified in Table 4-23, the measured power
should be at least 350 mW. After output power has been tested, replace the resistor and
capacitor with new parts.
An alternate method of testing the buffer's power out is to carefully lift the input lead of the
power module ( pin 1) from the circuit board and replace it with the center conductor of a
small-diameter coax. Solder the shield of the coax. Solder the shield of the coax to the
adjacent ground pad.
To test the input VSWR of the circuit, apply 70 mW to the input. Using a directional coupler,
verify that the reflected power is less than 20 mW.
2. Testing the Power Module (U9850)
The power module is a packaged gain block with 50-ohm input and output impedances. It has
three gain stages, the first two of which have controlled voltage applied (for regulating power)
and the final stage has A+ applied.
If the buffer stage has not been confirmed in "working order," an external 400 mW must be
injected. Do this by carefully lifting pin 1 of the power module and soldering the center
conductor of a small diameter coax to the pin. Solder the shield to the ground pad adjacent to
pin 1. To this cable, inject 400 mW. (This application is not so critical to require an 'N'
connector on the loose end of the coax.)
If the buffer stage is confirmed in "working order," then provide 100 mW drive to the buffer
(K9.4-V must be applied) to drive the module.
To measure the output power from the module, remove the series DC blocking capacitor
C9879 (15W) or C9856 (35W), then connect a 39 pF blocking capacitor from the center
conductor of a small diameter coax to the vacated pad, and finally, ground the shield of the
output coax. Use this coax to measure output power.
Control voltage (Pins 2 and 3) should be 10 V; A+ ( pin 4) should be 13.0 V. Apply voltages
through the DC connector on the PA board.
With either 100 mW applied to the buffer or 400 mW applied to the module input, the output
power should be at least 15 Watts. If power out is less than 15 Watts, the module is defective
and must be replaced.
NOTE: When replacing the module, apply thermal compound on the heatsink surface.
Torque the screws to the correct value; see the ASTRO Digital Spectra and Digital
68P81076C25-C July 1, 2002
When testing is complete, replace any capacitors or resistors that were removed for testing
with new parts.
3. Testing the Final Stage (35-Watt Models Only)
The final stage is capable of producing over 50 Watts. Be sure to protect power measuring
equipment with series attenuation. 30 dB is usually adequate.
15 Watts are needed to drive the final stage. Because this may exceed the power available at
800 MHz in many repair facilities, these tests consider the module stage as the drive source
for the final stage. Therefore, check out the module first to ensure that it operates properly.
In the course of testing the final stage with the module as the power source, begin with
control voltage at zero and increase control voltage smoothly until output of the final stage
reaches 40 Watts. If control voltage reaches 10 V, but the power out does not reach 40 Watts,
the final stage is defective. Under normal conditions, the protection circuitry limits the power
to the final stage to approximately 17 Watts maximum, protecting it from overdrive and
damage. Under test conditions, however, the protection circuitry is disabled. Observe the
above caution; the power module can produce in excess of 25 Watts.
Measure the output power by lifting the output side of C9856 and connecting to the center
conductor of a small-diameter coax which has its shield grounded. If the output stage does
not produce 40 Watts (at 10-V control voltage), then remove the RF drive and perform the
following tests:
- Check continuity from the collector lead to the A+ connector on the back of the radio.
- Examine the solder connections on all leads of the device (Q9880) and the clamped mica
capacitors.
NOTE: The position of the clamped capacitors adjacent to the device is critical to the
performance of the circuit. If they are removed for any reason, they must be
re-installed with their leads approximately 70 mil s (0.070 inches) from the final
device cap.
4. Testing the Antenna Switch and Harmonic Filter
Verify that most of this circuit is functioning properly by testing the receiver insertion loss as
follows:
- Apply a low-level signal source at the antenna connector.
- Apply the conditions indicated in Table 4-23 for RX tests.
- Measure the power at the receive coax.
- If the difference between the input and output (insertion loss) is less than 2 dB, then the
circuitry is functioning properly.
July 1, 2002 68P81076C25-C
- Check CR9922 with an ohmmeter for forward and reverse continuity.
port exceeds 10 mW.
1. Localizing Problems to a Circuit
Power leveling and current limiting (35-Watt models only) are set to values detailed in the
(68P81076C20). These values will vary from unit to unit, depending on the unique variations
of each unit. If symptoms indicate that either of these circuits have failed, verify that the radio
has been properly aligned before investigating the circuitry.
Temperature sense, voltage control limit, and interstage drive limit (on 35-Watt models only)
are fixed by design and are not influenced by the alignment of the radio. If symptoms indicate
that these circuits have failed, then troubleshoot the circuit.
The tests that follow are intended to provide a convenient means of verifying that a particular
circuit is functioning properly. These tests will isolate the failure to a minimum number of
components. Refer to the Theory of Operation and the schematic for information needed to
identify the failed component(s).
2. Temperature Sense Circuit Test
Temporarily install a 6.8k ohm resistor in parallel with RT9650. Key the transmitter and
monitor the output power. The power meter should read approximately 1/2 the rated power
(7.5 Watts or 17.5 Watts).
3. Control-Voltage-Limit Circuitry Test
Disconnect P9641 (Transmitter injection) from the internal transceiver chassis. This will
require removal of the power amplifier assembly. With all other connections in normal
condition, key the transmitter and monitor the control voltage on pin 2 of the power module. If
the voltage exceeds 12.5 V, troubleshoot the control voltage limit circuitry.
4. Interstage Drive Limiter Circuitry Test (35-Watt models)
Check this circuit only when the final device Q9880) has failed. With the radio off, check
CR9930 and associated components.
5. Current-Limiting Circuitry Test (35-Watt models)
When ready to adjust current limit, decrease the relative current limit value with the keyboard
per instructions. After several decrements, the current limit should reduce power from 0.1
Watt to 0.5 Watt. After this test, reset the current limit. If the circuitry does not perform as
indicated, troubleshoot the current limit circuitry.
!
W A R N I N G
!
68P81076C25-C July 1, 2002
6. Power-Leveling Circuitry Test
With the radio connected for power measurements, vary the line voltage from 12.5 to 16 V.
The power should not vary more than 3 Watts. At a line voltage of 13.6 V, vary the frequency
using the three test modes. If power varies more than 3 Watts, measure the detected voltage
on P0853, pin 9. If this voltage varies more than 0.2 V over line and frequency variations, the
power control circuitry (most of which is located on the command board) may be
malfunctioning. If the detected voltage varies less than 0.2 V, the problem is likely in CR9900,
the harmonic filter, the antenna switch, or the output coax. Check continuity through 12 pin
DC connector P0853 on the PA board; check digital/analog circuitry, and check 5-V regulator
operation. See Table 4-24 for typical values.
July 1, 2002 68P81076C25-C
Chapter 5 Troubleshooting Charts
5.1 Introduction
This chapter contains detailed troubleshooting flowcharts. These charts should be used as a guide in
determining the problem areas. They are not a substitute for knowledge of circuit operation and
astute troubleshooting techniques. It is advisable to refer to the related detailed circuit descriptions in
the theory section prior to troubleshooting a radio.
5.2 List of Troubleshooting Charts
Most troubleshooting charts (see Table 5-1) end up by pointing to an IC to replace. It is not always
noted, but is good practice, to verify supplies and grounds to the affected IC, and trace
continuity to the malfunctioning signal and related circuitry before replacing any IC. For
instance, if a clock signal is not available at a destination IC, continuity from the source IC should be
checked before replacing the source IC.
Table 5-1. List of Troubleshooting Charts
Chart
Number
Description
Page
Number
Chart C.1 RF Board Back-End 5-3
Chart C.2 Command Board 5-4
Chart C.3 Radio Power-Up Fail 5-5
Chart C.4 Bootstrap Fail 5-6
Chart C.5 01/90, General Hardware Failure 5-7
Chart C.6 01/81, Host ROM Checksum Failure 5-7
Chart C.7 01/82, or 002, External EEPROM Checksum Failure 5-8
Chart C.8 01/84, SLIC Initialization Failure 5-8
Chart C.9 01/88, MCU (Host C) External SRAM Failure 5-9
Chart C.10 01/92, Internal EEPROM Checksum Failure 5-9
Chart C.11 02/A0, ADSIC Checksum Failure 5-10
Chart C.12 02/81, DSP ROM Checksum Failure 5-10
Chart C.13 02/88, DSP External SRAM Failure U414 5-11
Chart C.16 02/90, General DSP Hardware Failure 5-12
Chart C.17 09/10, Secure Hardware Failure 5-13
Chart C.18 09/90, Secure Hardware Failure 5-13
July 1, 2002 68P81076C25-C
5-2 Troubleshooting Charts: List of Troubleshooting Charts
NOTE: The term C is used in several of the following troubleshooting charts;
C = MCU.
Chart C.19 No RX Audio 5-14
Chart C.20 No TX Modulation 5-15
Chart C.21 Key Load Fail 5-16
Chart C.22 800 MHz Receiver Front-End Hybrid 5-17
Chart C.23 UHF Receiver Front-End Hybrid 5-17
Chart C.24 VHF Receiver Front-End Hybrid 5-18
Chart C.25 ASTRO Spectra Plus VOCON Power-Up Failure 5-19
Chart C.26 ASTRO Spectra Plus VOCON DC Supply Failure 5-20
Chart C.27 ASTRO Spectra Plus VOCON TX Modulation Failure Sheet 1 of 4 5-21
Chart C.31 ASTRO Spectra Plus VOCON RX Audio Failure 5-24
Chart C.32 ASTRO Spectra Plus VOCON Secure Hardware Failure 5-25
Chart C.33 ASTRO Spectra Plus VOCON Key Load Fail 5-26
Table 5-1. List of Troubleshooting Charts (Continued)
Chart
Number
Description
Page
Number
Troubleshooting Charts 5-3
68P81076C25-C July 1, 2002
Chart C.1 RF Board Back-End
Bad SINAD.
Bad 20Db Quieting.
No Recovered Audio.
Inject 1
st
IF
into Johnson connector
on RF board IF Freqs:
109.65MHz
Note: Inject Modulated On
Carrier Frequency
Signal As Required.
Change
Mode
Before Replacing
U301, Check 2nd
VCO.
"Second VCO Checks"
Check RX
Front End.
Check 2nd VCO
"Second VCO Checks"
Audio
Heard?
VCO
Locked?
2.1MHz
Check At
Pin 19
U301?
No
No
Yes
Yes
Yes
"Display Flashes
"FAIL 001""
No
14.4MHz
at ABACUS
U301 Pin
15?
Check U301 Voltages,
Programming, &
14.4MHz VCO
Components.
No
Yes
Activity
On U301
Sel Pin?
Check VOCON
Board.
No
Yes
MAEPF-25192-A
5-4 Troubleshooting Charts
July 1, 2002 68P81076C25-C
Chart C.2 Command Board
Replace and/or
Reprogram
VOCON Board.
(See Note 2)
Control Head Display:
Reprogram or
Replace VOCON
Board (See Note 2).
Error In
VOCON Board.
Replace Board
(See Note 2).
External EE Memory
or VOCN Board
Faulty.
Is
Problem
Corrected?
No
START
LEGEND
U522 - Serial Input/ Output IC
U500 - Regulator Power Control IC (RPCIC)
HLN6458- VOCON Board
U525 - MUX Gate
Yes
Control Head Display:
"FAIL 01/81"
"FAIL 01/82"
"FAIL 01/84"
"FAIL 01/88"
"FAIL 01/02"
Check
RPCIC Enable
At U522-15.
Check Voltages -
UNSW +5V, SW +5V,
+9.6V.
Check VOCON Board
Address/Data
Activity.
Voltages
OK?
Logic
Low?
Check Res
SWB+
U522-28.
Check POR
Reset
P501-29.
START
Yes
No
Activity?
Yes
No
Check Reset
U522-40.
Replace
VOCON Board
(See Note 2).
Problem
In U522.
Clear
Failed Area.
Logic
High?
Yes
No
Check R526
or C511.
Volume
High?
Yes
No
Logic
High?
Yes
No
No
Ok?
No
Yes
Problem Is
RPCIC
Regulators.
Logic
High?
Problem Is
With SWB+
Circuit.
Check +5VDC
P501-33, 34.
and 37.
Problem Is
L510, L511, or
L512
Check BUS+/-
P502-25, 22
(Press Control
Head Button).
+5V
Correct?
Yes
No
Problem Is In
VOCON Board
(See Note 2).
Activity?
Yes
No
Check "ODC"
Output (2.4MHz)
P501-7.
See Note 1.
Yes
Check RX Data
U501-17
(Press Control
Head Button).
Check TX Data
P501-18
(Press Control
Head Button).
Activity?
Yes
No
Activity?
Yes
No
Activity?
Yes
No
Check U522-19
(Press Control
Head Button).
Activity?
Yes
Yes
No
Check
P501-19.
Check Busy In
P501-20
(Press Control
Head Button).
Check Busy Out
P501-19
(Press Control
Head Button).
Activity?
No
Problem Is In
VOCON Board.
(See Note 2)
Replace
RF Board.
No
Yes
Problem Is
SIOIC
Circuits.
Shorted?
Yes
No
Check Q403
For Shorts.
Problem Is
C584 or JU523.
Check U522-20
(Press Control
Head Button).
Activity?
Yes
No
Problem Is
U522, C821, C822,
C870, or C861.
Check 9.6V
Input
U522-14.
Control Head Display: "FAIL 01/90" or Blank
Note 1: See Control Head Troubleshooting Chart In Spectra Detailed Service Manual.
Note 2: See VOCON Board Troubleshooting Chart.
Activity? Activity?
Yes
Yes
No
No
Check U522-13
(Press Control
Head Button).
Check P502-9
(Press Control
Head Button).
Check U522-11
(Press Control
Head Button).
Yes
Problem Is
With R579 or
SIOIC.
Problem Is
With Vocon Board
(See Note 2).
Activity?
No
Problem Is
With U522.
Problem Is
C585 or
JU524.
Activity?
Yes
Yes
No
No
Check U525-14
(Press Control
Head Button).
Check U525-11
For +5 Volts.
Problem Is
Q509 or VR401.
Logic
High?
Problem Is
U525.
Yes
Activity?
No
Problem Is
With R578.
Problem Is
With U522.
MBEPF-25191-O
68P81076C25-C July 1, 2002
Chart C.3 Radio Power-Up Fail
Radio Power-Up
Failure.
Verify standard
bias per table
Table 3 pertaining
to host C.
No
Yes
Standard
Isolate and
repair problem.
See Chart C.5
bias OK?.
Using RSS,
verify radio is
not inhibited.
Signal @ U206 Source
OE* U204
WE* U204
HD0-HD7 U204
4XECLK U204
HA0-HA4,
HA14_IN, HA15_IN,
HA16,HA17 U204
CSIO1* U204
CSPROG* U204
Verify Host Port:
Use ohmmeter to
electrically verify
following signal connections
to source IC:
HA0-HA13 U206
HD0-HD7 U204
MEMR/W* U206
OE* U206
CS* U211
IN_B U204
IN_A U206
Synopsis
This failure assumes the radio
fails to power up correctly and
does not send any Power up
failure messages via the
display or serial bus. Some
basic failure modes:
1) Radio is inhibited.
2) Battery voltage is low.
3) A problem exists with a
supply or system clock.
4) Host C code is corrupted.
5) Host FLASH or RAM is
faulty.
6) Corrupted host C
configuration register.
7) Host C or SLIC is faulty.
1
Radio is
not inhibited or
unable to
check?
Use RSS to
clear radio
inhibit.
Yes No
ReFLASH host
C code.
Error
ReFLASHING
host C code?
Reverify initial
problem.
Initial
problem
persists?
Yes No
Yes
No
End.
Error in
Bootstrapping
host C?
Yes
No
Refer to section
on Failure to
Bootstrap.
Chart C.4
Refer to host C
ROM checksum
error (FAIL 01/81).
Chart C.6
When reFLASHing
host code, there
are two
fundamental modes
of failure: 1) The
host C fails to
respond or 2)
reports an error
in programming.
During radio power-up
Self-Test, verify
activity (transitions
from high to low) on
U202 OE* and WE*.
Using RSS,
reinitialize host
C
configuration
register and
reverify initial
problem. Note:
if this requires
writing the
internal EE, the
radio must be
realigned.
Power up
failure fixed?
1
No
Yes
End.
Connections
good?
Repair
connections.
Yes No
Signals
verified?
Replace U206.
During radio power-up
Self-Test, verify
U202 CS*.
No
Yes
Signals
verified?
Replace U202.
Verify operation of
U211 and logic AND
gate. During radio power
up Self-Test, verify
U211 IN_B.
No Yes
MAEPF-24419-A
Signals
verified?
Replace U211.
Replace U204.
July 1, 2002 68P81076C25-C
Chart C.4 Bootstrap Fail
Note: This
configuration
indicates the
C is in
Bootstrap
mode waiting
for data.
Host C
Bootstrap Failure.
Synopsis
The host C bootstrap mode is
used during reprogramming of
the host C and DSP FLASH
ROMs. Refer to appropriate
Theory of Operation section for
description of bootstrap
operation. Since the operating
code is downloaded through the
serial bus instead of from the
ROM and is initially executed in
the C internal RAM, this is a
good method of verifying
operation of the C. Basic
failure modes:
1) Necessary supplies,
grounds, system clocks not
present.
2) Vpp voltage not set to
correct voltage for bootstrap
mode select or FLASH
programming.
3) Improper configuration of
mode select pins.
4) Improper operation of RESET
to the host C.
5) Improper
configuration/operation of the
host C serial bus.
Verify standard
bias per table
Table 3.
No
Isolate and
repair problem.
See Chart C.5.
Yes
Standard
bias OK?
Verify voltage at VR207
(OPTB+/BOOT_SEL/VPP)
is: 10VDCVPP12.7VDC.
VPP is
correct?
Isolate open
and repair or
adjust VPP as
required.
No
Yes
Verify MODA and MODB of
U204 are pulled to a logic
low state (< .8VDC).
MODA and
MODB are
correct?
Repair inverter
circuit consisting
of VR207 and
Q204.
No
With the host C out of
reset and prior to any
downloading through the
serial bus:
Verify U204-PD1
(BOOT_DATA_OUT) is logic
low and U204-PD0 is logic
high (BOOT_DATA_IN).
Yes
PD0 and PD1
are correct?
Verify
BOOT_DATA_IN and
BOOT_DATA_OUT
are isolated by
MUX U208.
1 2
Yes
No
In some
circumstances
additional code is
downloaded and
placed in external
RAM. In this
case, a failure of
the external RAM
could look like a
bootstrap failure.
1 2
Initiate download
and verify the
data on
BOOT_DATA_IN is
echoed out on
BOOT_DATA_OUT
.
Signals are
isolated?
Verify MUX
control on Pin
4 of U208 is
low.
Yes No
Control
voltage
correct?
Repair inverter
circuit
composed of
VR207 and
Q203.
Replace U208.
Yes
No
Data echoed?
Replace U204.
MAEPF-24420-A
Yes
No
Verify continuity
of BOOT_DATA_IN
from J201-15 to
U204-PD0.
Signal good?
Yes
Verify U204 ECLK
is 1.8432 MHZ
200ppM.
Replace Y201.
Verify download
baud rate is 7200.
Baud rate
correct?
ECLK frequency
correct?
Isolate and
repair open.
No
Fix baud rate.
Yes
Yes
No
No
68P81076C25-C July 1, 2002
Chart C.5 01/90, General Hardware Failure Chart C.6 01/81, Host ROM Checksum Failure
No
No
Yes
Yes
No
Yes
Problem
corrected?
Replace
VOCON
Board.
Check
Command Board for
9.6 V and 5.0 VDC.
Fail 01/90
General Hardware Failure
Replace
Command
Board.
Go to
troubleshooting
for VOCON.
Is there
activity on BUSY, RX DATA,
and TX DATA lines?
Replace
Control
Head.
Replace
Command
Board.
MAEPF-25209-O
Synopsis
This failure indicates the Host
ROM program code is incorrect.
It is implied that the host
processor found and executed
enough valid code at power up
to get to the point of verifying
the rest. Basic failure modes
are as follows:
1) The contents of U205/U210
have been corrupted.
2) The decoding logic comprised
of U204 and U206 is not
working properly due possibly
to circuit opens or shorts or
that a failure of one or more of
these ICs has occurred.
3) U205 or U210 has failed.
Due to the fact that the Host C
successfully initialized, a
failure in one of the ICs is not
likely.
Repair opens.
Fail 01/81
Host ROM Checksum
Failure
Connections
good?
No
Yes
Visually inspect all
leads to U205 and
U210 with a 5x glass.
Check for operation of
U204 and U206 as
follows: During radio
power up Self-Test,
verify activity
(transitions from high
to low) on U205/U210 -
ROM1CS*/ROM2CS*,
and OE*.
Use ohmmeter to electrically
verify following signal
connections to source IC:
Signal @ U205/U210 Source
HD0-HD7 U204
HA0-HA13 U204
HA14OUT,HA15OUT U206
HA16,HA17 U206
ROMCS1*,ROMCS2* U206
OE*,MEMR/W* U206
VCC +5V
VSS GND
Replace
U205/U210.
No
MAEPF-24421-A
Yes
Host ROM
ReFLASH
passed?
No
Yes
Connections
good?
Repair opens.
Yes
No
ReFLASH Host
ROM
End
Initial
operation
checks
Good?
Refer to section on
Power-up Failure C.3
and/or Fails to
Bootstrap C.4.
July 1, 2002 68P81076C25-C
Chart C.7 01/82 or 002, External EEPROM Checksum Failure Chart C.8 01/84, SLIC Initialization Failure
Reprogram
external EEPROM.
External
EEPROM
reprogrammed?
End
Yes
Repair opens.
Connections
good?
No
Yes
Verify operation of
Power-Down Reset Per
Fig. W9.
Reset
Functional?
Replace U407.
No
Yes
Fail 01/82 or 002
External EEPROM
Checksum Failure
HD0-HD7 U204
HA0-HA13 U204
HA14OUT U206
EE1CS* U206
OE*,MEMR/W* U206
RESET* U407
VCC +5V
VSS GND
Check for operation of
U204 and U206 as
follows: During radio
power up Self-Test,
verify activity
(transitions from high
to low) on U201 -
EE1CS*, and OE*.
Replace
U201.
No
Yes
No
MAEPF-24415-A
Initial
operation
checks
Good?
Refer to section on
Power-up Failure C.3
and/or Fails to
Bootstrap C.4.
Synopsis
This failure indicates the
External EEPROM data
containing mostly customer
specific channel/mode
information is incorrect.
Basic failure modes are as
follows:
1) The contents of U201 has
been corrupted. A possible
cause of this failure would be
the improper operation of the
RESET circuit during a radio
power down sequence.
3) U201 has failed.
Fail 01/84
SLIC Init Failure
Verify standard
bias per table
Table 3 pertaining
to SLIC.
No
Isolate and
repair problem.
Yes
Standard
bias OK?.
Verify Host/SLIC connections:
OE* U204
WE* U204
HD0-HD7 U204
4XECLK U204
HA0-HA4,
HA14_IN, HA15_IN,
HA16,HA17 U204
CSIO1* U204
CSPROG* U204
Synopsis
This failure indicates a failure
in verification of the data in the
SLIC parallel programming
registers Some basic failure
modes:
1) Missing supply or ground to
SLIC.
2) Open in parallel address bus,
data bus or associated select
lines between the host C and
the SLIC.
3) 4xECLK missing to the SLIC.
4) SLIC is faulty.
Verify 4xECLK on SLIC;
nominal 1.8432MHz
square wave, 0-5V.
Connections
good?
Repair
connections.
MAEPF-24664-A
Yes No
Signals
verified?
No
Yes
Replace U206.
Replace U204.
68P81076C25-C July 1, 2002
Chart C.9 01/88, MCU (Host mC) External SRAM Failure Chart C.10 01/92, Internal EEPROM Checksum Failure
Fail 01/88
Host C External RAM
Failure.
Verify standard
bias per table
Table 3 pertaining
to host C.
No
Isolate and
repair problem.
Yes
Standard
bias OK?.
OE* U204
WE* U204
HD0-HD7 U204
4XECLK U204
HA0-HA4,
HA14_IN, HA15_IN,
HA16,HA17 U204
CSIO1* U204
CSPROG* U204
Verify Host RAM:
Use ohmmeter to
electrically verify
to source IC:
HA0-HA13 U206
HD0-HD7 U204
MEMR/W* U206
OE* U206
CS* U211
IN_B U204
IN_A U206
Synopsis
This failure indicates a failure
in the C external SRAM at
power up test. Some basic
failure modes:
1) Missing supply or ground to
SLIC.
2) Open in parallel address bus,
data bus or associated select
lines between the host C and
the SLIC and the SRAM.
3) 4xECLK missing to the SLIC.
4) SLIC is faulty.
5) Improper decoding logic due
to open or failure of U211 AND
logic gate.
6) SRAM is faulty.
Connections
good?
Repair
connections.
Yes No
Signals
verified?
During radio power up
Self-Test, verify
U202 CS*.
No
Yes
Signals
verified?
Replace U202.
MAEPF-24665-B
No Yes
No Yes Signals
verified?
Replace U211. Replace U204.
Replace U206.
Verify operation of
U204 and U211 logic AND
gate. During radio power
up Self-Test, verify
U211 IN_B.
During radio power up
Self-Test, verify
U202 OE* and WE*.
Replace U204.
Reprogram Internal
EEPROM.
Internal
EEPROM
reprogrammed?
End
No
Yes
Verify operation of
Power Down Reset Per
Fig. W9.
Reset
Functional?
Replace U407.
No
Yes
Fail 01/92
Internal EEPROM
Checksum Failure
Realign radio.
MAEPF-24407-B
Synopsis
This failure indicates the Host
C internal EEPROM is incorrect.
This data contains, among other
things, radio tuning parameters.
Basic failure modes are as
follows:
1) The contents of the internal
EEPROM have been corrupted.
A possible cause of corrupted
data may be improper operation
of the power down RESET
circuit U407.
2) An internal failure of U204
has occurred.
July 1, 2002 68P81076C25-C
Chart C.11 02/A0, ADSIC Checksum Failure Chart C.12 02/81, DSP ROM Checksum Failure
ASTRO SABER C.11
FAIL 02/A0 ADSIC CHECKSUM
FAILURE TROUBLESHOOTING
MAEPF-24416
CHECK ILLUSTRATOR DATE ENGINEER DATE PROGRAM DISK
TECHNICAL PUBLICATIONS DEPT.
DWG. NO.
Synopsis
The ADSIC calculates a checksum of the
configuration bus data programmed
through the Host C SPI interface. This
failure indicates some problem with the
data. It should be noted that this is a
non-fatal error as it happened. As the
ADSIC controls some of the functions of
the DSP memory mapping and
interrupts, some aspects of ADSIC
programming problems may cause a
general DSP hardware failure. Some
operation of the ADSIC can be
determined by looking for the 8KHz @
IRQB. This signal is present only after
the host C has programmed the IC.
Partial operation of the device may point
to a missing supply connection. Basic
failure modes are as follows:
1) An open or short in the DSP address
or data bus and select lines may cause
an error in reading the checksum.
2) Missing or improper 2.4 MHz clock
reference.
3) Missing signal in the Host C SPI
programming interface.
4) Open or missing analog or digital
supply at one or more IC pads.
5) General IC failure.
Fail 02/A0
ADSIC Checksum
Failure
D8-D23 U405
A0-A2,A13-A15 U405
PS*,RD*,WR* U405
SELx,RSTx U204
SPD,SCLK U204
1
VDDD,VDD1,VDD2,
VDD3 +5V
VDDAb,VDDA +5VA
VSSD,VSS1,VSS2,
VSS3 GND
2
VSSA,VSSAb AGND
ABI R402
1
Note: Finding an open at VDDx
may be difficult because of low
isolation between supply pins.
2
Also measure continuity
between GND and AGND through
jumper JU407.
Connections
good?
Repair opens.
No
Verify 2.4MHz
reference clock at
U406 IDC per Fig.
W10
Clock
Present?
Verify SPI
programming
signals per Fig.
W6. initiated by
mode change.
Programming
signals
verified?
Verify U406-
RSTx goes high on
initial power up.
Reset high?
Replace U406.
Verify clock at
ABACUS
source and/or
fix connection.
Verify SPI operation
by verifying
programming of
synthesizer IC
initiated by a channel
change. If pass find
connection problems to
U406. A failure
indicates a software
problem or hardware
fault with U204.
No
Yes
Yes
No
Yes
MAEPF-24416-O
No
Yes
Replace U204.
At radio power up,
verify U404
A14,A15,A16
transisiton to a high
logic state. Verify
activity(transitions
from high to low)
on U404 - CE*.
Use ohmmeter to
electrically verify
following signal
D0-D7 U405
A0-A13,A17 U405
A14-A16 U406
CE* U406
OE*,WE* U405
VCC +5V
VSS GND
Replace U404
ADSIC
Good?
Replace U406
No
Yes
DSP ROM
ReFLASH
passed?
End
No
Yes
Repair opens.
Fail 02/81
DSP ROM Checksum
Failure
Visually inspect all
leads to U404 with
a 5x glass.
Connections
good?
No
Yes
Connections
good?
Repair opens.
Yes
No
Go to section
on ADSIC
Checksum
Failure (02/A0).
Chart C.11
ADSIC
Good?
Yes
MAEPF-24417-O
ReFLASH DSP
ROM
No
Synopsis
This failure indicates the DSP
ROM program code is incorrect.
It is implied that the DSP found
and executed enough valid code
at power up to get to the point
of verifying the rest. Basic
1) The contents of U404 has
been corrupted.
3) U405 has failed.
Due to the fact that the DSP
successfully initialized, a
failure in one of the ICs is not
likely.
ASTRO SABER C.12
FAIL 02/81 DSP ROM CHECKSUM
FAILURE TROUBLESHOOTING
MAEPF-24417
CHECK ILLUSTRATOR DATE ENGINEER DATE PROGRAM DISK
DWG. NO.
68P81076C25-C July 1, 2002
Chart C.13 02/88, DSP External SRAM Failure U414 Chart C.14 02/84, DSP External SRAM Failure U403
R3SEL*
appears
functional?
Yes
Replace U414.
Do all three
SRAMs
exhibit a
fault?
Replace U405.
Yes
MAEPF-24410-B
No
No
ADSIC
checksum
error?
Refer to
section on
FAIL 02/A0.
Chart C.11
Yes
No
During power
up Self-Test
verify E1~ on
U414 is enabled
by high to low
transitions of
R3SEL*.
During power-up
verify operation
of U415 by
looking for
transitions on
inputs IN_B and
IN_A.
Inputs to
U415
functional?
Replace U415.
Replace U405.
Yes
No
Synopsis
On power-up the DSP writes
data to the device and then
verifies the data. This failure
indicates the DSP SRAM failed
this pattern/checksum test.
U414 is selected by the DSP
(U405) address bus with the
addition of the OR logic gate
U415. Basic failure modes
are as follows:
1) Some problem exists
(open/shorts) with the
external address/data bus.
2) Possible failure of the DSP
address/data bus or
RD*/WR*/PS*/DS* signals
used in selecting this part.
Since the other two DSP
SRAMs share this bus as well
as other ICs, this is not a likely
failure.
3) Operational failure of the OR
logic of gate U415.
4) Open in supply or ground to
the IC.
5) Failure of the IC.
Fail 02/88
DSP SRAM U414
Failure
Use ohmmeter to
electrically verify
to source IC:
D0-D23 U405
A0-A12 U405
WR*,RD* U405
E1* U415-OUT
E2 U406-A15
X/Y*,V/S* GND
VCC +5V
VSS GND
IN_A U405-A14
IN_B U405-A13
Connections
good?
Repair opens.
Yes
No
Check for
ADSIC
programming
checksum
error.
Fail 02/84
DSP SRAM U403
Failure
Synopsis
On power-up the DSP writes
Besides utilizing decoding logic
from the DSP (U405), U403
has additional logic in the form
of RSEL from the ADSIC
(U406). A problem with the
ADSIC in the form of a
programming or hardware fault
will cause a problem with the
operation of this part. Basic
2) Some problem exists with
the ADSIC memory select
(RSEL) which may include an
ADSIC programming problem
(SPI bus) or possibly a failed
ADSIC.
address/data bus or
failure.
the IC.
Use ohmmeter to
electrically verify
to source IC:
D0-D23 U405
A0-A12 U405
WR*,RD* U405
E1* U405-A15
E2 U406-RSEL
X/Y*,V/S* GND
VCC +5V
VSS GND
RSEL
appears
functional?
Yes
Replace
U406.
Replace U403.
Do all three
SRAMs
exhibit a
fault?
Replace U405.
MAEPF-24409-B
Yes
No No
Connections
good?
Repair opens.
Yes
No
Check for
ADSIC
programming
checksum
error.
ADSIC
checksum
error?
Refer to
section on
FAIL 02/A0.
Chart C.11
Yes
No
During power
up Self-Test
verify E2 on
U403 is enabled
by low to high
transitions of
RSEL.
July 1, 2002 68P81076C25-C
Chart C.15 02/82, DSP External SRAM Failure U402 Chart C.16 02/90, General DSP Hardware Failure
Does a fault
exist with
U403?
MAEPF-24408-B
Yes
Refer to a
Fail 02/84.
Replace U402.
Do all three
SRAMs
exhibit a
fault?
Replace U405.
Yes
No No
Connections
good?
Repair opens.
Yes
No
Check for
ADSIC
programming
checksum
error.
Use ohmmeter to
electrically verify
to source IC:
D0-D23 U405
A0-A12 U405
WR*,RD* U405
E1* U405-A15
E2 U405-A13
X/Y*,V/S* GND
VCC +5V
VSS GND
Synopsis
On power up the DSP writes
U402 decoding logic consists
entirely of address lines from
the DSP (U405). A failure in
this part would point to the
part itself or with the DSP.
However the possibility exists
for a decoding logic problem to
cause one of the other SRAMs
to overwrite U402. This is
particularly the case with
U403 which is selected with
the RSEL signal from ADSIC
(U406). This problem should
be investigated before
replacing any parts. Basic
address/data bus or
failure.
the IC.
Fail 02/82
DSP SRAM U402
Failure
ADSIC
checksum
error?
Refer to
section on
Fail 02/A0.
Chart C.11
Yes
No
Due to the
possibility of a
failure causing
a RAM overlap,
U403 should be
verified.
Fail 02/90
DSP Hardware
Failure
Verify standard
bias per table
Table 3.
No
Isolate and
repair problem.
See Chart C.5
Yes
Standard
bias OK?.
Reflash DSP
code.
Unable to
Reflash
DSP code?
Fail
02/90
persists?
Verify Host Port:
Use ohmmeter to
electrically verify
to source IC:
H0-H7 U204
HA0-HA2 U204
HR/W* U204
HEN* U204
RESET U204
On power up, verify
transitions on HEN* from
high to low indicating DSP
is being selected.
Synopsis
On power-up the host C sends
several handshake commands
through the host interface to
the DSP system to coordinate
the power up programming of
the ADSIC and detect any DSP
power up status messages..
This error indicates the host
never received a response
from the DSP. The power up
code is downloaded from U404
and executed internally in the
DSP. This is a wide ranging
problem which may be difficult
to isolate without special tools.
Some basic failure modes:
1) Some fundamental system
clocks or supplies are not
operational.
2) Improper operation of the
ADSIC memory mapping
functions.
3) Corrupted DSP FLASH
program code.
4) Hardware problem with host
C/DSP interface.
5) Improper configuration of
MODA and MODB by ADSIC.
6) DSP_RST* not operating
correctly.
7) ADSIC not functional due to
missing 2.4MHz reference.
Yes
No No
Yes
End.
Verify D23 is
pulled high
through R404
at power up.
Replace U405.
D23 is
high?
Yes
No
Repair problem
with R404.
FLASH
programming
error
generated?
No
Refer to
section on DSP
ROM failure
(Fail 02/81).
Chart C.12
Yes
At power up
verify state of
MOD select
pins on DSP
when RESET
goes high:
MODA High
MODB Low.
MOD pins
correct?
Yes
No
Verify
operation and
continuity of
RSTx on U406.
On power up,
signal should
transition
from low to
high.
ADSIC RESET
functional?
Replace U204.
No
Yes
Verify 2.4
MHz reference
on U406-IDC
per Fig W10.
*Note
frequency may
be off, if
sequence was
aborted before
ABACUS was
programmed.
Reference
present?
Yes
MAEPF-24414-B
No
Replace U406.
Verify
operation of
ABACUS IC
and repair as
necessary.
Host port
operation
verified?
Repair opens
as necessary.
No activity
exists on
pins when
measured on
U204 at power
up may
indicate a bad
C. If this is
the case
replace U204.
Replace U405.
Yes
No
68P81076C25-C July 1, 2002
Chart C.17 09/10, Secure Hardware Failure Chart C.18 09/90, Secure Hardware Failure
Repair opens.
Fail 09/10
Secure Hardware
Failure
Verify connections
to secure module
through J801.
Connections
good?
No
Yes
Synopsis
This failure relates only to
secure equipped radios and
indicates a power up self-test
failure for the secure module.
More specifically this failure
indicates a failure in
communications between the
Host C and secure module.
The secure module is not
considered field repairable so
troubleshooting is limited to
verifying a problem with the
module and replacing. Typical
failure modes would be:
1) Open between secure module
and vocon board at J801.
2) The host C communicates
with the secure module via the
SPI bus (Refer to Fig. S1). A
failure of this bus.
3) Failure to get proper
supplies and grounds to J801.
Replace module
with known
good one and
retest.
Is known
good module
available?
No
Yes
Radio
functions
with known
good
module?
Replace secure
module.
Yes
Signal @ J801 Source
MOSI,MISO,SPI_SCK U204
EMC_WAKEUP* U206
EMC_EN* U206
EMC_REQ U206
Pins 6,21,22 GND
Verify bias of following signals
Signal@J801 Nominal Bias
UNSW_B+ 7.5VDC1.0VDC
SW_B+ 7.5VDC1.0VDC
GND GND
No
Connections
good?
Repair
connections.
Yes
No
Verify electrical activity at the
following signals at power up:
MOSI,MISO,SPI_SCK U204
EMC_WAKEUP* U206
EMC_EN* U206
EMC_REQ U206
Signals
good?
No
Yes
MAEPF-24411-O
Replace secure
module.
Replace
respective
source IC or
VOCON board.
ASTRO SABER C.17
DWG. NO.
Signals
good?
No
Yes
Replace secure
module.
Replace
respective
source IC or
VOCON board.
Repair opens.
Fail 09/90
Secure Hardware
Failure
Verify connections
to secure module
through J801.
Connections
good?
No
Yes
Synopsis
indicates a power up self-test
failure for the secure module.
More specifically this failure
indicates a failure in
communications between the
DSP and secure module. The
secure module is not considered
field repairable so
troubleshooting is limited to
verifying a problem with the
module and replacing. Typical
failure modes would be:
1) Open between secure module
and vocon board at J801.
2) The DSP communicates with
the secure module via the
SCI/SSI bus (Refer to Fig. S1).
A failure of this bus.
3) Failure to get proper
supplies and grounds to J801.
Replace module
with known
good one and
retest.
Is known
good module
available?
No
Yes
Radio
functions
with known
good
module?
Replace secure
module.
Yes
EMC_RXD U405
EMC_TXD U405
Pins 6,21,22 GND
Verify bias of following signals
Signal@J801 Nominal Bias
UNSW_B+ 7.5VDC1.0VDC
SW_B+ 7.5VDC1.0VDC
GND GND
No
Connections
good?
Repair
connections.
Yes
MAEPF-24412-O
No
Verify electrical activity at the
following signals at power up:
EMC_RXD U405
July 1, 2002 68P81076C25-C
Chart C.19 No RX Audio
Synopsis
This failure indicates a lack of
received audio with the fault lying
with the VOCON or Command
board. It assumes a functional
transceiver and no power
up fail codes were displayed.
Since all received signal modes
occur through this same path,
this failure applies to digital/
PL,DPL, etc. Failure modes are
as follows:
1) Missing DSP IRQB interrupt.
2) Lack of 2.4 REF clock and/or
data from ABACUS.
3) Missing clock or data on SSI
port from ADSIC.
4) Non-functional control of or
faulty Audio PA.
5) Faulty ADSIC.
No Receive Audio
Set radio to test mode CSQ.
Inject a 1KHz modulated
signal at the carrier.
Frequency at -60dBm level
with 3KHz deviation.
Verify signal
at output of
U524 pin 2.
Signal
present?
Verify signal
at input of
U524 pin 1.
Signal
present?
Verify signal
present at
U450 pin 2.
Signals
present?
Signal
present?
Signals
present?
Check for
continuity from
U524 to U450.
Repair connection
from C412 to U524.
Verify control
lines to U524.
Troubleshoot
control or
supply lines.
Signals
present?
Replace U524.
Verify signals
present at U450
pins 11 and 13.
Replace U450.
Troubleshoot
control or
supply lines.
Verify control
and supply
for U450.
Repair connection
from U450 to
speaker terminals.
MAEPF-26075-O
Yes
No
Yes
No
Yes
No
No
No
No
No
No
Yes
No
Yes
Verify signals per
Fig. W2 at points
indicated.
Signals
present?
Replace U406.
Check for continuity between
U405 and U406 of the
signals depicted in Fig. W2
and the 8KHz IRQB.
No
Yes
Alert tone
audible?
Perform radio functions,
which causes an alert
tone to be generated.
Replace U405.
Replace U406.
No
Yes
Connections
good?
Repair connections.
Yes
Standard
bias OK?
No
Yes
No
Yes
Signals
present?
No
Yes
Signals
present?
Yes
Yes
No
Fig. W7-
Trace 1
present?
Fig. W7-
Trace 2
present?
Fig. W7-
Trace 3 or 4
present or in
phase?
Yes
Yes
Verify standard
bias per Table 6.
Isolate and
repair problems,
See Chart C.5.
Verify signals present at
ADSIC (U406) per Fig. W10
and Fig. W5. Note DOUT
and DOUT* are low-level
voltage signals.
During a mode change,
verify an ABACUS
programming sequence
occurs per Fig. W4,
probing on the
ABACUS carrier.
Verify signals per
Fig. W7 at points
indicated. ABACUS is
programmed?
No
Yes
Verify SBI signal
connection between
ADSIC and ABACUS
ICs; repair as necessary.
If connection is good
replace U406.
Fault lies with RF
board. Refer to
appropriate section,
Chart C.1.
Replace U406.
Check for continuity
from U406 to C412.
Check for shorts and
check C412.
68P81076C25-C July 1, 2002
Chart C.20 No TX Modulation
No Tx Modulation
Signal
present?
between U406
and U401.
Signal
present?
Signal
present?
Signals
present?
between U401
and U523.
PTT radio using
microphone.
Verify 1KHz signal
present at output
of U523.
MAEPF-26076-O
Replace U406.
Replace U405.
Replace U406.
Replace U530.
Replace U402.
Replace part.
Verify that Q541 and
Q554 are good.
Verify 1KHz signal
present at U401.
Verify 1KHz signal
present at U523.
Verify
control lines.
Troubleshoot
RF board.
Verify 1KHz signal
present at J500-1.
Repair connection
or replace Q542.
Verify data
goes into U530.
Verify that data is
getting to U530.
Troubleshoot VOCON
board data lines.
Verify signals per
Waveform W3 at
indicated points.
Verify audio at
input to U524
pin 4.
Verify pin 1 of
U530 goes Hi
on PTT.
Verify 1KHz signal
present at input
of U402.
No
Replace U406.
No
Yes
Yes
Signal
present?
No
Signal
present?
No
Signals
present?
Yes
Signal
present?
Yes
No
No
No
No
Yes
No
1
Yes
Verify control
signals at U524.
Ext Mic Hi
VRX TX audio Low
No
Control
signals
correct?
Standard
bias OK?
No
Yes
No
1
2
No
Fig. W8
Trace 4
present?
Yes
No
No
Functional?
Replace U524.
Yes
Yes
Signal
present?
Yes
Signals
present?
No
Yes
Fig. W3
Trace 1 and 3
present?
Yes
Repair connection.
Replace U401.
Replace U523.
Replace U402.
Repair connection.
Replace U530. Repair connection.
No
Continuity?
Yes
Yes
Yes
No
No
Fig. W3
Trace 2
present?
Yes
Fig. W8
Trace 2
present?
Yes
Verify standard
bias per Table 6.
Isolate and
repair problems,
See Chart C.5.
Verify TX LED is
on in display of
control head.
Verify signal per
Figs. W8
and W10.
Signal
present?
Yes
Yes
1
2
Fig. W8
Trace 1
present?
No
LED on?
No
Yes
Fig. W8
Trace 3
present?
No
Yes
Inject a 80 mV
1KHz mic. signal
into the microphone
connector.
Trace PTT line from
PTT switch to U522
and on to U206.
Correct problems.
Trace Mic Hi line back
to the microphone
connector and
correct problem.
Synopsis
This failure indicates a lack of
transmit modulation with the
fault lying with the VOCON or
Command board. It assumes no
power up codes were displayed.
Since all modulation modes
occur through the same path,
this failure applies to digital/
PL,DPL, etc. Failure modes are
as follows:
1) Error with host C in which
PTT is not detected.
2) Missing DSP IRQB interrupt.
3) Missing clock or data on SSI
port from/to ADSIC.
4) Damaged microphone.
5) Faulty ADSIC IC.
July 1, 2002 68P81076C25-C
Chart C.21 Key Load Fail
Replace U206.
Repair
connection.
Verify and repair
connection of
OPT_SEL2/KEYLOAD*
from KVL to Universal
connector to J206.
Verify the use of the correct keyloader per the following table:
Secure Board Kit(s) Kit KVL Kit(s) Encryption
NTN7770 T3010DX DVP
NTN7771 T3011DX DES
NTN7772 T3011DX DES-XL
NTN7773 T3012DX DVI-XL
NTN7774 T3014DX DVP-XL
NTN7329 T3012DX & T3010DX DVI-XL & DVP
NTN7332 T3011DX & T3010DX DES-XL & DVP
NTN7331 T3011DX & T3014DX DES-XL & DVP-XL
NTN7330 T3014DX & T3010DX DVP-XL & DVP
NTN7370
NTN1146
NTN1152
NTN1153
NTN1158
NTN1147
NTN1367
NTN1368
NTN1369
NTN1370
NTN1371 T3014DX & T3012DX DVP-XL & DVI-XL
NTN1562 NTN8408 DES-OFB
NTN1563 NTN8409 DES-OFB & DES
NTN1564 NTN8410 DES-OFB & DES-XL
NTN1565 NTN8411 DES-OFB & DVP-XL
NTN1566 NTN8412
T3011DX
T3011DX
T3011DX
T3011DX & T3014DX
T3011DX & T3012DX DES-OFB & DVI-XL
Verify the use of the correct KVL cable as a TKN8506.
With KVL attached to
radio and radio on,
verify display
message "KEYLOAD"
Obtain correct
KVL and cable.
Keyload
Failure
No
Synopsis
indicates a failure to load key
with the KVL indicated by the
message "x FAIL" and key fail
tone. Typical failure modes
would be:
1) Open between Pin 10 of the
universal connector C which
places radio in Keyload mode.
2) Use of wrong KVL or KVL
cable for ASTRO Digital Spectra
radio.
3) Failure of secure module.
"KEYLOAD"
message
displayed?
Correct
equipment?
Yes
No
With KVL attached to
radio and radio on,
inititate a keyload by
pressing P-T-T on the
keyloader and look for
activity on J801-15.
Activity?
Yes
Verify connection of
RTSIN*/KEYFAIL*
from the universal
connector pin 9
and from J206 to
J801-15.
Verify
connection
across J801.
Good
connection?
Good
connection?
Repair
connection.
Replace
secure module.
Yes No
No
Yes Yes
No
MAEPF-24413-B
68P81076C25-C July 1, 2002
Chart C.22 800 MHz Receiver Front-End Hybrid Chart C.23 UHF Receiver Front-End Hybrid
START
Measure Transceiver
Sinad by Injecting
at J9127 Signal
Yes
No
Sinad
<- 119
?
Yes
No
No
No
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No Problem with
RX Front End or
RF Board
Measure RF Board
Sinad: Inject
109.65MHz into RF
Board at J350
Sinad
<- 119
?
Troubleshoot
RF Board
Check DC
Voltage at IF
Output Pad
9.6V
?
Troubleshoot
DC Feed from
RF Board
~_
~_
Check Biasing
on Q8126:
Vcollector ~_
8.0V
Vbase = 0.4 to 0.8V
OK
?
Check Bias Circuit
and Associated
Components
Check Module Gain: Inject
On-Channel Signal
(851-870 MHz) of -20dBm
at J9127: Measure Level 109.65
MHz Out at IF Output Pad
Check Beta
of Q8126
Replace Q8126
Measure RF Level
at Base of Q8126
Recheck RF BD
and Transceiver
Sinad
Measure Level of
On-Channel Signal
at Preselector
Input Pad
Check Inject Level
at Injection Input Pad
Troubleshoot
RF Injection or
Carrier Board
Replace
RXFE Board
Check Components
in Output Network
C8129, 30, 31, 36:
L8129, 30, 31:
R8129, 30, 31:
Replace as
Necessary
-10 dBm
to -14 dBm
?
B = <60
?
-1 dBm
?
+ 3 dBm
?
>_
-20 to -23 dBm
?
START
Measure Transceiver
Sinad by Injecting
at J9127 Signal
Yes
No
Sinad
<- 120
?
Yes
No
No
No
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No Problem with
RX Front End or
RF Board
Measure RF Board
Sinad: Inject
109.65MHz into RF
Board at J350
Sinad
<- 120
?
Troubleshoot
RF Board
Check DC
Voltage at IF
Output Pad
12V
?
Troubleshoot
DC Feed from
RF Board
~_
~_
Check Biasing
on Q9125:
Vcollector ~_
10V
Vbase = 0.4 to 0.8V
OK
?
Check Bias Circuit
and Associated
Components
Check Beta
of Q9125
Replace Q9125
Measure RF Level
at Base of Q9125
Recheck RF BD
and Transceiver
Sinad
Measure Level
at Preselector
Input Pad
Check Injection Level
Troubleshoot
RF Injection or
Carrier Board
Replace
RXFE Board
Check Components
in Output Network
Replace as
Necessary
-20 dBm
to -17 dBm
?
B = >60
?
-10 dBm
?
+ 10dBm
?
>_
-20 dBm
?
Signal -20dBm at J9127
Measure at IF Output Pad
~~
~
July 1, 2002 68P81076C25-C
Chart C.24 VHF Receiver Front-End Hybrid
START
Measure Transceiver
Sinad by Injecting
at J9127 Signal
Sinad
<-120 with Preamp
?
Yes
No
No
No
No
Yes
Yes
No
Yes
Yes
Yes
No
No
Yes
No Problem with
RX Front End or
RF Board
Measure Sinad
Inject 106.5 MHz
into RF Board
at J350
Sinad
<- 120
?
Troubleshoot
RF Board
Check DC
Voltage at IF
Output Pad
9.6V
?
Troubleshoot
DC Feed from
RF Board
~_
Check Biasing
on Q3202:
Vcollector ~_
7.5V
Vbase
?
Check Bias Circuit
and Associated
Components
Measure RF Level
at Input of 1st
Check Inject Level
Troubleshoot
RF Injection or
Carrier Board
+ 20dBm
?
>_
160MHz -20dBm at J9127
Measure at IF Output
Is
<-117 non-
Preamp
Is
Voltage
~_
0.9 to 1.6V
Is
Voltage At
Q3202 OK
Is
>-13 with
Preamp; >-22 Non-
Preamp
?
Recheck RF Board and
Transceiver Sinad
Mixer
Is
>-7dBm with
Preamp; >-17 dBm
Non-Preamp
?
Check the Preselector
and its Components
Replace as Necessary
Is
Level
Check 1st Mixer and
Associated Components
Replace as Necessary
68P81076C25-C July 1, 2002
Chart C.25 ASTRO Spectra Plus VOCON Power-Up Failure
Verify Standard Bias per
Table (xref to standard operating bias table)
Standard Bias
OK?
See Chart C.26
Measure waveform at R428,
should match Figure 6-11
Waveform
OK?
Make sure the following
components are placed
and soldered correctly:
U408, Y401, R427, R425, R426,
C423, C424, C422
OK?
Repair proper
components
Replace Y401
Fixed?
END
END
Replace U408 Fixed?
Refer board to
Service Depot
Yes
No
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Measure waveform at TP401,
Waveform
OK?
Waveform
OK?
Refer board to
Service Depot
Y400, U409, R456, R441, R442,
R435, R436, C420, R421, R430,
R443, C439, L400, C427
Measure waveform at C326,
Yes
Yes
Yes
Yes
Yes
END
END
No
No No
No
No
OK?
OK?
Repair proper
components
Repair Y400
Replace U409
Fixed? Fixed?
Refer board to
Service Depot
Make sure C326 is placed
and soldered correctly
Refer board to
Service Depot
Repair C326
Note: Amplitude
may be lower
than Figure
July 1, 2002 68P81076C25-C
Chart C.26 ASTRO Spectra Plus VOCON DC Supply Failure
Check for 1.8V at R419
U410, C430 R431, R451, R452,
C433, C415, R419
OK?
Repair proper
components
Replace U410
Fixed?
Refer board to
Service Depot
Yes
No
No
No
No
Yes
Yes
Yes
Check for 3.0 V at R420
Present?
Present?
No trouble found
U411, C434, C435, C436, C437,
Check for 13.8 V at J501-35
Yes
Yes
Yes
Yes
END
END
No
No
No
No
OK?
OK?
Repair proper
components
Replace U411
Fixed?
Refer board to
Service Depot
Inspect placement and
soldering of J501
Refer board to
Service Depot
Repair connector
Present?
R420
Yes
END
No
Fixed?
Recycle radio
power
68P81076C25-C July 1, 2002
Chart C.27 ASTRO Spectra Plus VOCON TX Modulation Failure Sheet 1 of 4
No
Yes
A
B
Yes
No
Inject a 1kHz tone into MIC
with sufficient amplitude to
produce 3kHz of deviation,
PTT radio
Measure waveform at
TP208, should match
Figure 6-13
Waveform
Correct?
Amplitude of
Waveform
may vary
Measure waveform at R208
(left) should match Figure 6-13
Waveform
Correct?
Check 5V supply of U202-8
and GND U202-4
Measure waveform at
TP209, should match
Figure 6-13
Waveform
Correct?
Amplitude of
Waveform
may vary
Amplitude of
Waveform
may vary
OK?
Inspect and Repair
U202
Measure waveform at
U201-9
Make sure the following components
are placed and soldered correctly:
U202, R207, R208, C216, R209, R226,
C223, C217
OK?
Repair proper
components
Replace U202
No
Yes
No
Yes
No
Yes
No No
Yes
Waveform
Correct?
No
Yes
Check that 3V is present at
U201-45, 31, 27, 3. Check
GND at U201-30, 28, 4
OK?
Measure waveform at J501-49
Amplitude of
Waveform
may vary
Waveform
Correct?
Inspect and repair
J501
Yes
Yes
No
No
Measure waveform at J501-48
Amplitude of
Waveform
may vary
Waveform
Correct?
Inspect and repair
J501
No
Yes
Keyed 9.4V
Check for 5V at
J501-45
Present?
Yes
No
Check for GND
at J501-14
Inspect J501
connections
Present?
No
Yes
OK?
Make sure the following parts
are the correct value: R207,
R208, R209, R226, R202,
R231, C216, C215
Correct?
Replace proper
components
Yes
No
No
Repair J501
Yes
Make sure the following parts
are the correct value: R401,
R408, R405, C405, C403,
R400, R407, C402, R438,
R437, R406, C404
Correct?
Yes
No
No trouble
found
Replace proper
components
Measure waveform at C203
and C204, should match
Figure 6-14 Traces 1 and 2
Waveform
Correct?
Check 5V supply of U202-8
and GND U202-4
U202, R202, R231, and C215
Check that 3V is present at
U201-45, 31, 27, 3. Check GND
at U201-30, 28, 4
OK?
Repair U201
Yes
OK?
Yes
No
Inspect and repair
U202
Repair U201
Replace U202
Repair proper
components
OK?
Yes
No
Amplitude of
Waveform
may vary
Continued on
next page
Continued on
next page
July 1, 2002 68P81076C25-C
A
C
Inspect U201
OK?
Repair component
Measure waveform at U201-39
Waveform
correct?
Inspect R200,
R201, and C201
Repair components
OK?
Repair oscillator
circuit
16.8MHz
Clock
Check SSI connections per
Figure 5. U201-35 = STD - T1
U201-34 = FS -T2
U201-33 = SCK - T3
OK?
Check SPI connections per
Figure 6. U201-44 = ADDAG_SEL
-T1
U201-43 = QSCKA - T2
U201-42 = MOSIA - T3
U201-41 = MISOA - T4
Inspect U201-
35, 34, 33
OK?
OK?
OK?
OK?
OK?
Inspect U201-
41, 42, 43, 44
Measure wavefoorm at U402-17,
Repair U201
Repair U201
Check SAP connections per
Figure 8. U402-7 = FS -T1
U402-11 = DCLK - T2
U402-13 = TXD - T3
U402-10 = PWRD - T4
OK?
OK?
Replace U201
Check Patriot supplies
L300 - T1 -3.0V
L301 - T2 - 1.8V
Repair regulator
circuit
Check Patriot clocks
C326 - T1 - 16.8MHz
R428 - T2 - 32kHz
Inspect and repair
Patriot IC - U300
Repair proper clock
circuit
Yes
No
Yes
No
Yes
No Yes
No
No
Yes
Yes
No
No
Yes
No
Yes
Yes
No
No
Yes
No
Yes
Continued on
next page
68P81076C25-C July 1, 2002
Inspect U501
Repair U501
B
D
C
OK?
Is problem with
Keyed9.4_EN or
TXPA_EN
Keyed9.4_EN
TXPA_EN Check for GND
at J501-14 Present?
Defective PCB
Check for 5V at
U501-5
Present? Present?
Present?
Defective PCB
Check for 3V at
U501-15
Replace U501
Check for GND
at U501-11
Present? Replace U501
Check Patriot supplies
L300 - T1 - 3.0V
L301 - T2 - 1.8V
Repair regular
circuit
OK?
OK?
Check Patriot clocks
C326 - T1 - 16.8 MHz
R428 - T2 32 kHz
Repair proper clock
circuit
Inspect and repair
Patriot IC - U300
Inspect U402, also check 3V
at pin6 and GND at pin 15
OK?
Repair U402
Inspect U404, also check 5V
at pin8 and GND at pin 4
OK?
OK?
OK?
Repair U404
Repair U400, U401
Inspect U400, U401, also
check 3V at pin8 and GND
at pin 4
Amplitude of
waveform
may vary
Make sure that R401, R408
are placed and values are
correct
Continued on
next page
Yes
No
Yes
Yes
Yes
No
No
No
No
Yes
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
No
Yes
July 1, 2002 68P81076C25-C
Chart C.30 ASTRO Spectra Plus VOCON TX Modulation Failure Sheet 4 of 4 Chart C.31 ASTRO Spectra Plus VOCON RX Audio Failure
D
OK?
Amplitude of
waveform
may vary
Amplitude of
waveform
may vary
Amplitude of
waveform
may vary
Make sure that R407, R400,
C405 are placed and values
are correct
OK?
OK?
OK?
OK?
OK?
Repair proper
components
Replace U404
Replace U404
Repair proper
components
Make sure that R406, R437,
R438, C429, C402 are
placed and values are
correct
Make sure that R406, and
C404 are placed and values
are correct
Measure waveform at R406 (left),
Measure waveform at J501-39,
Microphone
input
Repair proper
components
Inspect and repair
J501
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
Put the radio into Test mode (CSQ 1).
Connect RF Signal Generator to the RF
input of the radio. Use Dev=3kHz,
Amplitude=-47dBm and
Freq=851.025MHz
Measure waveform at the Vocon
Connector, J501 pin 40. Should
match Figure 6-19
Waveform
correct?
No trouble
found
Measure waveform at U402, pin 2.
Should look similar to Figure 6-19
but lower in amplitude.
Waveform
correct?
Waveforms
correct?
R404, R405, R416
Measure waveforms at U402,
pins 8, 7, 11. Should look similar
to Figure 6-18
Inspect placement
and soldering of
U402
Inspect placement and
soldering of U402
Waveform
correct?
Check BBP waveforms at TP219,
TP221, and TP223. Should look
similar to Figure 6-20
BBP
waveforms
correct?
Inspect placement
and soldering of
Patriot IC - U300
Make sure the following components are
placed and soldered correctly and recheck
BBP waveforms: U200, Q202, Q201,
L200, Q200
Waveforms
correct?
Refer board to
Service Depot
Yes
No
Yes
No
Yes
No
Yes
No
Yes
No
No
Yes
68P81076C25-C July 1, 2002
Chart C.32 ASTRO Spectra Plus VOCON Secure Hardware Failure
Measure the voltage at pins 1, 2
and 20 on the secure connector.
The voltage reading should be
between 10V and 13V
Voltages
correct?
Make sure the Secure Module
is connected to the Plus VOCON
board and the radio is ON
Measure voltage on Q600,
pin 5. Voltage should read
between 10V and 13V
Measure waveforms on P1
(secure connector) at pins
7, 8, 9, and 10. They should
look similar to Figure 6-21
Waveforms
correct?
No trouble
found
Measure waveforms on U502 (pins 11, 13, and
15) and U504 (pin 9). They should look similar to
Figure 11 but with an amplitude of approximately
3V
Waveforms
correct?
Verify placement
and soldering of
U502 and U504
Measure waveform on U601
pin 5. It should look like
Figure 6-22
Waveforms
correct?
Verify placement,
soldering of Patriot
IC- U300
Verify placement and soldering
of the following components:
U307, U601, U600, and U602
Waveforms
correct?
Refer board
to Service Depot
Verify placement, soldering
of Q600. Otherwise replace
part
Voltage
correct?
Verify placement,
soldering of Patriot
IC- U300
Measure voltage on Q600
pin 4. It should measure 0V
Verify placement, soldering
of J501 connector
Voltage
correct?
Yes
No
Yes
Yes
Yes
No No
No
Yes
No
Yes
Yes
No
No
July 1, 2002 68P81076C25-C
Chart C.33 ASTRO Spectra Plus VOCON Key Load Fail
Make sure the Secure Module is connected
to the Plus VOCON board and the radio is ON
Connect the Key Loader and download
the appropriate secure key. Reset radio.
Note: Use only supported KVL kits and
encryption types
Correct
equipment?
Obtain correct KVL
and cable
With KVL attached to radio,
verify display message
KEYLOAD
KEYLOAD
message
displayed?
Verify and repair connection
of OPT_SEL2/KEYLOAD*
from KVL to Universal
connector to J206
With the KVL attached to the
radio and radio on, initiate a
keyload by pressing PTT on
the keyloader and look for
activity on P1-15
Verify and repair connection
of KEYLOAD* from J501-21
to P1-15
Activity?
Replace Secure
Module
Good
connection?
Repair connection
Verify connection
across J801
Yes
Yes
Yes
Yes
No
No
No
Synopsis
This failure relates only to secure equipped
radios and indicates a failure to load a key
with the KVL indicated by the message
xFail and keyfail tone. Typical failure modes
would be:
1) Keyload line not connected properly.
2) Use of wrong KVL or KVL cable.
3) Failure of Secure Module.
Chapter 6 Troubleshooting Waveforms
6.1 Introduction
This chapter contains images of waveforms that might be useful in verifying operation of certain parts
of the circuitry. These waveforms are for reference only; the actual data depicted will vary depending
upon the operating conditions.
6.2 ASTRO Spectra Waveforms
Waveform W1: Power-On Reset Timing
SWB+
POR
t 217mS
o
MAEPF-25187-O
July 1, 2002 68P81076C25-C
6-2 Troubleshooting Waveforms: ASTRO Spectra Waveforms
Waveform W2: DSP SSI Port RX Mode
Waveform W3: DSP SSI Port TX Mode CSQ
2893 Acquisitions Tek stopped:
T
2
Ch3
Ch1
T
1
3
M 20.0us Ch1 2.2 V
W2: DSP SSI Port RX mode.
Receiving
1KHz tone @ 3KHz deviation, -60dBm.
Trace 1 - RFS
Trace 2 - RXD
Trace 3 - SCKR (2.4/0.600MHz)
Ch1 Freq
19.991kHz
Low signal
amplitude
5.00V
5.00V
1
5.00V Ch2
MAEPF-24377-O
Note 1: Typically SCKR is a 2.4 MHz clock. In low power
modes, as shown here, SCKR is 600KHz.
T
T
T
3
Ch1 Ch2
Ch3
2
1
M 5.00us Ch1 2.2 V
W3: DSP SSI Port TX mode CSQ.
Trace 1 - SC2
Trace 2 - STD
Trace 3 - SCK (1.2MHz)
Ch1 Freq
47.856kHz
Low signal
amplitude
5.00V 5.00V
5.00V
MAEPF-24378-O
68P81076C25-C July 1, 2002
Troubleshooting Waveforms: ASTRO Spectra Waveforms 6-3
Waveform W4: ABACUS Programming at Mode Change
Waveform W5: ABACUS/ADSIC Interface
T
T
1
Ch1 M 10.0us Ch1 2.2 V
W4: ABACUS programming
captured during mode change.
Trace 1 - (ADSIC) SBI
MAEPF-24379-O
Ch1 Freq
74.610kHz
2.00V
T
3
Ch3
1
2
Ch1 Ch2 M 5.00us Ch1 2.2 V
Note 2: Since these signals are a differential
current loop these voltages are very low.
MAEPF-24380-O
2
W5: ABACUS/ADSIC Interface.
Receiving 1KHz tone @ 3KHz deviation,
-60dbm.
Trace 1 -IDC (2.4MHz)
Trace 2 - DOUT
TRACE 3 - DOUT*
Ch1 Freq
2.251920 MHz
Low resolution
2.00V
500mV
500mV
T
July 1, 2002 68P81076C25-C
Waveform W6: SPI Bus Programming ADSIC
Waveform W7: Receive Audio
Tek stopped:
T
1
Ch1
T
18 Acquisitions
Tek stopped:
T
2
Ch2
T
11
1 3
M 50ns Ch1 2.2 V
W6: SPI Bus Programming ADSIC.
Trace 1 - ADSIC_SEL*
Trace 2 - SPI_SCK
Trace 3 - MOSI
Note: These waveforms are typical to
any device on the SPI bus.
Ch1 Freq
= Hz
No period
found
Ch1
Ch3
5.00V
5.00V
5.00V
MAEPF-24381-O
T
T
T
T
2
Ch2
1
3
4
M 200us Ch1 2.20 V
W7: Receive audio: Receiving
1KHz tone @ 3KHz deviation, -60dBm. Volume set to rated audio.
Trace 1 - IRQB @ DSP (8KHz)
Trace 2 - SD0 @ C412 on Command Board
Trace 3 - SPKR_LOW Out of U450
Trace 4 - SPKR_HI Out of U450
Ch1 Freq
7.9118kHz
Low signal
amplitude
5.00V
10.00V
500mV
10.00V
Ch1
Ch3
Note 3: Actual level is dependent upon volume setting.
MAEPF-26077-O
Ch4
3
T
T
T
68P81076C25-C July 1, 2002
Troubleshooting Waveforms: ASTRO Spectra Waveforms 6-5
Waveform W8: Transmit Audio
Waveform W9: Power-Down Reset
T
1
Ch4
T
2
3
4
M 200us Ch1 1.5 V
W8: Transmit Audio. 1KHz Tone
which provides 3KHz deviation.
Trace 1 - IRQB @ DSP (8KHz)
Trace 2 - MODIN
Trace 3 - MIC @ node P502/R415
Trace 4 - MAI @ U406
Ch1 Freq
7.9872kHz
Low signal
amplitude
5.00V
300mV
MAEPF-26078-O
500mV
100mV
Ch1
Ch3
Ch2
T
T
T
1
Ch1
T
2
M1.00ms Ch1 4.52 V
W9: Power Down Reset.
Trace 1 - +5V @ U407 (VDD)
Trace 2 - Reset @ U407 (OUT)
2.00V Ch2
MAEPF-24384-O
2.00V
T
July 1, 2002 68P81076C25-C
Waveform W10: ADSIC 2.4 MHz Reference
MAEPF-24385-O
T
1
Ch1
T
M 200ns Ch1 1.64 V
W10 ADSIC 2.4 MHz Reference
Trace 1 - IDC @ U406
Ch1 Freq
2.4038MHz
2.00V
68P81076C25-C July 1, 2002
Troubleshooting Waveforms: ASTRO Spectra Digital Plus VOCON Board Waveforms 6-7
6.3 ASTRO Spectra Digital Plus VOCON Board Waveforms
This section contains images of waveforms specific to the ASTRO Spectra Digital Plus VOCON
board. These waveforms might be useful in verifying operation of certain parts of the circuitry. These
waveforms are for reference only; the actual data depicted will vary depending upon the operating
conditions.
32 kHz Clock Waveform
Trace 1 R428 32 kHz Clock
July 1, 2002 68P81076C25-C
6-8 Troubleshooting Waveforms: ASTRO Spectra Digital Plus VOCON Board Waveforms
16.8 MHz Clock Waveform
TX Modulation Out Waveform
Trace 1 TP401 16.8 MHz Clock
Transmitting
1 kHz tone at 85mVrms into microphone
Trace 1 U201 9
68P81076C25-C July 1, 2002
Differential ADDAG Output Waveform
TX SSI Waveform
Transmitting
Trace 1 U201 4
Trace 2 U201 5
Transmitting
Trace 1 U201 33 - Data
Trace 2 U201 35 - Frame Sync
Trace 3 U201 34 - Clock
July 1, 2002 68P81076C25-C
SPI Bus Waveform
TX 1 kHz Tone Waveform
Radio Power Up
Trace 2 U201 43 - Chip Select
Transmitting
Trace 1 U402 17
68P81076C25-C July 1, 2002
Serial Audio Port Waveform
RX Audio Waveform
Transmitting
Trace 1 U402 7 - Frame Sync
Receiving
1 kHz tone at 3 kHz Dev, -47dBm
Trace 1 U402 2
July 1, 2002 68P81076C25-C
RX BBP Waveform
Secure Interface Waveform
Receiving
1 kHz tone at 3 kHz Dev, -47dBm
Trace 1 TP221 Frame Sync
Trace 2 TP223 Data
Trace 3 TP219 Clock
Receiving
1 kHz tone at 3 kHz Dev, -47dBm Secure Mode
Trace 1 P1 8 - Data
Trace 2 P1 10 - SS
Trace 3 P1 9 - Clock
68P81076C25-C July 1, 2002
8 kHz Frame Sync for Security Circuitry Waveform
Receiving
1 kHz tone at 3 kHz Dev, -47dBm Secure Mode
Trace 1 U601 5
July 1, 2002 68P81076C25-C

Astro Digital Spectra Detailed Service Manual 1

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Astro Digital Spectra Detailed Service Manual 1

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