Está en la página 1de 4

CONTENTS

Page No.

LIST OF FIGURES ABBREVIATIONS


1.

i ii 1 1 2 2 2 3 3 5 5 6 7 7 9 9 9 11 13 14 16 16 17 17 18 20

INTRODUCTION
1.1 Street lights and traffic control 1.2 Thesis organization 1.3 Conclusion 1.4 Software used

2.

COMPLEPX ROGRAMMABL LOEGIC DEVICES


2.1 Introduction 2.2 Board Specification 2.3 Complex Programmable Logic Devices 2.4 Variable Frequency Crystal Oscillator 2.5 Power Supply Unit 2.6 Software Support

3.

VHDL
3.1 VHDL 3.1.1 History of VHDL 3.1.2 Levels of Abstraction (Styles) 3.1.3 Need for VHDL 3.1.4 Advantages of VHDL 3.1.5 Design Methodology using VHDL 3.1.6 Elements of VHDL 3.1.7 VHDL Language Features 3.1.7.1 Entity 3.1.7.2 Architecture 3.1.7.3 Component Declaration

3.1.7.4 Component Instantiation 3.1.7.5 Configuration Declaration 3.1.7.6 Configuration Instantiation 3.1.7.7 Package 3.1.7.8 Attributes 3.1.7.9 Process Statement 3.1.7.10 Function 3.1.7.11 Port 3.1.7.12 Sensitivity List 3.1.7.13 Standard Logic 3.1.8 Data Types 3.1.9 Packages and Package Bodies 4.

20 21 21 22 22 23 24 24 25 25 26 27 29 29 32 32 32 32 32 33 34 35 36

VLSI DESIGN
4.1Introduction 4.2 VLSI Design Classification 4.2.1Analog 4.2.2 ASICS 4.2.3 SoC 4.3 VLSI design styles 4.3.1 FPGA 4.3.2 Gate Array Design 4.3.3 Standard-Cells Based Design 4.3.4 Full Custom Design

5 XILINX 6 Implementation of Automatic Street Light and Traffic Control Unit 7 RESULTS 8 CONCLUSION

38 57 61 68

9 REFERENCES 10 CONFERENCE & JOURNAL

69 71

LIST OF FIGURES

Fig. No.
Fig .2.1 Fig .2.2 Fig .2.3 Fig .3.1 Fig .5.1 Fig .5.2 Fig .5.3 Fig .6.1 Fig. 6.2 Fig. 7.1 Fig. 7.2 Fig. 7.3 Fig. 7.4 Fig. 7.5 Fig .7.6 .Fig 7.7

Figure Name
BLOCK DIAGRAM OF CPLD Architecture of CPLD 9572 Variable frequency crystal oscillator Levels of abstraction Project Navigator Main Window Source Window Design Entry Block diagram of Street light and Traffic controller Flow chart of traffic and street light control Simulation results when more traffic on East Simulation results when traffic is equal on all sides Simulation results when more traffic on North Simulation results when more traffic on South Simulation results when more traffic on West RTL Schematic Technology Schematic

Page No.
5 6 7 11 38 41 54 57 59 61 62 63 64 65 66 67

LIST OF ABBREVIATIONS
VLSI CPLD FPGA PAL IRS LDR VHDL Very Large Scale Integration Complex Programmable Logic Device Field Programmable Gate Array Programmable Array Logic Infrared Sensor Light Dependent Resistors Very High Speed Integrated Circuit Hardware Description Language ASIC PROM EEPROM Application Specific Integrated Circuit Programmable Read Only Memory Electrically Erasable Programmable Read Only Memory

También podría gustarte