FSAM10SH60

May 2002

FSAM10SH60
SPMTM (Smart Power Module)
General Description
FSAM10SH60 is an advanced smart power module (SPM) that Fairchild has newly developed and designed to provide very compact and low cost, yet high performance ac motor drives mainly targeting high speed low-power inverterdriven application like washing machines. It combines optimized circuit protection and drive matched to low-loss IGBTs. Highly effective short-circuit current detection/ protection is realized through the use of advanced current sensing IGBT chips that allow continuous monitoring of the IGBTs current. System reliability is further enhanced by the built-in over-temperature and integrated under-voltage lock-out protection. The high speed built-in HVIC provides opto-coupler-less IGBT gate driving capability that further reduce the overall size of the inverter system design. In addition the incorporated HVIC facilitates the use of singlesupply drive topology enabling the FSAM10SH60 to be driven by only one drive supply voltage without negative bias. Inverter current sensing application can be achieved due to the divided negative dc terminals.

Features
UL Certified No. E209204 600V-10A 3-phase IGBT inverter bridge including control ICs for gate driving and protection Divided negative dc-link terminals for inverter current sensing applications Single-grounded power supply due to built-in HVIC Typical switching frequency of 15kHz Built-in thermistor for over-temperature monitoring Inverter power rating of 0.4kW / 100~253 Vac Isolation rating of 2500Vrms/min. Very low leakage current due to using ceramic substrate Adjustable current protection level by varying series resistor value with sense-IGBTs

Applications
AC 100V ~ 253V three-phase inverter drive for small power (0.4kW) ac motor drives Home appliances applications requiring high switching frequency operation like washing machines drive system Application ratings: - Power : 0.4 kW / 100~253 Vac - Switching frequency : Typical 15kHz (PWM Control) - 100% load current : 3.0A (Irms) - 150% load current : 4.5A (Irms) for 1 minute

External View
Top View Bottom View

60 mm

31 mm 3

Fig. 1.

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

Integrated Power Functions

600V-10A IGBT inverter for three-phase DC/AC power conversion (Please refer to Fig. 3)

Integrated Drive, Protection and System Control Functions

For inverter high-side IGBTs: Gate drive circuit, High voltage isolated high-speed level shifting Control circuit under-voltage (UV) protection Note) Available bootstrap circuit example is given in Figs. 11, 16and 17. For inverter low-side IGBTs: Gate drive circuit, Short circuit protection (SC) Control supply circuit under-voltage (UV) protection Temperature Monitoring: System over-temperature monitoring using built-in thermistor Note) Available temperature monitoring circuit is given in Fig. 17. Fault signaling: Corresponding to a SC fault (Low-side IGBTs) or a UV fault (Low-side supply) Input interface: 5V CMOS/LSTTL compatible, Schmitt trigger input

Pin Configuration
Top View

VCC(L) COM(L) IN(UL) IN(VL) IN(WL) COM(L) VFO CFOD CSC RSC IN(UH) VCC(UH) VB(U) VS(U) IN(VH) COM(H) VCC(VH) VB(V) VS(V) IN(WH) VCC(WH) VB(W) VS(W)

VTH RTH NU NV NW

Fig. 2

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

Pin Description
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Pin Name VCC(L) COM(L) IN(UL) IN(VL) IN(WL) COM(L) VFO CFOD CSC RSC IN(UH) VCC(UH) VB(U) VS(U) IN(VH) COM(H) VCC(VH) VB(V) VS(V) IN(WH) VCC(WH) VB(W) VS(W) VTH RTH NU NV NW U V W P Pin Description Low-side Common Bias Voltage for IC and IGBTs Driving Low-side Common Supply Ground Signal Input Terminal for Low-side U Phase Signal Input Terminal for Low-side V Phase Signal Input Terminal for Low-side W Phase Low-side Common Supply Ground Fault Output Terminal Capacitor for Fault Output Duration Time Selection Capacitor (Low-pass Filter) for Short-current Detection Input Resistor for Short-circuit Current Detection Signal Input Terminal for High-side U Phase High-side Bias Voltage for U Phase IC High-side Bias Voltage for U Phase IGBT Driving High-side Bias Voltage Ground for U Phase IGBT Driving Signal Input Terminal for High-side V Phase High-side Common Supply Ground High-side Bias Voltage for V Phase IC High-side Bias Voltage for V Phase IGBT Driving High-side Bias Voltage Ground for V Phase IGBT Driving Signal Input Terminal for High-side W Phase High-side Bias Voltage for W Phase IC High-side Bias Voltage for W Phase IGBT Driving High-side Bias Voltage Ground for W Phase IGBT Driving Thermistor Bias Voltage Series Resistor for the Use of Thermistor (Temperature Detection) Negative DCLink Input Terminal for U Phase Negative DCLink Input Terminal for V Phase Negative DCLink Input Terminal for W Phase Output Terminal for U Phase Output Terminal for V Phase Output Terminal for W Phase Positive DCLink Input Terminal

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

Internal Equivalent Circuit and Input/Output Pins

Bottom View
P (32) (22) V B(W ) (21) V C C(W H )

VB VCC COM IN VS
W (31)

OUT

(20) IN (W H ) (23) V S(W )

(18) V B(V) (17) V C C(W H ) (16) CO M (H ) (15) IN (W H ) (19) V S(V)

VB VCC COM IN VS
V (30)

OUT

(13) V B(U) (12) V C C(UH )

VB VCC COM IN VS
U (29)

OUT

(11) IN (U H ) (14) V S(U)

(10) R SC (9) C SC (8) C FO D (7) V FO (6) CO M (L) (5) IN (W L) (4) IN (V L) (3) IN (U L) (2) CO M (L) (1) V C C(L)

C(SC) C(FOD) VFO

OUT(W L)
N W (28)

IN(W L) IN(VL) IN(UL) COM(L) VCC

OUT(VL)
N V (27)

OUT(UL)
N U (26) R TH (25) THERM ISTO R V TH (24)

Note 1. Inverter low-side is composed of three sense-IGBTs including freewheeling diodes for each IGBT and one control IC which has gate driving, current sensing and protection functions. 2. Inverter power side is composed of four inverter dc-link input terminals and three inverter output terminals. 3. Inverter high-side is composed of three normal-IGBTs including freewheeling diodes and three drive ICs for each IGBT.

Fig. 3.

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

Absolute Maximum Ratings

Inverter Part (TC = 25C,
Item Supply Voltage Supply Voltage (Surge) Collector-emitter Voltage Each IGBT Collector Current Each IGBT Collector Current Each IGBT Collector Current (Peak) Collector Dissipation Operating Junction Temperature Unless Otherwise Specified) Symbol VDC VPN(Surge) VCES IC IC ICP PC TJ TC = 25C TC = 100C TC = 25C TC = 25C per One Chip (Note 1) Condition Applied to DC - Link Applied between P- N Rating 450 500 600 10 8 20 42 -55 ~ 150 Unit V V V A A A W C

Note : 1. It would be recommended that the average junction temperature should be limited to TJ 125C (@TC 100C) in order to guarantee safe operation.

Control Part (TC = 25C,

Item Control Supply Voltage

Unless Otherwise Specified) Symbol Condition VCC Applied between VCC(H) - COM(H), VCC(L) - COM(L) VBS VIN VFO IFO VSC Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) VS(W) Applied between IN(UH), IN(VH), IN(WH) - COM(H) IN(UL), IN(VL), IN(WL) - COM(L) Applied between VFO - COM(L) Sink Current at VFO Pin Applied between CSC - COM(L) Rating 18 20 -0.3 ~ 6.0 -0.3~VCC+0.5 5 -0.3~VCC+0.5 Unit V V V V mA V

High-side Control Bias Voltage Input Signal Voltage Fault Output Supply Voltage Fault Output Current Current Sensing Input Voltage

Total System
Item Self Protection Supply Voltage Limit (Short Circuit Protection Capability) Module Case Operation Temperature Storage Temperature Isolation Voltage Symbol Condition VPN(PROT) Applied to DC - Link, VCC = VBS = 13.5 ~ 16.5V TJ = 125C, Non-repetitive, less than 6s TC TSTG VISO 60Hz, Sinusoidal, AC 1 minute, Connection Pins to Heat-sink Plate Note Fig.4 Rating 400 Unit V

-20 ~ 100 -50 ~ 150 2500

C C Vrms

Case Temperature(TC) Detecting Point

Ceramic Substrate

Fig. 4. TC Measurement Point

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

Absolute Maximum Ratings Thermal Resistance

Item Junction to Case Thermal Resistance Symbol Condition Rth(j-c)Q Each IGBT under Inverter Operating Condition Rth(j-c)F Contact Thermal Resistance Rth(c-f) Each FWDi under Inverter Operating Condition Ceramic Substrate (per 1 Module) Thermal Grease Applied Min. Typ. Max. 2.93 3.71 0.06 Unit C/W C/W C/W

Note: 2. For the measurement point of case temperature(TC), please refr to Fig. 4.

Electrical Characteristics Inverter Part(Tj = 25C, Unless Otherwise Specified)

Item Collector - emitter Saturation Voltage FWDi Forward Voltage Switching Times Symbol VCE(SAT) VCC = VBS = 15V VIN = 0V VFM tON tC(ON) tOFF tC(OFF) trr Collector - emitter Leakage Current ICES VIN = 5V Condition IC = 10A, Tj = 25C IC = 10A, Tj = 125C IC = 10A, Tj = 25C IC = 10A, Tj = 125C VPN = 300V, VCC = VBS = 15V IC = 10A, Tj = 25C VIN = 5V 0V, Inductive Load (High-Low Side) (Note 3) VCE = VCES, Tj = 25C Min. Typ. 0.37 0.12 0.53 0.2 0.1 Max. 2.8 2.9 2.3 2.1 250 Unit V V V V us us us us us uA

Note: 3. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For the detailed information, please see Fig. 5.

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

t rr VCE

100% IC

IC

IC

VCE

V IN t ON
VIN(ON)

V IN
t C(ON)
90% IC 10% IC 10% VCE

t OFF
V IN(OFF)

tC(OFF)
10% VCE 10% IC

(a) Turn-on

(b) Turn-off

Fig. 5. Switching Time Definition

VCE : 100V/div. IC : 5A/div. IC : 5A/div.

VCE : 100V/div.

time : 100ns/div.

time : 100ns/div.

(a) Turn-on

(b) Turn-off

Fig. 6. Experimental Results of Switching Waveforms Test Condition: Vdc=300V, Vcc=15V, L=500uH (Inductive Load), TC=25C

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

Electrical Characteristics Control Part (Tj = 25C, Unless Otherwise Specified)

Item Control Supply Voltage High-side Bias Voltage Quiescent VCC Supply Current Symbol Condition Applied between VCC(H),VCC(L) - COM VCC VBS IQCCL IQCCH Quiescent VBS Supply Current Fault Output Voltage PWM Input Frequency Allowable Input Signal Blanking Time considering Leg Arm-short Short Circuit Trip Level Sensing Voltage of IGBT Current Supply Circuit UnderVoltage Protection IQBS VFOH VFOL fPWM tdead Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W) VCC = 15V IN(UL, VL, WL) = 5V VCC = 15V IN(UH, VH, WH) = 5V VBS = 15V IN(UH, VH, WH) = 5V VCC(L) - COM(L) VCC(U), VCC(V), VCC(W) - COM(H) VB(U) - VS(U), VB(V) -VS(V), VB(W) - VS(W) Min. 13.5 13.5 4.5 1 Typ. Max. Unit 15 16.5 V 15 15 16.5 26 130 420 1.1 V mA uA uA V V kHz us

VSC = 0V, VFO Circuit: 4.7k to 5V Pull-up VSC = 1V, VFO Circuit: 4.7k to 5V Pull-up TC 100C, TJ 125C -20C TC 100C

VSC(ref) VSEN UVCCD UVCCR UVBSD UVBSR

TJ = 25C, VCC = 15V (Note 4) -20C TC 100C, @ RSC = 82 , RSU = RSV = RSW = 0 and IC = 10A (Note Fig. 17) TJ 125C Detection Level Reset Level Detection Level Reset Level CFOD = 33nF (Note 5) High-Side Low-Side Applied between IN(UH), IN(VH), IN(WH) - COM(H) Applied between IN(UL), IN(VL), IN(WL) - COM(L)

0.45 0.37 11.5 12 7.3 8.6 1.4 3.0 3.0 -

0.51 0.56 0.45 0.56 12 12.5 9.0 10.3 1.8 50 6.3 12.5 13 10.8 12 2.0 0.8 0.8 -

V V V V V V ms V V V V k k

Fault-out Pulse Width ON Threshold Voltage OFF Threshold Voltage ON Threshold Voltage OFF Threshold Voltage Resistance of Thermistor

tFOD VIN(ON) VIN(OFF) VIN(ON) VIN(OFF) RTH

@ TC = 25C (Note Fig. 7) @ TC = 80C (Note Fig. 7)

Note: 4. Short-circuit current protection is functioning only at the low-sides. It would be recommended that the value of the external sensing resistor (RSC) should be selected around 56 in order to make the SC trip-level of about 15A at the shunt resistors (RSU,RSV,RSW) of 0 . For the detailed information about the relationship between the external sensing resistor (RSC) and the shunt resistors (RSU,RSV,RSW), please see Fig. 8. 5. The fault-out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation : CFOD = 18.3 x 10-6 x tFOD[F]

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

R-T Curve
70

60

50

Resistance [k]

40

30

20

10

0 20

30

40

50

60

70

80

90

100

110

120

130

Temperature [!]
Fig. 7. R-T Curve of The Built-in Thermistor

100 90 80 70 60

RSC [ ]

50 40 30 20 10 0 0.00

"
0.02 0.04 0.06 0.08 0.10 0.12

RSU,RSV,RSW [ ]
Fig. 8. RSC Variation by change of Shunt Resistors (RSU, RSV, RSW) for Short-Circuit Protection ! @ around 100% Rated Current Trip (IC = 10A) " @ around 150% Rated Current Trip (IC = 15A)

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

Mechanical Characteristics and Ratings

Item Mounting Torque Ceramic Flatness Weight Mounting Screw: M4 (Note 6 and 7) Condition Recommended 10Kgcm Recommended 0.98Nm Note Fig.9 Limits Min. 8 0.78 0 Typ. 10 0.98 35 Max. 12 1.17 +120 Units Kgcm Nm um g

(+)

(+) (+)

Datum Line

Fig. 9. Flatness Measurement Position of The Ceramic Substrate

Note: 6. Do not make over torque or mounting screws. Much mounting torque may cause ceramic cracks and bolts and Al heat-fin destruction. 7. Avoid one side tightening stress. Fig.10 shows the recommended torque order for mounting screws. Uneven mounting can cause the SPM ceramic substrate to be damaged.

Fig. 10. Mounting Screws Torque Order (1 2)

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

Recommended Operating Conditions

Item Supply Voltage Control Supply Voltage High-side Bias Voltage Blanking Time for Preventing Arm-short PWM Input Signal Input ON Threshold Voltage Input OFF Threshold Voltage Symbol VPN VCC VBS tdead fPWM VIN(ON) VIN(OFF) Condition Applied between P - N Applied between VCC(H) - COM, VCC(L) - COM Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W) For Each Input Signal TC 100C, TJ 125C Applied between UIN,VIN, WIN - COM Applied between UIN,VIN, WIN - COM Value Min. 13.5 13.5 1 Typ. 300 15 15 15 0 ~ 0.65 4 ~ 5.5 Max. 400 16.5 16.5 Unit V V V us kHz V V

ICs Internal Structure and Input/Output Conditions

RBS
15V Line
VCC(UH,VH,WH)

DBS

CBS

CBSC

P
VB(UH,VH,WH)

UV DETECT LEVEL SHIFT PULSE FILTER

5V Line

RP Input Signal CPH

CBP15
IN(UH,VH,WH) COM PULSE GENERATOR

R R S

VS(UH,VH,WH)

HVIC
VCC(L)

5V Line

UV DETECT
BANDGAP REFERENCE

LVIC
TIME DELAY UV LATCH_UP

U, V, W

RP Input Signal Fault Signal CPL

RP
IN(UL,VL,WL)

UV PROTECTION

PULSE GENERATOR (HYSTERISIS)

BUFFER
SC PROTECTION SOFT_OFF CONTROL

OUTPUT
(UL,VL,WL)

VFO

CPF
CFOD

FAULT OUTPUT DURATION

SC LATCH_UP

TIME DELAY

SC DETECTION

CFOD

CSC

NU , N V , N W
RSU, RSV, RSW

CSC

RF

RSC

Note: 1. One LVIC drives three Sense-IGBTs and can do short-circuit current protection also. Three sense emitters are commonly connected to RSC terminal to detect short-circuit current. Low-side part of the inverter consists of three sense-IGBTs 2. One HVIC drives one normal-IGBT. High-side part of the inverter consists of three normal-IGBTs 3. Each IC has under voltage detection and protection function. 4. The logic input is compatible with standard CMOS or LSTTL outputs. 5. RPCP coupling at each input/output is recommended in order to prevent the gating input/output signals oscillation and it should be as close as possible to each SPM gating input pin. 6. It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics.

Fig. 11.

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

Time Charts of SPMs Protective Function

Input Signal Internal IGBT Gate-Emitter Voltage Control Supply Voltage P3 P5 UV detect P1 P2 UV reset P6

Output Current Fault Output Signal P4

P1 : Normal operation - IGBT ON and conducting current P2 : Under voltage detection P3 : IGBT gate interrupt P4 : Fault signal generation P5 : Under voltage reset P6 : Normal operation - IGBT ON and conducting current

Fig. 12. Under-Voltage Protection (Low-side)

Input Signal Internal IGBT Gate-Emitter Voltage Control Supply Voltage VBS P3 P5 UV detect P1 P2 UV reset P6

Output Current Fault Output Signal

P4

P1 : Normal operation - IGBT ON and conducting current P2 : Under voltage detection P3 : IGBT gate interrupt P4 : No fault signal P5 : Under voltage reset P6 : Normal operation - IGBT ON and conducting current

Fig. 13. Under-Voltage Protection (High-side)

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

P5 Input Signal Internal IGBT Gate-Emitter Voltage

SC Detection

P6

P1 P4 Output Current P2
SC Reference Voltage (0.5V) RC Filter Delay

P7

Sensing Voltage

Fault Output Signal

P3

P8

P1 : Normal operation - IGBT ON and conducting currents P2 : Short-circuit current detection P3 : IGBT gate interrupt / Fault signal generation P4 : IGBT is slowly turned off P5 : IGBT OFF signal P6 : IGBT ON signal - but IGBT cannot be turned on during the fault-output activation P7 : IGBT OFF state P8 : Fault-output reset and normal operation start

Fig. 14. Short-circuit Current Protection (Low-side Operation only)

5V-Line

FSAM10SH60
4.7k 100 100 100 VFO 1nF 1nF 0.47nF 1.2nF COM 4.7k 4.7k IN(UH) , IN(VH) , IN(WH) IN(UL) , IN (VL) , IN(WL)

CPU

Note: It would be recommended that by-pass capacitors for the gating input signals, IN(XX) should be placed on the SPM pins and on the both sides of CPU and SPM for the fault output signal, VFO, as close as possible.

Fig. 15. Recommended CPU I/O Interface Circuit

2002 Fairchild Semiconductor Corporation Rev. A, May 2002

FSAM10SH60

These Values depend on PW M C ontrol Algorithm

15V-Line

One-Leg Diagram of FSAM10SH60

20 !
Vcc VB HO

220uF

0.1uF

IN

COM VS

Inverter Output
Vcc

1000uF

0.1uF

IN COM

OUT

Fig. 16. Recommended Bootstrap Operation Circuit and Parameters

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

15V line

5V line R BS D BS
P (32 ) (22) V B(W ) (21) V CC(W H )

VB VCC O UT C OM IN VS
W (31)

RS G ating W H

RP C BS C PH R BS D BS C BS C
(20) IN (W H) (23) V S(W )

(18) V B(V ) (17) V CC(V H)

VB VCC C OM IN VS
V (30 )

RS G ating VH

RP

(16) CO M (H)

O UT

CBS
C PH

CBSC

(15) IN (VH) (19) V S(V )

M
C D CS Vdc

C P U

R BS

D BS

(13) V B(U) (12) V CC(UH)

VB VCC C OM IN VS
U (29)

RS G ating UH

RP C BS C PH 5V line R SC RF RP RP RP RP C SC C FO D
(10) R SC (9) C SC (8) C FO D (7) V FO (6) CO M (L)

O UT

C BS C

(11) IN (UH) (14) V S(U)

C (SC ) C (FO D) VFO

O UT(W L)
N W (28)

RS Fault RS G ating W L G ating VL G ating UL RS RS

R SW

(5) IN (W L ) (4) IN (VL ) (3) IN (UL) (2) CO M (L)

IN (W L) O UT(VL) IN (VL) IN (UL) C OM(L) VCC

N U (26) N V (27)

R SV

C BP F

C PL C PL

C PL

C PF

(1) V CC (L)

O UT(UL) R SU 5V line

CSP15

CSPC15
TH ER MISTO R

V TH (24) R TH (25)

RTH

C SP C 05

C SP 05

Te m p. M onitoring W -Phase C u rren t V-Phase C urrent U -Phase C u rrent

C FW C FV C FU

R FW R FV R FU

Note: 1. RPCPL/RPCPH coupling at each SPM input is recommended in order to prevent input signals oscillation and it should be as close as possible to each SPM input pin. 2. By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is possible. 3. VFO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7k resistance. Please refer to Fig. 17. 4. CSP15 of around 7 times larger than bootstrap capacitor CBS is recommended. 5. VFO output pulse width should be determined by connecting an external capacitor(CFOD) between CFOD(pin8) and COM(L)(pin2). (Example : if CFOD = 5.6 nF, then tFO = 300 s (typ.)) Please refer to the note 5 for calculation method. 6. Each input signal line should be pulled up to the 5V power supply with approximately 4.7k resistance (other RC coupling circuits at each input may be needed depending on the PWM control scheme used and on the wiring impedance of the systems printed circuit board). Approximately a 0.22~2nF by-pass capacitor should be used across each power supply connection terminals. 7. To prevent errors of the protection function, the wiring around RSC, RF and CSC should be as short as possible. 8. In the short-circuit protection circuit, please select the RFCSC time constant in the range 3~4 s. RF should be at least 30 times larger than RSC. (Recommended Example: RSC = 56 , RF = 3.9k, CSC = 1nF and RSU = RSV = RSW = 0) 9. For the use of shunt resistors ( RSU, RSV, RSW ), please see Fig. 8 in order to select the proper RSC. 10.Each capacitor should be mounted as close to the pins of the SPM as possible. 11.To prevent surge destruction, the wiring between the smoothing capacitor and the P&N pins should be as short as possible. The use of a high frequency noninductive capacitor of around 0.1~0.22 uF between the P&N pins is recommended. 12.Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays. It is recommended that the distance be 5cm at least

Fig. 17. Application Circuit

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

FSAM10SH60

Detailed Package Outline Drawings

2002 Fairchild Semiconductor Corporation

Rev. A, May 2002

TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx Bottomless CoolFET CROSSVOLT DenseTrench DOME EcoSPARK E2CMOS EnSigna FACT FACT Quiet Series

FAST FASTr FRFET GlobalOptoisolator GTO HiSeC I2C ISOPLANAR LittleFET MicroFET MicroPak

MICROWIRE OPTOLOGIC OPTOPLANAR PACMAN POP Power247 PowerTrench QFET QS QT Optoelectronics Quiet Series

SLIENT SWITCHER SMART START SPM STAR*POWER Stealth SuperSOT-3 SuperSOT-6 SuperSOT-8 SyncFET TinyLogic TruTranslation

UHC UltraFET VCX

STAR*POWER is used under license

DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Preliminary

No Identification Needed

Full Production

Obsolete

Not In Production

2002 Fairchild Semiconductor Corporation

Rev. H5

This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.