Documentos de Académico
Documentos de Profesional
Documentos de Cultura
in Digital ICs
March 2012
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Wireless
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Wireless
Cellular Telephony (GSM, CDMA)
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g)
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Moores Law
Moores Observation
The complexity for minimum component costs has increased at a rate of roughly a factor of two per year. Certainly over the short term this rate can be expected to continue, if not to increase. Over the longer term, the rate of increase is a bit more uncertain, although there is no reason to believe it will not remain nearly constant for at least 10 years. That means by 1975, the number of components per integrated circuit for minimum cost will be 65,000. I believe that such a large circuit can be built on a single wafer. There are corollaries to this Observation/Law.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics
Enhanced functionality and exibility Automated design and test possible Arbitrary precision possible (at least in theory)
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics
Enhanced functionality and exibility Automated design and test possible Arbitrary precision possible (at least in theory) Provides inexpensive storage capability
Due to conicting needs for analog and digital circuits, today a separate power supply is used for the analog and digital blocks on a mixed signal chip.
Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Due to conicting needs for analog and digital circuits, today a separate power supply is used for the analog and digital blocks on a mixed signal chip. In the O-Lab we have design kits from both TSMC and UMC for 180nm.
Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Due to conicting needs for analog and digital circuits, today a separate power supply is used for the analog and digital blocks on a mixed signal chip. In the O-Lab we have design kits from both TSMC and UMC for 180nm. These have separate transistors for analog and digital functions. The analog transistors are operated from a supply voltage of 2.5V and have a minimum feature size of 0.25 m, while the digital devices are operated at 1.8V and have a minimum feature size of 0.18 m.
Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
ITRS
ITRS is the International Technology Roadmap for Semiconductors. The organisation is responsible for laying out milestones for the entire semiconductor industry.
Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
ITRS
ITRS is the International Technology Roadmap for Semiconductors. The organisation is responsible for laying out milestones for the entire semiconductor industry.
Year of Production Digital Supply voltage (V) Tox (nm) Gate Length (nm) gm /gds at 5Lmindigital Peak Ft (GHz) Analog Supply voltage (V) Tox (nm) Gate Length (nm) gm /gds at 10Lmindigital Peak Ft (GHz) 2005 1.2 2.2 75 47 120 2.5 5 250 220 40 2006 1.2 2.1 65 40 140 2.5 5 250 220 40 2007 1.2 2.0 53 32 170 2.5 5 250 220 40 2008 1.2 1.9 45 30 200 2.5 5 250 220 40 2009 1.1 1.6 37 30 240 2.5 5 250 220 40 2010 1.1 1.5 32 30 280 1.8 3 180 160 50 2011 1.1 1.4 28 30 320 1.8 3 180 160 50 2012 1 1.4 25 30 360 1.8 3 180 160 50
Basic Building Block Performance Metrics Digital Philosophy 2013Issues in Digital ICs 1 1.3 22 30 400 1.8 3 180 160 50
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Why Digital?
It has been often stated that digital circuits are used over analog ones because of their noise margin.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Why Digital?
It has been often stated that digital circuits are used over analog ones because of their noise margin. The noise margin of digital circuits is something that is inherent in their construction and functionality. While analog designers take great pains to lower the noise present in their circuits, digital designers choose a circuit methodology where their is no noise!
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Why Digital?
It has been often stated that digital circuits are used over analog ones because of their noise margin. The noise margin of digital circuits is something that is inherent in their construction and functionality. While analog designers take great pains to lower the noise present in their circuits, digital designers choose a circuit methodology where their is no noise! Digital electronics works at a level of abstraction much above voltages and currents. It collapses the values that can be taken by a variable to 2 - namely 1 and 0. In laymans language, it can be said, that digital is bothered about whether a certain parameter is present or absent - and not about how much is present or absent.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Generating 1s and 0s
The rst requirement of digital electronics is a circuit that is capable of generating only two output levels - 1 and 0.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Generating 1s and 0s
The rst requirement of digital electronics is a circuit that is capable of generating only two output levels - 1 and 0. Because, in real life we do not have a 1 and a 0, we seek the digital abstraction from real life parameters by setting the maximum voltage available in a circuit to 1 and the minimum to 0.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Generating 1s and 0s
The rst requirement of digital electronics is a circuit that is capable of generating only two output levels - 1 and 0. Because, in real life we do not have a 1 and a 0, we seek the digital abstraction from real life parameters by setting the maximum voltage available in a circuit to 1 and the minimum to 0. Therefore, to represent these output levels, there needs to be a circuit which can at any time, connect to either VDD or ground.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Generating 1s and 0s
The rst requirement of digital electronics is a circuit that is capable of generating only two output levels - 1 and 0. Because, in real life we do not have a 1 and a 0, we seek the digital abstraction from real life parameters by setting the maximum voltage available in a circuit to 1 and the minimum to 0. Therefore, to represent these output levels, there needs to be a circuit which can at any time, connect to either VDD or ground. A simple implementation would be to have a oating node that could be connected by an (electrically controlled) switch to either supply or ground.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Generating 1s and 0s
The rst requirement of digital electronics is a circuit that is capable of generating only two output levels - 1 and 0. Because, in real life we do not have a 1 and a 0, we seek the digital abstraction from real life parameters by setting the maximum voltage available in a circuit to 1 and the minimum to 0. Therefore, to represent these output levels, there needs to be a circuit which can at any time, connect to either VDD or ground. A simple implementation would be to have a oating node that could be connected by an (electrically controlled) switch to either supply or ground. In IC technology, an electrically operated switch is easily obtained by an MOS transistor.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Detecting 1s and 0s
Detecting a 1 and a 0 implies having an output from a system that can respond to these two stiumli.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Detecting 1s and 0s
Detecting a 1 and a 0 implies having an output from a system that can respond to these two stiumli. The inputs and outputs can be mapped in two unique ways: Buer 0 0; 1 1
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Detecting 1s and 0s
Detecting a 1 and a 0 implies having an output from a system that can respond to these two stiumli. The inputs and outputs can be mapped in two unique ways: Buer 0 0; 1 1 Inverter 0 1; 1 0
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Detecting 1s and 0s
Detecting a 1 and a 0 implies having an output from a system that can respond to these two stiumli. The inputs and outputs can be mapped in two unique ways: Buer 0 0; 1 1 Inverter 0 1; 1 0 The second option is easier to implement with electronics.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Detecting 1s and 0s
Detecting a 1 and a 0 implies having an output from a system that can respond to these two stiumli. The inputs and outputs can be mapped in two unique ways: Buer 0 0; 1 1 Inverter 0 1; 1 0 The second option is easier to implement with electronics. An inverter is used as a basic building block of all digital circuits because of its innate ability to both detect and generate a 1 and a 0 successfully.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
The MOSFETs act as electrically (voltage) controlled switches. Two of the reasons CMOS technology caught the digital designers fancy were the MOSFETs extremely high resistance in the OFF state and its extremely low resistance in the ON.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
The MOSFETs act as electrically (voltage) controlled switches. Two of the reasons CMOS technology caught the digital designers fancy were the MOSFETs extremely high resistance in the OFF state and its extremely low resistance in the ON. By employing one nMOS and one pMOS switch, the state of the two switches is always complementary - hence the name CMOS digital electronics.
Unlike analog circuits, digital circuits are quantied by largely two performance measures - speed and power. These two directly trade o with each other.
Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Unlike analog circuits, digital circuits are quantied by largely two performance measures - speed and power. These two directly trade o with each other. An inverter works by charging a node to a 1 or by discharging it to a 0. Since all nodes in an MOS circuit are capacitive in nature, the charging or discharging is made faster by using a higher current, thus providing a greater speed of operation.
Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Unlike analog circuits, digital circuits are quantied by largely two performance measures - speed and power. These two directly trade o with each other. An inverter works by charging a node to a 1 or by discharging it to a 0. Since all nodes in an MOS circuit are capacitive in nature, the charging or discharging is made faster by using a higher current, thus providing a greater speed of operation. However, the higher current also implies a greater power dissipation.
Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Abstraction
Digital circuits employ the concept of abstraction. This implies that a circuit is split up into a hierarchy and each level of the hierarchy constitute one abstraction. For example at the lowest level there is the inverter, then logic gates, followed by functional blocks and so on.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Abstraction
Digital circuits employ the concept of abstraction. This implies that a circuit is split up into a hierarchy and each level of the hierarchy constitute one abstraction. For example at the lowest level there is the inverter, then logic gates, followed by functional blocks and so on. The performance of each level in terms of speed and power can be characterised and used in the next higher level of hierarchy.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Abstraction
Digital circuits employ the concept of abstraction. This implies that a circuit is split up into a hierarchy and each level of the hierarchy constitute one abstraction. For example at the lowest level there is the inverter, then logic gates, followed by functional blocks and so on. The performance of each level in terms of speed and power can be characterised and used in the next higher level of hierarchy. This abstraction also allows the use of design automation. CAD or EDA tools can take in as input the design specs of the top level of the hierarchy and produce as output, GDS II format - ready for tape-out.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Abstraction
Digital circuits employ the concept of abstraction. This implies that a circuit is split up into a hierarchy and each level of the hierarchy constitute one abstraction. For example at the lowest level there is the inverter, then logic gates, followed by functional blocks and so on. The performance of each level in terms of speed and power can be characterised and used in the next higher level of hierarchy. This abstraction also allows the use of design automation. CAD or EDA tools can take in as input the design specs of the top level of the hierarchy and produce as output, GDS II format - ready for tape-out. This is known as synthesis.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
CAD Tools
As has been mentioned earlier CAD tools play an indispensable part in the manufacture of digital ICs. Todays digital ICs pack so much functionality into a small area, the number of transistors required for implementation cannot be hand placed and routed.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
CAD Tools
As has been mentioned earlier CAD tools play an indispensable part in the manufacture of digital ICs. Todays digital ICs pack so much functionality into a small area, the number of transistors required for implementation cannot be hand placed and routed. A digital synthesis tool takes a top level description and seeks to create the actual circuit by looking up a pre-manufactured library. From the library it selects characterised components in a manner such that the top level design specs can be met.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
CAD Tools
As has been mentioned earlier CAD tools play an indispensable part in the manufacture of digital ICs. Todays digital ICs pack so much functionality into a small area, the number of transistors required for implementation cannot be hand placed and routed. A digital synthesis tool takes a top level description and seeks to create the actual circuit by looking up a pre-manufactured library. From the library it selects characterised components in a manner such that the top level design specs can be met. There are many variations on this theme. The standard cell and the FPGA are the most widely used. While a standard cell library contains dierent versions of each functional block on software, the FPGA has pre-fabricated functional blocks the interconnections between which can be (re)programmed.
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs
Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs