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Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues

in Digital ICs

Introduction to Digital CMOS Technology


...Or What We Do with 1s and 0s... Anurup Mitra
STMicroelectronics Pvt. Ltd.

March 2012

Modern Day Integrated Systems


Why Not Just One?
Why do we not stick to just one - either analog or digital for all our signal processing needs?

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Modern Day Integrated Systems


Why Not Just One?
Why do we not stick to just one - either analog or digital for all our signal processing needs? Naturally occurring signals are analog - which is why we need to extensively use A/D and D/A interfaces.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Modern Day Integrated Systems


Why Not Just One?
Why do we not stick to just one - either analog or digital for all our signal processing needs? Naturally occurring signals are analog - which is why we need to extensively use A/D and D/A interfaces. Digital circuits are more robust to environmental and device noise.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Modern Day Integrated Systems


Why Not Just One?
Why do we not stick to just one - either analog or digital for all our signal processing needs? Naturally occurring signals are analog - which is why we need to extensively use A/D and D/A interfaces. Digital circuits are more robust to environmental and device noise. Today 5-10% of all signal processing chip circuitry is analog and the rest is digital. From the 1980s there has been a rapid shift of signal processing tasks to digital circuitry rather than analog.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Application of Mixed Signal ICs


Communications

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Application of Mixed Signal ICs


Communications
Wireline

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Wireless

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Wireless
Cellular Telephony (GSM, CDMA)

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g)

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio

Computing and Control

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio

Computing and Control


Storage (disk drives, digital tape)

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio

Computing and Control


Storage (disk drives, digital tape) Imagers and Displays (CMOS, CCDs, TFT, LCD)

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio

Computing and Control


Storage (disk drives, digital tape) Imagers and Displays (CMOS, CCDs, TFT, LCD)

Instrumentation (Test equipment, sensors)

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio

Computing and Control


Storage (disk drives, digital tape) Imagers and Displays (CMOS, CCDs, TFT, LCD)

Instrumentation (Test equipment, sensors) Consumer Electronics (You tell me!)

Application of Mixed Signal ICs


Communications
Wireline
Telephone (DSL,ISDN) Television (TV tuner, cable modem) Ethernet (Gigabit, 10/100Mbps)

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Wireless
Cellular Telephony (GSM, CDMA) WLAN (Bluetooth, UWB, 802.11 a/b/g) Radio

Computing and Control


Storage (disk drives, digital tape) Imagers and Displays (CMOS, CCDs, TFT, LCD)

Instrumentation (Test equipment, sensors) Consumer Electronics (You tell me!)

Quick Overview of Trends


Reduced cost is one of the big attractions of integrated electronics, and the cost advantage continues to increase as the technology evolves toward the production of larger and larger circuit functions on a single semiconductor substrate.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Quick Overview of Trends


Reduced cost is one of the big attractions of integrated electronics, and the cost advantage continues to increase as the technology evolves toward the production of larger and larger circuit functions on a single semiconductor substrate. For simple circuits, the cost per component is nearly inversely proportional to the number of components, the result of the equivalent piece of semiconductor in the equivalent package containing more components.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Quick Overview of Trends


Reduced cost is one of the big attractions of integrated electronics, and the cost advantage continues to increase as the technology evolves toward the production of larger and larger circuit functions on a single semiconductor substrate. For simple circuits, the cost per component is nearly inversely proportional to the number of components, the result of the equivalent piece of semiconductor in the equivalent package containing more components. But as components are added, decreased yields more than compensate for the increased complexity, tending to raise the cost per component.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Quick Overview of Trends


Reduced cost is one of the big attractions of integrated electronics, and the cost advantage continues to increase as the technology evolves toward the production of larger and larger circuit functions on a single semiconductor substrate. For simple circuits, the cost per component is nearly inversely proportional to the number of components, the result of the equivalent piece of semiconductor in the equivalent package containing more components. But as components are added, decreased yields more than compensate for the increased complexity, tending to raise the cost per component. Thus there is a minimum cost at any given time in the evolution of the technology.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Moores Law
Moores Observation
The complexity for minimum component costs has increased at a rate of roughly a factor of two per year. Certainly over the short term this rate can be expected to continue, if not to increase. Over the longer term, the rate of increase is a bit more uncertain, although there is no reason to believe it will not remain nearly constant for at least 10 years. That means by 1975, the number of components per integrated circuit for minimum cost will be 65,000. I believe that such a large circuit can be built on a single wafer. There are corollaries to this Observation/Law.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Benets to Digital Technology

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics

Enhanced functionality and exibility

Digital Philosophy Issues in Digital ICs

Benets to Digital Technology

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics

Enhanced functionality and exibility Automated design and test possible

Digital Philosophy Issues in Digital ICs

Benets to Digital Technology

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics

Enhanced functionality and exibility Automated design and test possible Arbitrary precision possible (at least in theory)

Digital Philosophy Issues in Digital ICs

Benets to Digital Technology

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics

Enhanced functionality and exibility Automated design and test possible Arbitrary precision possible (at least in theory) Provides inexpensive storage capability

Digital Philosophy Issues in Digital ICs

Dual Power Supplies for Analog and Digital

Introduction to Digital CMOS Technology Anurup Mitra Introduction

Due to conicting needs for analog and digital circuits, today a separate power supply is used for the analog and digital blocks on a mixed signal chip.

Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Dual Power Supplies for Analog and Digital

Introduction to Digital CMOS Technology Anurup Mitra Introduction

Due to conicting needs for analog and digital circuits, today a separate power supply is used for the analog and digital blocks on a mixed signal chip. In the O-Lab we have design kits from both TSMC and UMC for 180nm.

Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Dual Power Supplies for Analog and Digital

Introduction to Digital CMOS Technology Anurup Mitra Introduction

Due to conicting needs for analog and digital circuits, today a separate power supply is used for the analog and digital blocks on a mixed signal chip. In the O-Lab we have design kits from both TSMC and UMC for 180nm. These have separate transistors for analog and digital functions. The analog transistors are operated from a supply voltage of 2.5V and have a minimum feature size of 0.25 m, while the digital devices are operated at 1.8V and have a minimum feature size of 0.18 m.

Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

ITRS

Introduction to Digital CMOS Technology Anurup Mitra Introduction

ITRS is the International Technology Roadmap for Semiconductors. The organisation is responsible for laying out milestones for the entire semiconductor industry.

Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

ITRS

Introduction to Digital CMOS Technology Anurup Mitra Introduction

ITRS is the International Technology Roadmap for Semiconductors. The organisation is responsible for laying out milestones for the entire semiconductor industry.
Year of Production Digital Supply voltage (V) Tox (nm) Gate Length (nm) gm /gds at 5Lmindigital Peak Ft (GHz) Analog Supply voltage (V) Tox (nm) Gate Length (nm) gm /gds at 10Lmindigital Peak Ft (GHz) 2005 1.2 2.2 75 47 120 2.5 5 250 220 40 2006 1.2 2.1 65 40 140 2.5 5 250 220 40 2007 1.2 2.0 53 32 170 2.5 5 250 220 40 2008 1.2 1.9 45 30 200 2.5 5 250 220 40 2009 1.1 1.6 37 30 240 2.5 5 250 220 40 2010 1.1 1.5 32 30 280 1.8 3 180 160 50 2011 1.1 1.4 28 30 320 1.8 3 180 160 50 2012 1 1.4 25 30 360 1.8 3 180 160 50

Basic Building Block Performance Metrics Digital Philosophy 2013Issues in Digital ICs 1 1.3 22 30 400 1.8 3 180 160 50

Semiconductor Rankings for 2011

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Why Digital?
It has been often stated that digital circuits are used over analog ones because of their noise margin.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Why Digital?
It has been often stated that digital circuits are used over analog ones because of their noise margin. The noise margin of digital circuits is something that is inherent in their construction and functionality. While analog designers take great pains to lower the noise present in their circuits, digital designers choose a circuit methodology where their is no noise!

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Why Digital?
It has been often stated that digital circuits are used over analog ones because of their noise margin. The noise margin of digital circuits is something that is inherent in their construction and functionality. While analog designers take great pains to lower the noise present in their circuits, digital designers choose a circuit methodology where their is no noise! Digital electronics works at a level of abstraction much above voltages and currents. It collapses the values that can be taken by a variable to 2 - namely 1 and 0. In laymans language, it can be said, that digital is bothered about whether a certain parameter is present or absent - and not about how much is present or absent.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The Digital Abstraction


Electronics has always sought to process or transmit information.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The Digital Abstraction


Electronics has always sought to process or transmit information. Scheme 1 To transmit information, a given voltage is split up into equal divisions, each one signifying a particular code. For example to code the English alphabet, there need to be 26 equal divisions for a given voltage.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The Digital Abstraction


Electronics has always sought to process or transmit information. Scheme 1 To transmit information, a given voltage is split up into equal divisions, each one signifying a particular code. For example to code the English alphabet, there need to be 26 equal divisions for a given voltage. Any amount of intrinsic or external noise can change the coded representation.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The Digital Abstraction


Electronics has always sought to process or transmit information. Scheme 1 To transmit information, a given voltage is split up into equal divisions, each one signifying a particular code. For example to code the English alphabet, there need to be 26 equal divisions for a given voltage. Any amount of intrinsic or external noise can change the coded representation. Scheme 2 In transmitting information at each point in time, only one of two codes can be valid - 1 or 0 - also called bits. The English alphabet can be represented by having a sequence of 5 bits for each letter.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The Digital Abstraction


Electronics has always sought to process or transmit information. Scheme 1 To transmit information, a given voltage is split up into equal divisions, each one signifying a particular code. For example to code the English alphabet, there need to be 26 equal divisions for a given voltage. Any amount of intrinsic or external noise can change the coded representation. Scheme 2 In transmitting information at each point in time, only one of two codes can be valid - 1 or 0 - also called bits. The English alphabet can be represented by having a sequence of 5 bits for each letter. The time and/or hardware increases, but the coding is more robust against noise.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The Digital Abstraction


Electronics has always sought to process or transmit information. Scheme 1 To transmit information, a given voltage is split up into equal divisions, each one signifying a particular code. For example to code the English alphabet, there need to be 26 equal divisions for a given voltage. Any amount of intrinsic or external noise can change the coded representation. Scheme 2 In transmitting information at each point in time, only one of two codes can be valid - 1 or 0 - also called bits. The English alphabet can be represented by having a sequence of 5 bits for each letter. The time and/or hardware increases, but the coding is more robust against noise. Scheme 2 is the digital abstraction.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Generating 1s and 0s
The rst requirement of digital electronics is a circuit that is capable of generating only two output levels - 1 and 0.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Generating 1s and 0s
The rst requirement of digital electronics is a circuit that is capable of generating only two output levels - 1 and 0. Because, in real life we do not have a 1 and a 0, we seek the digital abstraction from real life parameters by setting the maximum voltage available in a circuit to 1 and the minimum to 0.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Generating 1s and 0s
The rst requirement of digital electronics is a circuit that is capable of generating only two output levels - 1 and 0. Because, in real life we do not have a 1 and a 0, we seek the digital abstraction from real life parameters by setting the maximum voltage available in a circuit to 1 and the minimum to 0. Therefore, to represent these output levels, there needs to be a circuit which can at any time, connect to either VDD or ground.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Generating 1s and 0s
The rst requirement of digital electronics is a circuit that is capable of generating only two output levels - 1 and 0. Because, in real life we do not have a 1 and a 0, we seek the digital abstraction from real life parameters by setting the maximum voltage available in a circuit to 1 and the minimum to 0. Therefore, to represent these output levels, there needs to be a circuit which can at any time, connect to either VDD or ground. A simple implementation would be to have a oating node that could be connected by an (electrically controlled) switch to either supply or ground.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Generating 1s and 0s
The rst requirement of digital electronics is a circuit that is capable of generating only two output levels - 1 and 0. Because, in real life we do not have a 1 and a 0, we seek the digital abstraction from real life parameters by setting the maximum voltage available in a circuit to 1 and the minimum to 0. Therefore, to represent these output levels, there needs to be a circuit which can at any time, connect to either VDD or ground. A simple implementation would be to have a oating node that could be connected by an (electrically controlled) switch to either supply or ground. In IC technology, an electrically operated switch is easily obtained by an MOS transistor.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Detecting 1s and 0s
Detecting a 1 and a 0 implies having an output from a system that can respond to these two stiumli.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Detecting 1s and 0s
Detecting a 1 and a 0 implies having an output from a system that can respond to these two stiumli. The inputs and outputs can be mapped in two unique ways: Buer 0 0; 1 1

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Detecting 1s and 0s
Detecting a 1 and a 0 implies having an output from a system that can respond to these two stiumli. The inputs and outputs can be mapped in two unique ways: Buer 0 0; 1 1 Inverter 0 1; 1 0

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Detecting 1s and 0s
Detecting a 1 and a 0 implies having an output from a system that can respond to these two stiumli. The inputs and outputs can be mapped in two unique ways: Buer 0 0; 1 1 Inverter 0 1; 1 0 The second option is easier to implement with electronics.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Detecting 1s and 0s
Detecting a 1 and a 0 implies having an output from a system that can respond to these two stiumli. The inputs and outputs can be mapped in two unique ways: Buer 0 0; 1 1 Inverter 0 1; 1 0 The second option is easier to implement with electronics. An inverter is used as a basic building block of all digital circuits because of its innate ability to both detect and generate a 1 and a 0 successfully.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The CMOS Digital Inverter

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The MOSFETs act as electrically (voltage) controlled switches. Two of the reasons CMOS technology caught the digital designers fancy were the MOSFETs extremely high resistance in the OFF state and its extremely low resistance in the ON.

The CMOS Digital Inverter

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The MOSFETs act as electrically (voltage) controlled switches. Two of the reasons CMOS technology caught the digital designers fancy were the MOSFETs extremely high resistance in the OFF state and its extremely low resistance in the ON. By employing one nMOS and one pMOS switch, the state of the two switches is always complementary - hence the name CMOS digital electronics.

Digital Performance Measures

Introduction to Digital CMOS Technology Anurup Mitra Introduction

Unlike analog circuits, digital circuits are quantied by largely two performance measures - speed and power. These two directly trade o with each other.

Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Digital Performance Measures

Introduction to Digital CMOS Technology Anurup Mitra Introduction

Unlike analog circuits, digital circuits are quantied by largely two performance measures - speed and power. These two directly trade o with each other. An inverter works by charging a node to a 1 or by discharging it to a 0. Since all nodes in an MOS circuit are capacitive in nature, the charging or discharging is made faster by using a higher current, thus providing a greater speed of operation.

Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Digital Performance Measures

Introduction to Digital CMOS Technology Anurup Mitra Introduction

Unlike analog circuits, digital circuits are quantied by largely two performance measures - speed and power. These two directly trade o with each other. An inverter works by charging a node to a 1 or by discharging it to a 0. Since all nodes in an MOS circuit are capacitive in nature, the charging or discharging is made faster by using a higher current, thus providing a greater speed of operation. However, the higher current also implies a greater power dissipation.

Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The Truth About Digital


It can be safely said that all of digital electronics contains the gainful employment of inverters of various shapes and sizes cascaded in a fashion to provide a meaningful output to a given set of inputs.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The Truth About Digital


It can be safely said that all of digital electronics contains the gainful employment of inverters of various shapes and sizes cascaded in a fashion to provide a meaningful output to a given set of inputs. A given stage of a digital circuit, no matter how seemingly complex can be simplied to an equivalent inverter.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The Truth About Digital


It can be safely said that all of digital electronics contains the gainful employment of inverters of various shapes and sizes cascaded in a fashion to provide a meaningful output to a given set of inputs. A given stage of a digital circuit, no matter how seemingly complex can be simplied to an equivalent inverter. Therefore, if the static characteristics of a digital inverter can be studied, the static characteristics of any equivalent inverter can be known. The static characteristics of an inverter is the steady state response of an inverter - this is usually just the transfer function of the same.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

The Truth About Digital


It can be safely said that all of digital electronics contains the gainful employment of inverters of various shapes and sizes cascaded in a fashion to provide a meaningful output to a given set of inputs. A given stage of a digital circuit, no matter how seemingly complex can be simplied to an equivalent inverter. Therefore, if the static characteristics of a digital inverter can be studied, the static characteristics of any equivalent inverter can be known. The static characteristics of an inverter is the steady state response of an inverter - this is usually just the transfer function of the same. Similarly, the dynamic characteristics of the digital inverter the behaviour of the inverter in time, i.e., how fast it reaches steady state - should be comprehended.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Abstraction
Digital circuits employ the concept of abstraction. This implies that a circuit is split up into a hierarchy and each level of the hierarchy constitute one abstraction. For example at the lowest level there is the inverter, then logic gates, followed by functional blocks and so on.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Abstraction
Digital circuits employ the concept of abstraction. This implies that a circuit is split up into a hierarchy and each level of the hierarchy constitute one abstraction. For example at the lowest level there is the inverter, then logic gates, followed by functional blocks and so on. The performance of each level in terms of speed and power can be characterised and used in the next higher level of hierarchy.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Abstraction
Digital circuits employ the concept of abstraction. This implies that a circuit is split up into a hierarchy and each level of the hierarchy constitute one abstraction. For example at the lowest level there is the inverter, then logic gates, followed by functional blocks and so on. The performance of each level in terms of speed and power can be characterised and used in the next higher level of hierarchy. This abstraction also allows the use of design automation. CAD or EDA tools can take in as input the design specs of the top level of the hierarchy and produce as output, GDS II format - ready for tape-out.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Abstraction
Digital circuits employ the concept of abstraction. This implies that a circuit is split up into a hierarchy and each level of the hierarchy constitute one abstraction. For example at the lowest level there is the inverter, then logic gates, followed by functional blocks and so on. The performance of each level in terms of speed and power can be characterised and used in the next higher level of hierarchy. This abstraction also allows the use of design automation. CAD or EDA tools can take in as input the design specs of the top level of the hierarchy and produce as output, GDS II format - ready for tape-out. This is known as synthesis.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

CAD Tools
As has been mentioned earlier CAD tools play an indispensable part in the manufacture of digital ICs. Todays digital ICs pack so much functionality into a small area, the number of transistors required for implementation cannot be hand placed and routed.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

CAD Tools
As has been mentioned earlier CAD tools play an indispensable part in the manufacture of digital ICs. Todays digital ICs pack so much functionality into a small area, the number of transistors required for implementation cannot be hand placed and routed. A digital synthesis tool takes a top level description and seeks to create the actual circuit by looking up a pre-manufactured library. From the library it selects characterised components in a manner such that the top level design specs can be met.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

CAD Tools
As has been mentioned earlier CAD tools play an indispensable part in the manufacture of digital ICs. Todays digital ICs pack so much functionality into a small area, the number of transistors required for implementation cannot be hand placed and routed. A digital synthesis tool takes a top level description and seeks to create the actual circuit by looking up a pre-manufactured library. From the library it selects characterised components in a manner such that the top level design specs can be met. There are many variations on this theme. The standard cell and the FPGA are the most widely used. While a standard cell library contains dierent versions of each functional block on software, the FPGA has pre-fabricated functional blocks the interconnections between which can be (re)programmed.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Interconnect and Power Issues


While the abstraction works well for digital circuits, in modern day deep-submicron design interconnect issues often tend to break this down.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Interconnect and Power Issues


While the abstraction works well for digital circuits, in modern day deep-submicron design interconnect issues often tend to break this down. While digital ciruits tend to be characterised and used by CAD tools in terms of their intrinsic delays (i.e. the delays incurred in charging/discharging an output to 1/0 as a response to an input), the interconnects themselves contribute parasitic capacitances and resistances that increase the overall delay of the system.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Interconnect and Power Issues


While the abstraction works well for digital circuits, in modern day deep-submicron design interconnect issues often tend to break this down. While digital ciruits tend to be characterised and used by CAD tools in terms of their intrinsic delays (i.e. the delays incurred in charging/discharging an output to 1/0 as a response to an input), the interconnects themselves contribute parasitic capacitances and resistances that increase the overall delay of the system. As aggressive scaling continues, the power issue has limited integration with each passing digital generation. There is a limit to the amount of localised heat generation that can be handled by a packaged integrated circuit.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Timing and Synchronisation Issues


The most widely permeated digital circuit is the microprocessor. Most of the components of the microprocessor are synchronised to operate on a rising or a falling clock edge.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Timing and Synchronisation Issues


The most widely permeated digital circuit is the microprocessor. Most of the components of the microprocessor are synchronised to operate on a rising or a falling clock edge. The main clock is derived from a crystal oscillator by a PLL. This clock needs to be distributed to all parts of the chip for proper synchronisation of all functional blocks.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Timing and Synchronisation Issues


The most widely permeated digital circuit is the microprocessor. Most of the components of the microprocessor are synchronised to operate on a rising or a falling clock edge. The main clock is derived from a crystal oscillator by a PLL. This clock needs to be distributed to all parts of the chip for proper synchronisation of all functional blocks. However, the clock signal experiences dierent delays as it travels to dierent parts of the chip. This gives rise to clock skews and possible race conditions.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

Timing and Synchronisation Issues


The most widely permeated digital circuit is the microprocessor. Most of the components of the microprocessor are synchronised to operate on a rising or a falling clock edge. The main clock is derived from a crystal oscillator by a PLL. This clock needs to be distributed to all parts of the chip for proper synchronisation of all functional blocks. However, the clock signal experiences dierent delays as it travels to dierent parts of the chip. This gives rise to clock skews and possible race conditions. Clock distribution trees, which symmetrically distribute the clock to various parts of the chip need to be employed.

Introduction to Digital CMOS Technology Anurup Mitra Introduction Basic Building Block Performance Metrics Digital Philosophy Issues in Digital ICs

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