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Department of Computer Science, Faculty of Mathematical Sciences, University for Development Studies, Navrongo, Ghana.
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Abstract Overflow detection is one of the major issues that preclude Residue Number System (RNS) usage in general purpose computing. Contemporary authors have presented various schemes that rely on either the Chinese Remainder Theorem (CRT) or the Mixed Radix Conversion (MRC). This paper presents an overflow detection scheme in RNS multiplication before forward conversion. Overflow in RNS multiplication of integers X and Y occurs when the product of the calculated quotients, ab , where M = is the system dynamic range. Our proposal is a multiplicative overflow detector, which does not require computations involving the use of the time consuming CRT or MRC. The newly proposed scheme utilizes lesser modulo computations and hence has the advantage of having smaller hardware architecture with lesser delay. Keywords: Residue Number System, Multiplicative overflow detector, Dynamic Range. CRT. and MRC
------------------------------------------------------------------------------------------------------------------1.0 Introduction The advantages of Residue Number System (RNS) over the conventional binary number system include parallelism, fault tolerance low power and high speed computations and are well documented in [2], [8], [10], [12]. However, the inability of RNS to efficiently manage dynamic range overflow is one of the major disadvantages [1], [7], [11]. Overflow in RNS is a condition where a calculated number falls outside the valid dynamic range of a particular RNS [4]. Contemporary authors over the past decades have developed overflow detection algorithms, which rely on the Chinese Remainder Theorem (CRT) or the Mixed Radix Conversion (MRC) using one or more of relatively prime moduli as scale factors [9], [10]. Siewobr and Gbolagade [5] proposed a scheme that uses the large modulo (M+1) computation. Siewobr and Gbolagade again developed an additive overflow detection scheme that reduces the large modulo M to Mi by scaling M and the integers X and Y with the modulus mi = 2n [4]. However, the proposed scheme in [4] does not consider overflow in multiplication of two numbers. In this paper, we present an overflow detection scheme in RNS multiplication before forward conversion. The algorithms are based on first, the computation of the quotients, a = and b = for integers X and Y. Secondly, we make the proposition that overflow occurs in RNS multiplication of X and Y when ab , where M = is the system dynamic range. This new proposal detects multiplicative overflow. It also eliminates the time consuming reverse conversion approach characterized by the use of CRT and MRC with large modulo M. The overall achievement is reduced area cost and improvement in delay.
JOURNAL OF COMPUTING, VOLUME 4, ISSUE 12, DECEMBER 2012, ISSN (Online) 2151-9617 https://sites.google.com/site/journalofcomputing WWW.JOURNALOFCOMPUTING.ORG
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2.0 The Proposed Scheme In this work, we propose a simple overflow detection scheme in RNS multiplication before forward conversion. Given the binary/decimal numbers X and Y and the moduli set {m1, m2 m3,, mn}, with the dynamic range M = . The modulus m = 2 is chosen such that:
= as in equation (8)
a=
and ab
as in equations (1)-(4)
b= =
ab
2.1 proposed overflow detection algorithm 1. Given the binary/decimal numbers X and Y and any moduli set {m1, m2 m3,,mn}, with the dynamic range M = . 2. Choose the modulus m = 2 3. Compute the following; a = , b = , = , and ab . 4. If ab then overflow occurs in
Proposition 1: An overflow only occurs in RNS multiplication of the binary/decimal numbers X and Y if ab Proof: If we let
(5) (6) = (7) For purposes of illustrations, we show how the scheme works with some examples. 1. Product of 30 and 4 using the moduli set {7, 5, 3}. Let X = 30, Y = 4 and M = 105. Then a = = 15, b = = 2 and If ab = 26.25.
b=
Then we proposed that an overflow will occur in RNS multiplication of X and Y if ab (8) From equations (5), (6), and (7) we see that X=am Y=bm M= m (9) (10) (11)
multiplication. That is 30 26.25 is true and overflow does occur in RNS multiplication of 30 and 4 for the moduli set {7, 5, 3}. 2. Product of 20 and 4 using the moduli set {7, 5, 3}.
JOURNAL OF COMPUTING, VOLUME 4, ISSUE 12, DECEMBER 2012, ISSN (Online) 2151-9617 https://sites.google.com/site/journalofcomputing WWW.JOURNALOFCOMPUTING.ORG
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multiplication. But 20 26.25 is false and overflow does not occur in RNS multiplication of 20 and 4 for the moduli set {7, 5, 3}. Table1 Summary of illustrated examples
a X 30 20 8 6 0 32 40 Y 4 4 10 30 0 20 4 = 15 10 4 3 0 16 20 = 2 2 5 15 0 10 2 b ab 30 20 20 45 0 160 40 Is ab Is there overflow YES NO NO YES NO YES YES
Logic gate 1
ab T Overflow F No Overflow
M = 105 3 Implementation
The algorithms are implemented in stages. First, since a = , b = and are made up of integer divisions and remainders, we scale X and Y by 2 and scale M by 4. The product of a and b is implemented in three steps. The results in the previous two steps are multiplied to obtain ab. A simple logic circuit is used to implement ab and then output whether there is overflow or not. We note here that binary scaling and division by 2, that is, powers of two requires no hardware since it is just a right logical shift operations. Also, computing the residue of a number with respect to 2 type moduli results in the one least significant bit of the number in question and also requires no hardware. Therefore the computations of a and b can be hardwired. The implementation is therefore reduced to simple multiplication and magnitude comparison as shown in Fig. 2.
DOBFC = Detection of Overflow Before Forward Conversion. TM = Traditional Method. OP = Our Proposal In Table 2, it can be seen that it is only the new proposal, the TM and [4] that can detect overflow before forward conversion. In addition, the proposed scheme detects overflow in multiplication operation and requires lesser modulo operation when compared with the TM model and others. This results in the use of less hardware resources in design and minimum operation time. The overall achievement is reduced area cost and improvement in delay.
JOURNAL OF COMPUTING, VOLUME 4, ISSUE 12, DECEMBER 2012, ISSN (Online) 2151-9617 https://sites.google.com/site/journalofcomputing WWW.JOURNALOFCOMPUTING.ORG
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Conclusion
In this paper, we presented a dynamic range multiplicative overflow detection scheme in RNS before forward conversion. Firstly, the algorithms seek to compute the quotients a = and b= . Secondly we propose that overflow in RNS multiplication of integers X and Y occurs when the product of the calculated quotients, ab , where M = is the system dynamic range. By design, our proposal is a multiplicative overflow detector and does not require computations involving the use of the time consuming CRT and MRC techniques with large modulo M. It is also found that the new scheme uses lesser modulo computations and hence has the advantage of moderate hardware architecture with lesser delay operations. 6 Reference
Intelligence and Information Security, vol.2, no.9, pp. 48-54, 2011. [5] H. Siewobr and K.A. Gbolagade, An Efficient RNS Overflow Detection Algorithm, Far East Journal of Electronics and Communications. Vol. 6, No. 2, pp 83-91, 2011. [6] J.L Massey and O.M Garcia, Error Correcting codes Computer Arithmetic. New York, Plenum 1972. [7] J.M Diamond, Checking codes for digital computers. Proc.IRE vol. 43, April 1954. [8] K.A Gbolagade and S.D Cotofana, Residue-to-decimal converters for moduli set with common factors. 52nd IEEE International Midwest Symposium on Circuits and Systems (MINSCAS, 2009), PP.624-627, 2009. [9] K.H Rosen, Discrete Mathematics and Its Applications, Fourth Edition, McGraw-Hill, pp.145, 1999. [10] M.A Soderstand, W.K Jenkins, G.A Jullien and F.J Taylor, Residue Number System Arithmetic: Modern Application in Digital Signal Processing. IEEE press, New York, 1986. [11] M.J Schulte et al., Integer multiplication with Overflow Detection or Saturation. IEEE Transactions on computers vol.49, no.6, June 2000. [12] P.V Ananda Mohan, Residue Number system: Algorithms and Architecture. Kluwer Academic New York 2002.
[1] F.J Taylor and C. Huang, An Auto scale Multiplier. IEEE Transactions on computers vol.c-31, no.4, April 1982. [2] F.J Taylor, Residue Arithmetic: A tutorial with examples. IEEE Computer Magazine, vol.17, pp.50-62, May 1984. [3] H.L Garmer, Error Codes for Arithmetic Operations. IEEE Trans. Electron Computers vol.EC-15, October, 1966. [4] H.Siewobr and K.A Gbolagade, An Overflow Detection in Residue Number Systems Addition before forward con version. International Journal of Com putational