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Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni
TM TT NI DUNG
S dng vi iu khin PIC 16F877A thit k mt mch qun l cuc gi i. Vic thit k cn phi c kin thc c s v in thoi v m DTMF. V vy trong chng 1 ca lun vn em trnh by c s l thuyt v in thoi v m DTMF. Tip theo l vi iu khin PIC 16F877A c em la chn v l do em la trn c em trnh by chng 3, c im k thut c trnh by phn ph lc. Phn thc nghim bao gm cc cng vic: thit k mch phn cng ca mch qun l cuc gi i bng phn mm Altium Designer 6.7.9346, l p trnh cc khi cho
bn mch.
Trong lun vn ny tp trung vo cc vn sau: Thit k phn cng ca mch qun l s in thoi gi i Hin th thng tin cuc gi ln LCD
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BNG CH CI VIT TT
DTMF I2C ICSP MCLR PIC
: dual-tone multiFequency : Inter-intergrated Circuit : In-Circuit Serial Programming : Master Clear : Peripheral Interface Controller : Programmable Intelligent Computer
LCD SPI
: Liquid crytal Display : Serial Pripheral Interface
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LI CM N
Li u tin trong kho lun em xin by t lng bit n ti ton th cc thy c, cn b trong khoa in t - Vin thng trng i hc Cng ngh - i hc Quc Gia H Ni, c bit l cc thy c trong b mn in t nhit tnh ch dy d em trong sut bn nm hc va qua. Em xin chn thnh cm n thy gio PGS.TS Ng Din Tp hng dn, quan tm, ch bo tn tnh em hon thnh kho lun tt nghip ny. Cm n gia nh, bn b ng vin, khch l, gip v mi mt trong qu trnh em lm lun vn tt nghip.
H Ni: ngy 07 thng 5 nm 2008 Sinh vin thc hin
V Tin Chng
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LI NI U Ngy nay k thut vi iu khin tr nn quen thuc trong ngnh k thut v c trong cc ng dng i thng. Hu ht cc dy truyn t ng ln v cc sn phn dn dng ta u thy s sut hin ca vi iu khin. Vi iu khin c nh sn xut tch hp rt nhiu cc nhiu tnh nng vi cc b ngoi vi c tch hp ngay trn vi iu khin, cng vi kh nng x l nhiu hot ng phc tp, tt c c tch hp trn mt con chip nh gn, chnh v v y s gp nhiu thun li hn trong thit k board, khi board mch s nh gn v p hn d thi t k hn rt nhiu. V mt tnh nng v cng nng th c th xem PIC vt tri hn rt nhiu so vi 89 vi nhiu module c tch hp sn nh ADC10 BIT, PWM 10 BIT, PROM 256 BYTE, COMPARATER, VERF COMPARATER, mt c im na l tt c cc con PIC s dng th u c chun PI tc chun cng nghip thay v chun PC (chun dn dng). Ngoi ra PIC cn c rt nhiu nh sn xut phn mm to ra cc ngn ng h tr cho vic lp trnh ngoi ngn ng Asembly ra cn c th s dng ngn ng C th s dng CCSC, HTPIC hay s dng Basic th c MirkoBasic v cn nhiu chng trnh khc na h tr cho vic lp trnh bn cnh ngn ng kinh in l asmbler. Cng vi s pht trin ca vi iu khin l s pht trin mnh m ca cc dch v in thoi chnh v vy nn vic qun l cc cuc in thoi tr nn cp thit. T yu cu trn v nhng kin thc em c hc trn trng em c chn ti qun l s in thoi gi i vi mc tiu t ra: s dng PIC 16F887A v ng h thi gian thc xc nh thi gian gi, ghp ni vi LCD hin thng tin v cuc gi . Gii hn ti : vic thit k cc ng dng ca PIC vi ng dy in thoi rt phong ph v phc tp, do vy trong lun vn ny em tp trung gii quyt cc vn chnh:
Thit k phn cng mch qun l cuc gi i Hin th thng tin cuc gi trn mn hnh LCD
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PHN 1: L THUYT
CHNG 1 TNG V C S L THUYT 1.1 tng Nhiu khi em m ho n in thoi ra v ngh rng: Mnh khng th gi nhiu nh th c. Hu ht cc ho n in thoi ghi li cc cuc gi ng di v a ra chi tit cc s gi. Nhng cc cuc gi a phng (nh kiu ni ht) ch c cng tng li v vy s khng th bit c chi tit v cc cuc gi i. Chnh v vy m em thit k mnh in ny lu li chi tit cuc gi m mnh gi i (s in thoi v thi gian gi). Vi mch in ny th tt c nhng cuc gi i c ghi li v v vy em c th bit c chi ph cc gi hng thng. Mch in ghi li thi gian bt u v kt thc ca tt c cc cuc gi i cng vi cc s gi. N hot ng mt cch c lp vi PC. D liu cuc gi in thoi l u ra trong mt fomat m c th d dng nhp vo Microsoft Excel. Cc chc nng a dng ca Excel sau c th c dng phn tch v phn loi d liu v to ra cc bn in t my tnh c nh dnh. D liu c lu tr trong b nh EEPROM, do s khng mt d liu trong cc trng hp b mt in. Mch in c cung cp vi b nh 256K. 1.2 C s l thuyt 1.2.1 Cu to c bn v nguyn l hot ng ca in thoi Mt chic my in thoi c bn l gm ba phn chnh sau:
Phn chuyn i mch in: Phn ny gm h thng l m tip im v c
nhim v ng m mch in khi c yu cu.
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Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni Phn thu v pht tn hiu gi: Phn ny gm hai phn chnh l my in
quay tay c nhim v pht tn hiu gi ln ng chuyn v phn chung my c nhim v bin dng tn hiu gi thnh tn hiu gi.
Phn thu pht thoi: Gm c loa v mic. Loa c nhim v bin i tn hiu
m thanh thnh tn hiu in v mic th c nhim v ngc li bin tn hiu in thnh tn hiu m thanh.
Thit b gi s
Triu ting lickic Chung Nt gt t hp B tr chiu di ng dy
ng ni
Cun cm ng
ng nghe
Mch cn bng
Hnh 1.1: S khi ca in thoi
Nguyn l hot ng: Khi ta thc hin cuc gi dao ng m thanh ca ting ni s tc ng vo mng rung ca mic lm sut hin dng in bin i tng ng trong mch. Dng in bin i ny c truyn trn ng dy in thoi v c chuyn mch n my in thoi c gi, lm cho mng rung ca loa dao ng, lp khng kh trc
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mng s dao ng theo pht ra m thanh tc ng n tai ngi nghe v qu trnh chuyn dn ngc li cng tng t. 1.3 phn loi cc kiu in thoi 1.3.1 Phn loi theo phng thc tip dy +My in thoi nhn cng: cc loi my lin lc vi nhau qua tng i nhn cng gm hai loi
My in thoi t thch: Ngun cung cp m thoi v gi chung u
c trang b ti tng my l, ngun m thoi thng dng pin, ngun gi chung l my pht in magneto.
My in thoi cng in: Ngun cung cp m thoi v gi chung
c t ti tng i, s dng ngun mt chiu 48V. +My in thoi t ng

Lin lc vi nhau qua tng i t ng bng cch quay s hay bng n phm. Ngun cung cp in m thoi l ngun mt chiu 48V hoc 60V, ngun
gi chung t 90 100 V, tn s 16 25 Hz. 1.4 S lc v tn hiu DTMF 1.4.1 nh ngha DTMF(dual tone multi-frequency): l tn hiu gm c hai tn s xp trng ln nhau. Mi tn s c la chn sao cho c li cho vic thit k b lc v d dng truyn i trn ng dy in thoi c bng thng khong chng 3,5KHz. DTMF pht ra l 1 tn hiu m thanh ghp ca 2 tn hiu trong di tn s t 697Hz n 1633Hz Phin bn ca DTMF s dng cho tn hiu in thoi c bit n nh hng Touch-Tone, v c tiu chun ho bi ITU-T l Q.23. Tn hiu DTMF c th c pht hoc thu bng mt IC chuyn dng (VD: MTD887X) H thng DTMF ang pht trin v tr thnh ph bin trong h thng in thoi hin nay. H thng ny c hnh thnh vo nm 1960 nhng mi n nm 1970 mi c pht trin rng ri. 1.4.2 KEYPAD
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Trong DTMF mi ch s chn la c tn hiu di dng t hp ca hai tn s xoay chiu :
Hnh 1.2: Dng tn hiu DTMF Khi mt nt c bm, hai tn s m t ch s c pht ra v c gi mt cch ng thi. c bit l hai m thanh ny khng cng m, tc l tn s ca m thanh ny khng c cng c s chung vi m thanh kia, iu ny trnh s nhm ln v tnh vi m hiu ni, s phn tnh r rng gia hai loi ny l rt cn thit. V d nh hai tn s 750 v 500 l hai tn s khng th kt hp thnh tn hiu DTMF v c cng c s chung l 250, hai tn s ny l hai thanh cng m. Keypad chun l mt ma trn ch nht gm ba ct v bn hng (3x4) to nn tng cng l 12 phm nhn: trong c 10 phm cho ch s (t 0 n 9), hai phm c bit l * v #. Mi hng trn bn phm bm c gn cho mt tn s tn hiu thp, mi ct c gn cho tn s tn hiu cao. Mi mt phm s c mt tn hiu DTMF ring c tng hp bi hai tn s tng ng vi hng v ct m phn ang ng . Nhng tn s ny c la chn cn thn sao cho c li cho vic thit k b lc v d dng truyn i
trn ng dy in thoi.
Hnh 1.3: Bn phm chun 12 nt
Ngy nay ngi ta cn cho thm mt vi phm to nn bng m c nm trong mt ma trn (4x4) vi mi hng miu t bng mt tn s thp v mi ct miu t bng mt tn s cao.
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Hnh 1.4: Bn phn m rng 16 phm
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PHN 2: THC NGHIM CHNG 2 S KHI V NGUYN L HOT NG

2.1 S khi ca mch
PHONE
Mch giao tip ng dy
Khi thu v gii m DTMF Khi ng h thi gian
Khi cm bin tn hiu nhc in thoi
Khi ghp ni my tnh
Khi x l trung tm
Khi hin th
EEPROM
Hnh 2.1: S khi ca mch.
2.2 Nguyn l hot ng 2.2.1 Khi x l trung tm Khi x l trung tm iu khin ton b hot ng ca mch: nhn d liu gii m DTMF t b gii m DTMF, nhn tn hiu thi gian t khi ng h thi gian thc, ghi d liu (s in thoi, ngy gi gi, thi gian gi) vo EEPROM v hin th tt c thng tin ln mn hnh tinh th lng. 2.2.2 Khi thu v gii m DTMF
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Khi ny c nhim v nhn tn hiu DTMF t mch giao tip vi ng dy in thoi v sau gii m thnh m nhi phn 4 bit a vo khi x l trung tm. 2.2.3 Khi ng h thi gian thc Khi ny cung cp d liu v: ngy, thng, nm, gi, pht, giy mt cch chnh xc cho khi iu khin tnh thi gian gi n v thi gian gi. Chnh v vy m n cn phi chy ngay c khi mt in nn yu cu c ngun pin nui trong trng hp mt in. 2.2.4 Khi hin th L mn hnh tinh th lng LCD (2 dng, mi dng 16 k t) hin th thng tin cuc gi nh: s in thoi, thi gian thc hin cuc gi, thi gian gi 2.2.5 Khi EEPROM Khi ny lu tr ton b thng tin v cuc gi (s in thoi, thi gian thc hin cuc gi, thi gian gi). Khi ny c dung lng l 256kB. 2.2.6 Khi ghp ni my tnh theo chun RS-232 Khi ny c nhim v giao tip vi my tnh theo chun RS-232. Khi ny c nhim v chnh l c d liu cuc gi t EEPROM. 2.2.7 Khi ngun nui L khi c bn nht n cung cp dng nui cho ton b linh kin trong mch. N to ra in p n nh tho mn cc ch s v in p v dng . 2.2.8 Hot ng ca mch Mch c ghp ni song song vi ng dy in thoi m bo cho thu bao lun hot ng bnh thng. mch c chc nng hin th cc thng tin chi tit v cuc gi i: ngy, gi gi, thi gian gi, s gi i. Mch c phn pht hin cuc gi, tc l nu ngi dng nhc my thc hin cuc gi th mch s hin th s gi i v khi kt thc cuc gi s hin th thi gian thc hin cuc gi. Cui thng ngi dng c th ly thng tin chi tit t tt c cc cuc gi i trong thng bng cch kt ni mch vi my tnh t cng COM.
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CHNG 3 THIT K MCH IN V THC NGHIM

3.1 Thit k mch nguyn l 3.1.1 Khi x l trung tm Khi x l trung tm l vi iu khin PIC16F877A, l IC c 40 chn, vi 5 cng vo ra l Port A(RA0RA5), Port B(RB0RB7), Port C(RC0RC7), Port D(RD0RD7), Port E(RE0RE2). N c 8k Flash ROM v 368 Byte RAM. S chi tit l:
Hnh 3.1: S nguyn l ca PIC16F877A trong mch
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Chn RESET l chn s 1 ca PIC (chn MCLR) PIC s reset khi chn ny mc thp. B dao ng thch anh (20MHz) c ni vi chn 13 v 14 ca vi iu khin, b dao ng c thm t C12 v C14 tng s n nh cho ngun xung nhp ca h thng. PIC c cp ngun qua hai cp chn VSS v VDD. Hai cp chn VSS l chn 12 v 31 ni t cn hai cp chn VDD l chn 11 v 32 ni ln ngun +5V do b ngun nui cung cp. Cc cng ca PortB (t RB0 n RB7, RB3 khng dng) ni n LCD. Cc cng ca PortD (t RD0 n RD3) l li vo ca tn hiu DTMF c m ho thnh m nh phn 4 bit. Cc cng ca PortC (t RC2 n RC4 ) c ni n ng h thi gian thc, t RC6 n RC7 kt ni ti my tnh theo chun RS-232. 3.1.2 Khi thu v gii m DTMF Gii m DTMF c thc hin bng vi mch chuyn dng IC MT8870 nh th m vic gii m tr nn n gin hn. S nguyn l kt ni ca IC MT8870 trong mch c trnh by nh hnh di:
Hnh 3.2: S nguyn l kt ni trong mch ca IC MT8870
IC nhn tn hiu DTMF t ng in thoi qua chn 2 (IN -), sau khi thc hin gii m n a d liu qua ra 4 chn (t chn 11 n chn 14) di dng 4 bit nh phn. IC s dng dao ng thch anh 3, 579545 MHz . MT8870 hot ng theo nguyn l:
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Digit ANY 1 2 3 4 5 6 7 8 9 0 * # A B C D A B C D
TOE L H H H H H H H H H H H H H H H H H H H H
INH X X X X X X X X X X X X X L L L L H H H H
Est H H H H H H H H H H H H H H H H H H H H H
Q4 Z 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0
Q3 Z 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0
Q2 Z 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0
Q1 Z 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
undetected, the output code will remain the same as the previous detected code
3.1.3 Khi ng h thi gian thc IC DS1307 ng h thi gian thc ni tip (DS1307) ca hng Dallas Semiconductor. N s dng mt giao din ni tip I2C 2 dy giao tip vi vi iu khin. N m giy, pht, gi, ngy trong thng, thng, ngy trong tun v
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nm cho n nm 2100. N c mt u xung vung (pin 7), c lp trnh a ra mt tn hiu mt giy. Ngoi ra DS1307 chuyn mch t ng khi pht hin li ngun. B pin lithium 3V cung cp ngun d phng trong trng hp mt in. Cch ni chn trong mch: Vcc: ni vi ngun X1, X2: ni vi thch anh 32, 768 kHz Vbat: u vo pin 3V GND: t SDA: chui data SCL: dy xung clock SQW/OUT: xung vung/u ra driver S nguyn l kt ni trong mch:
Hnh 3.3: S nguyn l kt ni trong mch in
3.1.4 Khi hin th thng tin
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S dng mn hnh tinh th lng LCD (Liquid Crytal Display) loi 2 dng, 16 k t LCD1602. Mn hnh LCD rt ph bin trn th trng v vic lp trnh cho n rt n gin thm vo l n c mt thm m rt cao. S dng ngun nui thp (t 2, 5 n 5V). C th hot ng hai ch 4 bit hoc 8 bit (trong ti ny em s dng ch 4 bit). C th iu chnh tng phn qua bin tr R6. C th ghi ln LCD v c d liu t LC
S nguyn l kt ni ca LCD1602 trong mch in:
Hnh 3.4: S nguyn l kt ni ca LCD1602 trong mch in
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LCD1602 c ghp ni vi vi iu khin thng qua PortB (RB0 n RB7 Khng s dng RB3). RB0 ni vi chn E, RB1 ni vi chn RS, RB2 ni vi chn R/W l chn c ghi d liu v chn RB4 n RB7 l chn d liu vo. 3.1.5 Khi EEPROM Mch in c cung cp vi b nh 256K s dng IC AT24C526. Mch in ghi li thi gian bt u v kt thc ca tt c cc cuc gi i cng vi cc s gi. D liu c lu tr trong b nh EEPROM, do s khng mt d liu trong cc trng hp b mt in. IC AT24C256 ghp ni vi PIC qua PortC theo chun I2C (RC3 v RC4). S ghp ni nh hnh di:
Hnh 3.5: S nguyn l kt ni AT24C256 trong mch in
3.1.6 Khi ghp ni my tnh theo chun RS-232 S ghp ni:
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Hnh 3.6: S nguyn l kt ni MAX232 trong mch in
Mch in c ghp ni vi my tnh thng qua vi mch MAX232 qua hai chn 25 v 26 ca PIC (RC6 v RC7). Qua ghp ni ny ta c th ly d liu v thng tin cuc gi t EEPROM qua my tnh. 3.1.7 Khi ngun nui Dng IC 7805 to ngun +5V n nh cp ton mch cho mch. T C2 v C3 lc nhiu, diode D3 c nhim v bo ngun. S nguyn l nh hnh di:
Hnh 3.6: S nguyn l ngun nui ca mch
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3.2 THC NGHIM 3.2.1 Thit k mch in Trong phn ny em s dng cng c phn mm Altium Designer 6.7.9346 thc hin, n l mt phn mm pht trin ca protel. Hnh di l bn mch in sau khi v hon chnh :
Hnh 3.7: Bn mch in
Bn mch in c trnh by: cc jack cm (2 jack RJ11, 1 jack cm ngun, cng kt ni vi my tnh DB9), n bo ngun v khi ngun nui cp ngun +5V cho ton mch c sp trn cng thun tin cho vic ghp ni. Tip theo l khi gii m DTMF, ng h thi gian thc v EEPRROM. Cui cng l vi iu khin PIC16F877A, ngun d phng cho ng h thi gian thc trong trng hp mt in v jack cm dng np vi iu khin ngay trn mch (ICSP)
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Bn mch sau khi hn linh kin y :
Hnh 3.8: Bn mch khi hn linh kin
3.2.2 Lp trnh Vic lp trnh cho PIC s dng ngn ng C chun, vit bng phn mn CCS PIC C Compiler phin bn 3.249. Phn mm CCS h tr mt th vin vi kh nhiu hm con nn vic lp trnh tr nn d dng hn. Giao din ca phn mm kh p v c th s dng mt cch d dng. Thm vo CCS cung cp mt trang web c code chun tham kho: ccsinfo.com/forum . Giao din ca PIC C Compiler:
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Hnh 3.9: Giao din ca PIC C Compiler
Giao din phn mm np cho PIC WinPic800:
Hnh 3.9: Giao din phn mm np WinPic800
Em s dng phn mm WinPic800 np cho PIC ngay trn mch theo chun ICSP. Khi trnh dch CCS dnh d liu thnh file *.hex, sau WinPic800
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s gi t my tnh ti vi iu khin, vi iu khin s nhn d liu thng qua cng truyn thng ni tip v ghi ln b nh chng trnh. Lu lp trnh:
Bt u
c thi gian
Hin th thi gian ln LCD
STD= 1
Sai
Lu vo EEPROM
Hin th s in thoai lnLCD
Hnh 3.8: Lu lp trnh
3.2.3 L do chn PIC 16F877A Ngy nay vi iu khin c s dng rt nhiu trong lnh vc iu khin t ng m vi iu khin c rt nhiu loi nh: dng 89 hay AVR, PIC, PSOCEm chn PIC m ko chn AVR hay 89, bi nu so vi 89 v mt tnh nng v cng nng th c th xem PIC vt tri hn rt nhiu so vi 89 vi nhiu module c tch hp sn nh ADC10 BIT, PWM 10 BIT, PROM 256 BYTE, COMPARATER,
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VERF COMPARATERNhng v mt gi c th c i cht chnh lch nh gi 1 con 89S52 khong 20.000 th PIC16F877A l 60.000 nhng khi so snh nh th th em li phn linh kin cho vic thit k mch nu nh dng 89 mun c ADC em phi mua con ADC chng hn nh ADC0808 hay 0809 vi gi vi chc nghn v b opamp th khi s dng PIC n tch hp cho em sn cc module , c ngha l em khng cn mua ADC, opam, EPPROM v PIC c sn trong n ri ngoi ra em s gp nhiu thun li hn trong thit k board, khi board mch ca em s nh gn v p hn d thi cng hn rt nhiu, nn tnh v gi c tng cng cho n lc thnh phm th PIC c th xem nh r hn 89, mt c im na l tt c cc con PIC s dng th u c chun PI tc chun cng nghip thay v chun PC (chun dn dng) nu mua mt con 89PI th lc gi c gia PIC v 89PI th chnh lch rt nhiu ri. V gn y Philip cng ra 1 dng 89VRD mi b sung thm chc nng PWM nhng gi c cn rt t m vn cn thiu nhiu tnh nng so vi PIC. Ngoi ra PIC cn c rt nhiu nh sn xut phn mm to ra cc ngn ng h tr cho vic lp trnh ngoi ngn ng Asembly ra cn c th s dng ngn ng C th s dng CCSC, HTPIC hay s dng Basic th c MirkoBasic v cn nhiu chng trnh khc na h tr cho vic lp trnh bn cnh ngn ng kinh in l asmbler. Tm li em chn PIC bi n c pht trin lu i v c rt nhiu dng sn phm cho em la chn nh dng basic PIC 12 midrange l PIC16, hi end l PIC18, gn y l DS PIC, vi nhng ai quan tm n lp trnh iu khin t xa th c IF PIC v trong mi dng sn phm y li c rt nhiu loi chip p ng mi nhu cu ca em. C th ni 1 dng ph thng v p ng gn nh hu ht cc cng dng nn em chn l PIC16F877A. PIC 16F877A l loi c 40 chn, vi 5 cng vo ra l Port A(RA0RA5), Port B(RB0RB7), Port C(RC0RC7), Port D(RD0RD7), Port E(RE0RE2). + Tp lnh lp trnh ch c 35 lnh rt d nh v d hc. +8K Flash Rom. +368 Byte Ram. + 5 Port iu khin vo ra vi tn hiu i khin c lp, vi dng ra cao c th kch trc tip cc transirtor m khng cn qua b buffer. + 2 b inh thi timer0 va timer2 8 bit c th lp trnh c.
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+ 1 b nh thi timer1 16 bit c th hot ng trong ch sleep vi ngun xung clock ngoi. + 2 b module CCP (bao gm Capture bt gi, Compare so snh, PWM iu ch xung 10 bit). + 1 B ADC vi 8 knh ADC 10 bit . + 2 b so snh tng t hot ng c lp. + B gim st nh thi Watchdogtimer. + 1 cng song song 8 bit vi cc tn hiu iu khin. + 1 cng ni tip. + H tr giao tip I2C. + 15 ngun ngt. + Ch sleep tit kim nng lng. + Np chng trnh bng cng ni tip ICSP. + Tn s hot ng ti a l 20MHz 3.2.4 S thc nghim vi MT8870
Hnh 3.9: S thc nghim vi IC MT8870
Khi khng bm nt:
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TOE: Logic 0 Q3: Logic 0 Q2: Logic 0 Q1: Logic 0
Khi bm v gi nt 1: TOE: Logic 1 Q4: Logic 0 Q3: Logic 0 Q2: Logic 0 Q1: Logic 1 Th nt 1: TOE: Logic 0 Q4: Logic 0 Q3: Logic 0 Q2: Logic 0 Q1: Logic 1 Khi bm v gi nt 2: TOE: Logic 1 Q4: Logic 0 Q3: Logic 0 Q2: Logic 1 Q1: Logic 0 Th nt 2: TOE: Logic 0 Q4: Logic 0
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Q3: Logic 0 Q2: Logic 1 Q1: Logic 0 Khi bm s in thoi th StD c mc logic l 1, cn khi ta khng bm th StD c mc logic l 0. Cn cc chn Q1, Q2, Q3, Q4 l m BCD ca s in thoi. 3.2.5 Kt qu thc nghim v hng pht trin Trong qu trnh thc hin n em tm hiu s lc v in thoi v tn hiu DTMF. Mt chic in thoi bn thng thng s dng mi su cp tn hiu DTMF biu din cc s bm trn bn phm bm, ngha l mt phm bm c miu t bi hai tn hiu c tn s khc nhau. Do vy em tm hiu kh k v tn hiu DTMF v n l c s l thuyt kh quan trng trong ti ny. V vic gii m DTMF em s dng vi mch MT8870, y l vi mch chuyn dng gii m tn hiu DTMF. Vi mch MT8870 ly tn hiu DTMF t ng in thoi vo chn hai (IN-) cn tn hiu c gii m thnh m BCD 4 bit th sut ra bn chn Q1,Q2,Q3,Q4, chn StD l chn bo khi c nhn phm. Em cng tm hiu v lm ch c vi iu khin PIC 16F877A ca hng microchip. Vi iu khin PIC 16F887A c tch hp kh nhiu module, thm vo l c th s dng kh nhiu ngn ng lp trnh. Khi hin th thng tin em s dng LCD 1602 (2 dng, 16 k t). Em thc hin c vic hin th ln mn hnh LCD, lp trnh hin th ln LCD kh n gin v c hm con trong th vin ca CCS. Mn hnh LCD c chia lm hai dng, dng u tin c a ch bt u l 0x80 v a ch kt thc l 0x8f, cn dng th hai c a ch bt u l 0xc0 v a ch kt thc l 0xcf. Em thit k v v mch in bng phn mm Altium Designer. Lp trnh cho PIC em s dng ngn ng C chun, vit bng phn mn CCS PIC C Compiler phin bn 3.249. Phn mm CCS h tr mt th vin vi kh nhiu hm con nn vic lp trnh tr nn d dng hn. Giao din ca phn mm kh p v c th s dng mt cch d dng. Thm vo CCS cung cp mt trang web c code chun tham kho: ccsinfo.com/forum . Em s dng phn mm WinPic800 np chng trnh vo vi iu khin PIC Tuy nhin vn cn mt s mt em cha hon thin v em c d nh pht trin theo hng sau:
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1.Ci tin khi giao tip vi my tnh c d liu bng cch ghp ni vi my tnh qua cng ni tip RS-232 bng cch ghp ni vi th nh MMC. 2.Chnh v s dng kt ni vi th MMC nn cn s dng rt nhiu b nh RAM ca vi iu khin nn cn thay th PIC 16F877A bng mt vi iu khin c b nh RAM c dung lng ln hn nh PIC 18FX. ---------------------------------------------------------------------
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PH LC thc hin lun vn trn em phi tm hiu mt s linh kin bng cch c mt datasheet ca cc linh kin . Di y l datasheet ca cc linh kin. 1. Tng quan v vi iu khin PIC 16F877A 1.1 S khi ca PIC16F877A v bng m t chc nng cc chn ca PIC16F877A
Hnh 1: PIC 16F877A
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Hnh 2: S khi ca PIC16F877A
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Bng m t chc nng cc chn ca PIC16F877A

Pin Name DIP Pin# PLCC Pin# QFT Pin# I/O/P Type Buffer Type Description u vo ca xung dao ng thch anh/ng vo xung clock ngoi u ra ca xung dao ng thch anh. Ni vi thch anh hay cng hng trong ch dao ng ca thch anh.Trong ch RC, ng ra ca chn OSC2. Ng vo ca Master Clear(Reset) hoc ng vo in th c lp trnh. Chn ny cho php tn hiu Reset thit b tc ng mc thp. PORTA l port vo ra hai chiu. RA0 c th lm ng vo tung t th 0. RA1 c th lm ng vo tung t th 1 RA2 c th lm ng
OSC1/CLKIN
13
14
30
ST/CMOS(4 )
OSC2/CLKOUT
18
ML CR
/Vpp
18
I/P
ST
RA0/AN0
19
I/O
TTL
RA1/AN1
20
I/O
TTL
I/O
TTL
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RA2/AN2/VREF 21 vo tung t 2 hoc in p chun tng t m. RA3 c th lm ng vo tung t 3 hoc in p chun tng t dng. RA4 c th lm ng vo xung clock cho b nh thi Timer0. RA5 c th lm ng vo tng t th 4
RA3/AN3/VREF +
22
I/O
TTL
RA4/T0CKI
23
I/O
ST
RA5/ S /AN4 S
24
I/O
TTL
RB0/INT RB1 RB2
33 34 35
36 37 38
8 9 10
I/O I/O I/O
TTL/ST(1) TTL TTL
PORTB l port hai chiu. RB0 c th lm chn ngt ngo
RB3/PGM
36
39
11
I/O
TTL
RB3 c th lm ng vo ca in th c lp trnh mc thp.
RB4 RB5 RB6/PGC
37 38 39
41 42 43
14 15 16
I/O I/O I/O
TTL TTL TTL/ST(2)
Interrupt-on-change pin. Interrupt-on-change pin. Interrupt-on-change pin hoc
RB7/PGD
40
44
17
I/O
TTL/ST(3)
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In-Crcuit Debugger pin . Serial programming clock. Interrupt-on-change pin hoc In-Crcuit Debugger pin . Serial programming data . PORTC l port vo ra hai chiu. RC0/T1OSO/T1CKI 15 16 32 I/O ST RC0 c th l ng vo ca b dao ng Timer1 hoc ng xung clock cho Timer1 RC1 c th l ng vo ca b dao ng Timer1 hoc ng vo Capture2/ng ra compare2/ng vo PWM2. RC2 c th ng vo capture1/ng ra compare1/ng vo PWM1 RC3 c th l ng vo xung Clock ng b ni tip/ng ra trong c hai ch SPI v I2C RC4 c th l d liu
RC1/T1OSI/CCP2
16
18
35
I/O
ST
RC2/CCP1
17
19
36
I/O
ST
RC3/SCK/SCL
18
20
37
I/O
ST
RC4/SDI/SDA
23
25
42
I/O
ST
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bn trong SPI(ch SPI) hoc d liu I/O(ch I 2 C). RC5 c th l d liu ngoi SPI(ch SPI) RC6 c th l chn truyn khng ng b USART hoc ng b vi xung ng h RC7 c th l chn nhn khng ng b USART hoc ng b vi d liu.
RC5/SDO
24
26
43
I/O
ST
RC6/TX/CK
25
27
44
I/O
ST
RC7/RX/DT
26
29
I/O
ST
RD0/PSP0 RD1/PSP1 RD2/PSP2 RD3/PSP3 RD4/PSP4 RD5/PSP5 RD6/PSP6 RD7/PSP7
19 20 21 22 27 28 29 30
21 22 23 24 30 31 32 33
38 39 40 41 2 3 4 5
I/O I/O I/O I/O I/O I/O I/O I/O
ST/TTL(3) ST/TTL(3) ST/TTL(3) ST/TTL(3) ST/TTL(3) ST/TTL(3) ST/TTL(3) ST/TTL(3) PORTE l port vo ra hai chiu. PORTD l port vo ra hai chiu hoc l parallel slave port khi giao tip vi bus ca b vi x l.
RE0/ R /AN5 D
25
I/O
ST/TTL(3)
RE0 c th iu khin vic c parrallel slave port hoc l ngoc vo tng t th 5. RE1 c th iu khin vic ghi parallel slave port hoc l ng vo
RE1/ W /AN6 R
10
26
I/O
ST/TTL(3)
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tng t th 6. RE2 c th iu khin vic chn parallel slave port hoc l ng vo tng t th 7 Cung cp ngun dng cho cc mc logicv nhng chn I/O. Nhng chn ny khng c ni bn trong v n c trng
RE2/ C /AN7 S
10
11
27
I/O
ST/TTL(3)
Vss VDD
12, 31 11, 32
13, 34 12, 35
7, 28 6, 29
P P
NC
1,17,28, 40
12,13 33, 4
Ghi ch: I = input O = output I/O = input/output P = power - = Not used TTL = TTL input ST = Schmitt Trigger input 1: L vng m c ng vo Trigger Schmitt khi c cu hnh nh ngt ngoi. 2: L vng m c ng vo Trigger Schmitt khi c s dng trong ch 9 Serial Programming. 3: L vng m c ng vo Trigger Schmitt khi c cu hnh nh ng vo ra mc ch chung v l ng vo TTL khi s dng trong ch Parallel Slave Port (cho vic giao tip vi cc bus ca b vi x l). 4: L vng m c ng vo Trigger Schmitt khi c cu hnh trong ch dao ng RC v mt ng vo CMOS khc. 1.1.2 T chc b nh C 3 khi b nh trong cc vi iu khin h PIC16F87X. B nh chng trnh v b nh d liu c nhng bus ring bit c th truy cp ng thi v s c trnh by chi tit trong phn ny.
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Hnh 3: Ngn xp v bn b nh chng trnh PIC16F877A
1.2 T chc ca b nh chng trnh Cc vi iu khin h PIC16F877A c b m chng trnh 13 bit c kh nng nh v khng gian b nh chng trnh ln n 8Kb.Cc IC PIC16F877A c 8Kb b nh chng trnh FLASH, cc IC PIC16F873/874 ch c 4 Kb.Vect RESET t ti a ch 0000h v vect ngt ti a ch 0004h. 1.3 T chc b nh d liu B nh d liu c chia thnh nhiu dy v cha cc thanh ghi mc ch chung v cc thanh ghi chc nng c bit.BIT RP1 (STATUS <6>) v RP0 (STATUS <5>) l nhng bit dng chn cc dy thanh ghi.
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RP1:RP0 00 01 10 11
Bank 0 1 2 3
Chiu di ca mi dy l 7Fh (128 byte).Phn thp ca mi dy dng cha cc thanh ghi chc nng c bit.Trn cc thanh ghi chc nng c bit l cc thanh ghi mc ch chung, c chc nng nh RAM tnh.Thng th nhng thanh ghi c bit c s dng t mt dy v c th c nh x vo nhng dy khc gim bt on m v kh nng truy cp nhanh hn. 1.3.1 Cc thanh ghi mc ch chung Cc thanh ghi ny c th truy cp trc tip hoc gin tip thng qua thanh ghi FSG (File Select Register).
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Hnh 4: Cc thanh ghi ca PIC16F877A
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1.3.2 Cc thanh ghi chc nng c bit Cc thanh ghi chc nng c bit (Special Function Resgister) c s dng bi CPU v cc b nh ngoi vi iu khin cc hot ng c yu cu ca thit b.Nhng thanh ghi ny c chc nng nh RAM tnh.Danh sch nhng thanh ghi nay c trnh by bng di.Cc thanh ghi chc nng c bit c th chia thnh hai loi: phn trung tm (CPU) v phn ngoi vi. 1.3.3 Cc thanh ghi trng thi
Hnh 5: Thanh ghi trng thi (a ch 03h, 83h, 103h, 183h)
Thanh ghi trng thi cha cc trng thi s hc ca b ALU, trng thi RESET v nhng bit chn dy thanh ghi cho b nh d liu. Thanh ghi trng thi c th l ch cho bt k lnh no, ging nh nhng thanh ghi khc. Nu thanh ghi trang thi l ch cho mt lnh m nh hng n cac c Z, DC hoc C, v sau nhng bit ny s c v hiu ho. Nhng bit ny c th set hoc xo tu theo trng thi logic
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O ca thit b. Hn na hai bit T v PD th khng cho php ghi, v vy kt qu ca mt tp lnh m thanh ghi trng thi l ch c th khc hn d nh .V d, CLRF STATU s so 3 bit cao nht v t bit Z. Lc ny cc bit ca thanh ghi trng thi l 000u u1uu (u = unchanged). Ch c cc lnh BCF, BSF, SWAPF v MOVWF c s dng thay i thanh ghi trng thi, bi v nhng lnh ny khng lm nh hng n cc bit Z, DC hoc C t thanh ghi trng thi . i vi nhng lnh khc th khng nh hng n nhng bit trng thi ny.
1.4 Cc cng ca PIC 16F877A 1.4.1 PORTA v thanh ghi TRISA
Hnh 6: S khi ca chn RA3:RA0 v RA5
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Hnh 7: S khi ca chn RA4/T0CKI
1.4.2 PORTB v thanh ghi TRISB PORTB c rng 8 bit, l port vo ra hai chiu. Ba chn ca PORTB c a hp vi chc nng lp trnh mc in th thp (Low Voltage Programming ) : RB3/PGM, RB6/PGC v RB7/PGD. Mi chn ca PORTB c mt in tr ko ln yu th bn trong. Mt bit iu khin c th m tt c nhng in tr ko ny ln. iu ny c thc hin bng cch xo bit RBPU (OPTION_REG<7>). Nhng in tr ny b cm khi c mt Power-on Reset. Bn chn ca PORTB:RB7 n RB4 c mt ngt thay i c tnh .Ch nhng chn c cu hnh nh ng vo mi c th gy ra ngt ny. Nhng chn vo (RB7:RB4) c so snh vi gi tr c cht trc trong ln c cui cng ca PORTB. Cc kt qu khng ph hp ng ra trn chn RB7:RB4 c or vi nhau pht ra mt ngt Port change RB. Vi c ngt l RBIF (INTCON<0>). Ngt ny c th nh thc thit bo t trng thi ngh (SLEEP). Trong th tc phc v ngt ngi s dng c th xo ngt theo cch sau: a) c hoc ghi bt k ln PORTB. iu ny s kt thc iu kin khng ho hp. b) Xo bit c RBIF.
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Hnh 8: S khi cc chn RB3:RB0
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Hnh 9: S khi cc chn RB7:RB4
1.4.3 PORTC v thanh ghi TRISC PORTC c rng l 8 bit, l port hai chiu. Thanh ghi d liu trc tip tng ng l TRISC. Cho tt c cc bit ca TRISC l 1 th cc chn tng ng PORTC l ng vo. Cho tt c cc bit ca TRISC l 0 th cc chn tng ng PORTC l ng ra. PORTC c a hp vi vi chc nng ngoi vi, nhng chn ca PORTC c m Trigger Schmitt ng vo. Khi b I2C c cho php, chn 3 v 4 ca PORTC c th cu hnh vi mc I2C bnh thng, hoc vi mc SMBus bng cch s dng bit CKE (SSPSTAT<6>) . Khi nhng chc nng ngoi vi c cho php, chng ta cn phi quan tm n vic nh ngha cc bit ca TRIS cho mi chn ca PORTC. Mt vi thit b ngoi vi khc ghi ln bit TRIS th to nn mt chn ng ra, trong khi nhng thit b ngoi vi khc ghi ln bit TRIS th s to nn mt
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chn ng vo. Khi nhng bit TRIS ghi b tc ng trong khi thit b ngoi vi c cho php, nhng lnh c-thay th-ghi (BSF, BCF, XORWF) vi TRISC l ni n cn phi c trnh. Ngi s dng cn phi ch ra vng ngoi vi tng ng m bo cho vic t TRIS bit l ng .
Hnh 10: S khi ca cc chn RC<4:3>
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Hnh 11: S khi ca cc chn RC<2:0> v RC<7:5>
1.4.4 PORTD v thanh ghi TRISD PORTD l port 8 bit vi m Trigger Schmitt ng vo. Mi chn c th c cu hnh ring l nh mt ng vo hoc ng ra. PORTD c th c cu hnh
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nh port ca b vi x l rng 8 bit (parallel slave port) bng cch t bit iu khin PSPMIDE (TRISE <4>). Trong ch ny, m ng vo l TTL .
Hnh 12: S khi ca PORTD (trong ch l port I/O)
1.4.5 PORTE v thanh ghi TRISE PORTE c ba chn (RE0/RD/AN5, RE1/WR/AN6, v RE2/CS/AN7) mi chn c cu hnh ring l nh nhng ng vo hoc nhng ng ra. Nhng chn ny c m Trigger Schmitt ng vo.Nhng chn ca PORTE ng vai tr nh nhng ng vo iu khin vo ra cho Port ca vi x l khi bit PSPMODE (TRISE <4>) c set. Trong ch ny, ngi s dng cn phi chc chn rng nhng bit TRISE <2:0> c set, v chc rng nhng chn ny c cu hnh nh nhng ng
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vo s.Cng bo m rng ADCON1 c cu hnh cho vo ra s. Trong ch ny, nhng m ng vo l TTL. Nhng chn ca PORTE c a hp vi nhng ng vo tng t, Khi c chn cho ng vo tng t, nhng chn ny s c gi tr 0.T RISE iu khin hng ca nhng chn RE ch khi nhng chn ny c s dng nh nhng ng vo tng t.Ngi s dng cn phi gi nhng chn c cu hnh nh nhng ng vo khi s dng chng nh nhng ng vo tng t.
Hnh 13: S khi ca PORTE (trong ch I/O port)
1.5 Hot ng nh thi 1.5.1 B nh thi TIMER0 B nh thi/b m Timer0 c cc c tnh sau:
B nh thi / b m 8 bit Cho php c v ghi
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Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni B chia 8 bit lp trnh c bng phn mm Chn xung clock ni hoc ngoi Ngt khi c s trn t FFh n 00h Chn cnh cho xung clock ngoi
Bn di l s khi ca b nh thi Timer0 v b chia dng chung vi WDT.
Hnh 14: S khi ca b nh thi Timer0 v b chia dng chung vi WDT
Ch nh thi (Timer) c chn bng cch xo bit T0CS (OPTION_REG<5>). Trong ch nh thi, b nh thi Timer0 s tng dn sau mi chu k lnh (khng c b chia). Nu thanh ghi TmR0 c ghi thi s tng s b ngn li sau hai chu k lnh. Ch m (Counter) c chn bng cch xo bit T0CS (OPTION_REG<5>). Trog ch m, Timer0 s tng dn mi cnh ln sung ca chn RA4/T0CKI. S tng cnh c xc nh bi bit Timer0 Source Edge
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Select, T0SE (OPTION_RE<4>). B chia ch c dng chung qua li gia b nh thi Timer0 v b nh thi Watchdog. B chia khng cho php c hoc ghi 1.5.1.1 Ngt Timer0 Ngt TMR0 c pht ra khi thanh ghi TMR0 trn t FFh n 00h. S trn ny s set bit T0IF (INTCON<2>). Ngt ny c th c giu i bng cch xa i bit T0IE (INTCON<5>) . Bit T0IF cn phi c xa trong chng trnh bi th tc phc v ngt ca b nh thi Timer0 trc khi ngt ny c cho php li. 1.5.1.2 S dng Timer0 vi xung clock ngoi Khi b chia khng c s dng, clock ngoi t vo th ging nh b chia ng ra. S ng b ca chn T0CKI vi clock ngoi c thc hin bng cch ly mu b chia ng ra trn chn Q2 v Q4. V vy thc s cn thit chn T0CKI mc cao trong t nht 2 chu k my v mc thp trong t nht 2 chu k my. 1.5.1 .3 B chia Thit b PIC16F87X ch c mt b chia m c dng chung bi b nh thi 0 v b nh thi Watchdog. Mt khi b chia c n nh cho b nh thi 0 th khng 1.5.2 B nh thi TIMER1 B nh thi 1 l mt b nh thi/b m 16 bit gm hai thanh ghi TMR1H (Byte cao) v TMR1L (byte thp) m c th c hoc ghi. Cp thanh ghi ny tng s m t 0000h n FFFFh v mt trn s xut hin khi c s chuyn s m t FFFFh xung 000h. ngt, nu c php c th pht ra khi c s m trn v c t bit c ngt TMR1IF. Ngt c th c php hoc cm bng cch t hoc xo bit cho php ngt TMR1IE. B nh thi Timer1 c th c cu hnh hot ng mt trong hai ch sau:

nh thi mt khong thi gian (timer) m s kin (Counter)
Vic la chn mt trong hai ch c xc nh bng cch t hoc xo bit iu khin TMR1ON.
---Bit 7 ---T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON Bit0
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Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni Bit 7-6 Khng c nh ngha Bit 5-4 bit chn b chia clock cho timer1 Bit 3 Bit 2 Bit 1 Bit 0 bit iu khin cho php b dao ng Timer1 bit iu khin clock ngoi Timer bit chn ngun clock cho Timer1 bit iu khin hot ng ca Timer1
1.5.2.1 Ch Timer Ch Timer c chn bng cch xo TMR1CS.Trong ch ny, Ngun clock t vo Timer l mch dao ng FOSC/4.Bit iu khin ng b khng b tc ng v clock ngoi lun lun ng b.
Hnh 15: Cnh tng timer1
1.5.2.2 Ch counter Trong ch ny, b nh thi tng s m qua clock ngoi.Vic tng xy ra sau mi cnh ln ca xung clock ngoi. B nh thi phi c mt cnh ln trc khi vic m bt u.
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Hnh 16: S khi b nh thi timer1
1.5.3 B nh thi TIMER2 B nh thi 2 l b nh thi 8 bit vi mt chia v mt b potscaler. N thng dng chung vi b CCP trong ch PWM (s c cp phn sau). Thanh ghi TMR2 c th c hoc ghi v c xo khi c bt k tn hiu reset no ca thit b B nh thi 2 c mt thanh ghi chu k 8 bit, PR2. B nh thi tng s m ln t 00h n gi tr c ghi trong thanh ghi TR2 v sau reset li gi tr 00h trong chu k k tip. PR2 l thanh ghi c th c hoc ghi. Gi tr trng hp trong thanh ghi TMR2 c i qua b postscaler 4 bit pht ra mt ngt TMR2 (c t bit c ngt TMR2IF). B nh thi 2 c th c tt (khng hot ng) bng cch xo bt iu khin TMR2ON gin thiu cng sut tiu tn ngun
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Hnh 17: S khi ca TIMER2
Hnh 18: T2CON: Thanh ghi iu khin Timer2 (a ch 12h)
2.1 MTD8870
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M-8870 (18 chn): l vi mch nhn tn hiu DTMF dng lc, tch v m ho. N lc tch s dng cng ngh switched capacitor. Vi mch MT8870 gii m s dng phng php m s digital counting pht hin v gii m DTMF thnh 1 m 4 bt. MT8870 s dng 1 dao ng thch anh 3.579545MHz
Hnh 19: S chn ca MTD8870
Pht hin quay s tng ng vi bt StD. Q1, Q2, Q3, Q4 l tn hiu DTMF c m ho li thnh m BCD
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Hnh 20: S khi ca MT8870
3. 1 ng h thi gian thc DS1307 3.1.1 C ch hot ng v chc nng ca DS1307
Hnh 21: DS1307
Vcc: ni vi ngun X1, X2: ni vi thch anh 32, 768 kHz Vbat: u vo pin 3V GND: t SDA: chui data SCL: dy xung clock SQW/OUT: xung vung/u ra driver DS1307 l mt IC thi gian thc vi ngun cung cp nh, dng cp nht thi gian v ngy thng vi 56 byte SRAM. a ch v dliu c truyn ni tip qua 2 ng bus 2 chiu. N cung cp thng tin v gi, pht, giy, th, gy, thng, nm. Ngy cui thng s t ng c iu chnh vi cc thng nh hn 31 ngy,
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bao gm c vic t ng nhy nm. ng h c th hot ng dng 24h hoc 12h vi ch th AM/PM. DS1307 c mt mch cm bin in p dng d cc in p li v t ng ng ngt vi ngun pin cung cp. DS 1307 hot ng vi vai tr slave trn ng bus ni tip. Vic truy cp c thi hnh vi ch th START v mt m thit b nht nh c cung cp bi a ch cc thanh ghi. Tip theo cc thanh ghi s c truy cp lin tc n khi ch th STOP c thc thi. S khi ca DS1307:
Hnh 22: S khi ca DS1307
M t hot ng ca cc chn: Vcc, GND: ngun mt chiu c cung cp ti cc chn ny. Vcc l u vo 5V. Khi 5 V c cung cp th thit b c th truy cp hon chnh v d liu c th c v vit. Khi pin 3 V c ni ti thit b ny v Vcc nh hn 1,25Vbat th qu trnh c v vit khng c thc thi, tuy nhin chc nng timekeeping khng b nh hng bi in p vo thp. Khi Vcc nh hn Vbat th RAM v timekeeper s c ngt ti ngun cung cp trong (thng l ngun 1 chiu 3V)
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Vbat: u vo pin cho bt k mt chun pin 3V . in p pin phi c gi trong khong t 2, 5 n 3V m bo cho s hot ng ca thit b. SCL(serial clock input): SCL c s dng ng b s chuyn d liu trn ng dy ni tip. SDA (serial data input/out): l chn vo ra cho 2 ng dy ni tip. Chn SDA thit k theo kiu cc mng h, i hi phi c mt in tr ko trong khi hot ng. SQW/OUT (square wave/output driver)- khi c kch hot th bit SQWE c thit lp 1, chn SQW/OUT pht i 1 trong 4 tn s (1Hz, 4kHz, 8kHz, 32kHz). Chn ny cng c thit k theo kiu cc mng h v vy n cng cn c mt in tr ko trong. Chn ny s hot ng khi c Vcc v Vbat c cp. X1, X2: c ni vi mt thch anh tn s 32, 768kHz.L mt mch to dao ng ngoi, hot ng n nh th phi ni thm 2 t 33pF Cng c DS1307 vi b to dao ng trong tn s 32, 768kHz, vi cu hnh ny th chn X1 s c ni vo tn hiu dao ng trong cn chn X2 th h. 3.1.2 S a ch RAM v RTC
Hnh 23: S a ch RAM v RTC Thng tin v thi gian v ngy thng c ly ra bng cch c cc byte thanh ghi thch hp. thi gian v ngy thng c thit lp cng thng qua cc byte thanh ghi ny bng cch vit vo nhng gi tr thch hp. ni dung ca cc thanh ghi di dng m BCD (binary coded decreaseimal). Bit 7 ca thanh ghi seconds l
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bit clock halt (CH), khi bit ny c thit lp 1 th dao ng disable, khi n c xo v 0 th dao ng c enable. Ch l phi enable dao ng trong sut qu trnh cu hnh thit lp (CH=0). Thanh ghi thi gian thc c m t nh sau:
Hnh 24: Thanh ghi thi gian thc
DS1307 c th chy ch 24h cng nh 12h. Bit th 6 ca thanh ghi hours l bit chn ch 24h hoc 12h. khi bit ny mc cao th ch 12h c chn. ch 12h th bit 5 l bit AM/PM vi mc cao l l PM. ch 24h th bit 5 l bit ch 20h (t 20h n 23h). Trong qu trnh truy cp d liu, khi ch th START c thc thi th dng thi gian c truyn ti mt thanh ghi th 2, thng tin thi gian s c c t thanh ghi th cp ny, trong khi ng h vn tip tc chy. Trong DS1307 c mt thanh ghi iu khin iu khin hot ng ca chn SQW/OUT Bit7 OUT Bit6 X Bit5 X Bit4 SQWE Bit3 X Bit2 X Bit1 RS1 Bit0 RS0
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OUT(output control):bit ny iu khin mc ra ca chn SQW/OUT khi u ra xung vung l disable. Nu SQWE=0 th mc logic chn SQW/OUT s l 1 nu OUT=1, v=0 nu OUT=0 SQWE(square wave enable): bit ny c thit lp 1 s enable u ra ca b to dao ng. Tn s ca u ra sng vung ph thuc vo gi tr ca RS1 v RS0
RS1 0 0 1 1
RS0 0 1 0 1
Tn s u ra SQW 1HZ 4, 096kHZ 8, 192kHZ 32, 768kHZ
DS1307 h tr bus 2 dy 2 chiu v giao thc truyn d liu. thit b gi d liu ln bus c gi l b pht v thit b nhn gi l b thu. thit b iu khin qu trnh ny gi l master. thit b nhn s iu khin ca master gi l slave. Cc bus nhn s iu khin ca master, l thit b pht ra chui xung clock(SCL), master s iu khin s truy cp bus, to ra cc ch th START v STOP S truyn nhn d liu trn chui bus 2 dy
Hnh 25: S truyn nhn d liu trn chui bus 2 dy
Tu thuc vo bit R/ w m 2 loi truyn d liu s c thc thi:
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Truyn d liu t master truyn v slave nhn: Master s truyn byte u tin l a ch ca slave. Tip sau l cc byte d liu . slave s gi li bit thng bo nhn c (bit acknowledge) sau mi byte d liu nhn c. d liu s truyn t bit c gi tr nht (MSB). Truyn d liu t slave v master nhn: byte u tin (a ch ca slave) c truyn ti slave bi master. Sau slave s gi li master bit acknowledge. tip theo slave s gi cc byte d liu ti master. Master s gi cho slave cc bit acknowledge sau mi byte nhn c tr byte cui cng, sau khi nhn c byte cui cng th bit acknowledge s khng c gi. Master pht ra tt c cc chui xung clock v cc ch th START v STOP. s truyn s kt thc vi ch th STOP hoc ch th quay vng START. Khi ch th START quay vng th s truyn chui d liu tip theo c thc thi v cc bus vn cha c gii phng. D liu truyn lun bt u bng bit MSB. 3.1.3 DS1307 c th hot ng 2 ch sau: Ch slave nhn(ch DS1307 ghi):chui d liu v chui xung clock s c nhn thng qua SDA v SCL. Sau mi byte c nhn th 1 bit acknowledge s c truyn. cc iu kin START v STOP s c nhn dng khi bt u v kt thc mt truyn 1 chui. nhn dng a ch c thc hin bi phn cng sau khi chp nhn a ch ca slave v bit chiu. Byte a ch l byte u tin nhn c sau khi iu kin START c pht ra t master. Byte a ch c cha 7 bit a ch ca DS1307, l 1101000, tip theo l bit chiu (R/ w) cho php ghi khi n bng 0. sau khi nhn v gii m byte a ch th thit b s pht i 1 tn hiu acknowledge ln ng SDA. Sau khi DS1307 nhn dng c a ch v bit ghi th master s gi mt a ch thanh ghi ti DS1307, to ra mt con tr thanh ghi trn DS1307 v master s truyn tng byte d liu cho DS1307 sau mi bit acknowledge nhn c. sau master s truyn iu kin STOP khi vic ghi hon thnh.
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Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni Hnh 26: Ch c ghi
Ch slave pht (ch DS1307 c): byte u tin slave nhn c tng t nh ch slave ghi. Tuy nhin trong ch ny th bit chiu li ch chiu truyn ngc li. Chui d liu c pht i trn SDA bi DS 1307 trong khi chui xung clock vo chn SCL. Cc iu kin START v STOP c nhn dng khi bt u hoc kt thc truyn mt chui. byte a ch nhn c u tin khi master pht i iu kin START. Byte a ch cha 7 bit a ch ca slave v 1 bit chiu cho php c l 1. Sau khi nhn v gii m byte a ch th thit b s nhn 1 bit acknowledge trn ng SDA. Sau DS1307 bt u gi d liu ti a ch con tr thanh ghi thng qua con tr thanh ghi. nu con tr thanh ghi khng c vit vo trc khi ch c c thit lp th a ch u tin c c s l a ch cui cng cha trong con tr thanh ghi.DS1307 s nhn c mt tn hiu Not Acknowledge khi kt thc qu trnh c.
c d liu-ch slave pht
Hnh 27: Ch c ghi
Thi gian thc hin vic c, ghi d liu ca DS1307: S ng b:
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Hnh 28: S ng b
c tnh v thi gian thc hin:
4.1 Gii thiu LCD Hu ht cc LCD hin th k t hin ti s dng b iu khin HD44780 ca hng Hitachi. B iu khin ny c th dng iu khin hin th LCD 16x1,
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16x2, 20x2, 20x4. Phn tip sau s gii thiu tng quan v LCD 16x2, cch ghp ni vi vi iu khin PIC v iu khin hin th. M t chn: LCD s dng trong kha lun l loi 2 dng v 16 ct, cho php hin hin th cng lc 32 k t. Vi 14 chn iu khin v 2 chn m rng, s chn c ch ra hinh.
Hnh 29: LCD 16 k t, 2 dng
Hnh 30: S chn ca LCD
Bng m t cc chn: S th t 1 2 3 4 Tn Vss Vcc Vee RS ngha t Cung cp ngun +5V iu khin tng phn 0 = u vo l lnh 1 = u vo l d liu
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5 6 7 8 9 10 11 12 13 14 RAM cha d liu hin th:
R/W EN D0 D1 D2 D3 D4 D5 D6 D7
0 = ghi ti LCD 1 = c t LCD Chn cho php ng d liu 0 (LSB) ng d liu 1 ng d liu 2 ng d liu 3 ng d liu 4 ng d liu 5 ng d liu 6 ng d liu 7 (MSB)
Display data RAM : lu tr d liu hin th vi m k t 8 bit. C dung lng 80 x 8 bit, hoc l 80 k t. Khi gi d liu n Display data RAM (DDRAM) gi tr s c hin th ngay trn LCD. Vi LCD 2 x 16, ch nhn thy c 32 k t, v th sau k t th 32 cho d c ghi ti DDRAM th gi tr cng khng c hin th ln LCD. Vng DDRAM khng dng cho vic hin th c th s dng lm b nh d liu thng thng. ROM pht k t: Mt cu hi t ra, khi gi mt gi tr ASCII n DDRAM lm th no k t hin th c trn LCD? Cu tr li l Character Generator ROM (CGROM). CGROM to ra kiu dng k t c th l 5x8 im hoc 5x10 im t 8 bit m k t. Ngi dng c th nh ngha kiu dng ca k t thng qua mt n chng trnh ROM. Bng di y cho hnh dng hin th ca k t trn mn hnh LCD theo kiu 5x8 im.
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Thanh ghi ch th v thanh ghi d liu: L hai thanh ghi 8 bit trong b iu khin HD44780. Thanh ghi ch th lnh (instruction register) cha cc lnh c gi t vi iu khin iu khin LCD nh lnh dch LCD, xa LCD, a ch LCD .v.v.. Thanh ghi d liu (data register) c s dng lu tr d liu hin th trn LCD. Khi tn hiu cho php gi ca LCD c xc nhn, d liu trn cc chn s c cht ti thanh ghi d liu v d liu ny sau s c t ng chuyn ti DDRAM v sau s hin th ln LCD.
-------------------------------------
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TI LIU THAM KHO
[1] Ng Din Tp , Vi x l trong o lng v iu khin. Nh xut bn khoa hc v k thut. H Ni 1999, ti bn 2001 [2] ] Ng Din Tp , Lp trnh ghp ni my tnh trong windows. Nh xut bn khoa hc v k thut. H Ni 2001 [3] http://catalogdatasheet.com [4] http://ccsinfo.com/forum [5] http://dientuvietnam.net [6] http://picvietnam.com
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Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

DTMF I2C ICSP MCLR PIC

: Liquid crytal Display : Serial Pripheral Interface

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

H Ni: ngy 07 thng 5 nm 2008 Sinh vin thc hin

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

nhim v ng m mch in khi c yu cu.

Triu ting lickic Chung Nt gt t hp B tr chiu di ng dy

Hnh 1.1: S khi ca in thoi

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

c t ti tng i, s dng ngun mt chiu 48V. +My in thoi t ng

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Trong DTMF mi ch s chn la c tn hiu di dng t hp ca hai tn s xoay chiu :

Hnh 1.3: Bn phm chun 12 nt

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Hnh 1.4: Bn phn m rng 16 phm

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

PHN 2: THC NGHIM CHNG 2 S KHI V NGUYN L HOT NG

Mch giao tip ng dy

Khi thu v gii m DTMF Khi ng h thi gian

Khi cm bin tn hiu nhc in thoi

Khi ghp ni my tnh

Hnh 2.1: S khi ca mch.

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

CHNG 3 THIT K MCH IN V THC NGHIM

Hnh 3.1: S nguyn l ca PIC16F877A trong mch

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Hnh 3.2: S nguyn l kt ni trong mch ca IC MT8870

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Hnh 3.3: S nguyn l kt ni trong mch in

3.1.4 Khi hin th thng tin

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

S nguyn l kt ni ca LCD1602 trong mch in:

Hnh 3.4: S nguyn l kt ni ca LCD1602 trong mch in

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Hnh 3.5: S nguyn l kt ni AT24C256 trong mch in

3.1.6 Khi ghp ni my tnh theo chun RS-232 S ghp ni:

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Hnh 3.6: S nguyn l kt ni MAX232 trong mch in

Hnh 3.6: S nguyn l ngun nui ca mch

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Hnh 3.7: Bn mch in

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Bn mch sau khi hn linh kin y :

Hnh 3.8: Bn mch khi hn linh kin

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Hnh 3.9: Giao din ca PIC C Compiler

Giao din phn mm np cho PIC WinPic800:

Hnh 3.9: Giao din phn mm np WinPic800

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Hin th thi gian ln LCD

Hin th s in thoai lnLCD

Hnh 3.8: Lu lp trnh

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

Hnh 3.9: S thc nghim vi IC MT8870

Khi khng bm nt:

Khoa TVT - Trng i Hc Cng Ngh - i Hc Quc Gia H Ni

TOE: Logic 0 Q3: Logic 0 Q2: Logic 0 Q1: Logic 0