An Introduction to the AP400 Array Processor _ ANALOGIC &An Introduction to the AP400 Array Processor PROPRIETARY NOTICE ‘Analogic’s AP40O-based Signal Processing Systems utilize designs for ‘hich patents have been issued andlor are pending. The information contained in this publication is derived in part from pro- prietary and patent data of the Analogic Corporation. This Information has been prepared for the express purpose of assisting operating and mainte- ‘nance personnel in the efficient use ofthe instrument described herein, Publication ofthis information does not convey any rights to use or reproduce It or to use for any purpose other than in connection with the installation, operation, and maintenance of the equipment described herein, “Analogic reserves the right to modify published specifications of equipment perfor ‘mance without prior published notice. Second Edition January, 1980 Copyright 1979 ANALOGIC CORPORATION Printed in U.S.A. All rights reserved,CONTENTS 1. INTRODUCTION & GENERAL DESCRIPTION 1.1 General 1.2. Physical Description 1.3. AP400 Card Set 1.4 AP400 Design Features 4.4.1 Operating Speeds 1.42 Arithmetic Pipeline 1.43 Memory 1.4.4 Control Processor 1.45 VO Assembly 1146 Software 1.5 Host-Array Processor Communications 15.1 General 1.5.2 General Sequence of Host-AP Operations 115.3 A View from inside the AP400 2. PRINCIPLES OF AP400 OPERATION 2.1. Introduction 22 System Architecture 2.2.1. Unit Functions 222 A400 Buses 2.3 AP4O0 Pipeline Arithmetic Unit (PA) 23.1 Pipeline Arithmetics 23.2 The AP4O0 Pipeline Stages 2.32.1 The Characterizer Stage 2322 The Multiplier Stage 2323 AccumulatoriLogic Stage 24 The Pipeline Arithmetic Command (PAC) 24.1 General 242. Elements of the PAC 24.3. Pipeline Timing 244 Pipeline Addressing 245 Coding Considerations 25 The Control Processor 25.1 Functional Overview 252. Program Memory 25.3. Register and Arithmetic & Logic Unit (RALU) 25.4 Stack Operation 255. Interrupts 26 Data Memory (OM) 2.7 Input/Output (V0) 27.1 UO Block Diagram (PDP-11 Interface) 272 Host/AP Communications 27.3 Programmed VO. 27.3.1 Immediate Commands 2.7.3.2 DATA (Non Immediate) Commands 2.7.4 Direct Memory Access (DMA) 2.75 Some Programming Considerations Implicit NO Transfer implementation 2.7.6 AP Interrupt of Host 28 Auxiliary Port 28.1 Sequence of Operations 282 Input Port 283 Output Port 284 Typical Use of the Auxiliary Port 3. SOFTWARE 3.1. Introduction 3.2 System Software 3.21 AP Manager 322. AP Driver 323 AP Executive 3.24 AP Service Subroutines 3.3 Application Software ‘3.3.1 General 332 Requirements 3.3.3 Function Naming Conventions 3.3.3.1 Calling the Host Function 3.3.32 Host Function Implementation (in Host Assembly Language) 3.3.3.4 AP Function implementation (in AP Assembly Language) 3.4 Utility Software 3.4.1 AP Assembler 342 AP Linker 3.43. Interactive Debugging Too! (107) 35. Diagnostics 35.1 General 35.2. Typical Diagnostic Program 3.6 Programming Considerations 36.1. Introduction 3662 Programming Level Choice 36.3 Number Formats 36.4 Block Floating Point Implementation 3665 Sample Host FORTRAN Program 3666 Table-Based Functions 4 HOST FUNCTION CALLS 4.1 Introduction 42. Function Control Blocks 42.1 FCB Structure 422 FCB Elements 4.3. Function Parameter List Types 44 Classification of Host Function Calls 4.4.1 AP Resource Management 442 AP Data Memory (Data Buffer) Management 44.3. Input-Output Operations 444 Logical Data Manipulation 445 Straight Forward Computation 446 Sophisticated Computation 45. Host Function Library 5 AP400 ASSEMBLY LANGUAGE & MACHINE IN- STRUCTIONS 5.1. Introduction 5.2. Instruction Execution Time 5.3 Program Memory 5.4 Assembly Language Instruction Listing 5.5 AP Assembly Language Program Example 55.1 Assembler Directives 5.52. Instructions 555.3. Data Storage Instructions 6 PAC LISTINGS, 6.1 Introduction 62. Listing Format 6.3. User Programming