Adder-Subtractor using

Structural Modeling

ECE 205 Lab

// This module structurally describes a Full-Adder FA.

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
module FA(
input a,b,Cin,
output S,Cout
);
assign S = a ^ b ^ Cin;
assign Cout = (a & b) | (a & Cin) | (b & Cin);
endmodule

//This module instantiates the Full-Adder FA and implements a XOR gate to

ECE 205 Lab

// to create a four bit Adder-Subtractor.

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
module Add_Sub4bit(
input [3:0]X,Y,
input Cin,
output [3:0]S,
output OV,
output Cout
);
wire c1, c2, c3;
wire [3:0]Z;
xor(Z[0],Y[0],Cin),
(Z[1],Y[1],Cin),
(Z[2],Y[2],Cin),
(Z[3],Y[3],Cin);
FA fa0(X[0],Z[0],Cin,S[0],c1);
FA fa1(X[1],Z[1],c1,S[1],c2);
FA fa2(X[2],Z[2],c2,S[2],c3);
FA fa3(X[3],Z[3],c3,S[3],Cout);
xor(OV,c3,Cout);
endmodule

Code to test four bit Adder-Subtractor

ECE 205 Lab

//This is the test bench code

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
module Add_Sub4bit_Sim();
reg [3:0]X,Y;
reg Cin;
wire [3:0]S;
wire Cout;
wire OV;
Add_Sub4bit uut(X,Y,Cin,S,OV,Cout);
initial begin
// These are our testing values.
//When c_in = 0, we're adding the x and y.
//When c_in = 1, we're subtracting y from x.
c_in = 1;y = 5;x = 15;
#1 c_in = 0;y = 5;x = 15;
#1 c_in = 0;y = 8;x = 7;
#1 c_in = 1;y = 10;x = 5;
#1 c_in = 0;y = 15;x = 15;
#1 c_in = 1;y = 10;x = 6;
#1 c_in = 0;y = 2;x = 3;
#1 c_in = 1;y = 5;x = 7;
#1 c_in = 0;y = -5;x = -1;
#1 c_in = 1;y = 2;x = 3;
#1 c_in = 1;y = -2;x = -3;
#1 c_in = 1;y = 2;x = -8;
end
endmodule

RESULT ANALYSIS:

ECE 205 Lab

Unsigned
Numbers
15 - 5=1A
15 + 5=14
7 + 8=0F
5 - 10=0B
15 + 15=1E
6 - 10=0C

Signed
Numbers
3 + 2=05
7 - 5=12
-1 + -5=1A
3 - 2=11
-3 - -2=0F
-8 - 2=16

ECE 205 Lab