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H-3282
B.E./B.Tech.
DEGREEEXAMINATION,NOVEMBEWDECEMBER
2007.
Third Semester
(Regulation 2004)
Electronics and Communication Engineering
EC 1201- DIGITAL ELECTRONICS
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N.
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PARTA-(fOx2=20marks)
2.
3.
4.
5.
6.
7.
8..
What is Race?
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10.
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1.
PARTB-(5x16=80marks)
11. (a)
(i)
(ii)
(iii)
(iv)
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(4)
Or
(b)
(i)
(ii)
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((A+B+C)D)'
(i)
(8)
(ii)
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12.
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Z = (A'+ B) (A + B).
(i)
(ii)
X=(AB+C)'D+E.
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Draw the logic syrnbol of a XNOR gate and give its truth table.
G)
(a)
Design a 3 bit binary counter using T flip flop that has a repeated
sequenceof six states.000 - 001 - 010 - 100 - 101 - 110.Give the state
(16)
table, state diagram and logic diagram.
Or
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(b)
(16)
00
000
00
101
01
001
01
100
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010
101
011
100
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14. (a)
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Implication table.
(ii)
Types of ROM's.
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(a)
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(16)
(8)
(8)
Or
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15.
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N.
The circuit has two inputs T (toggle) and C (Clock) and one output Q. The
output state is complemented if T = 1 and clock c changes from 1 to 0
(negative edge triggering) otherwise, under any other input condition, the
output Q remains unchanged. Derive the Primitive flow table and
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(b)
(16)
(16)
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