5

X'TAL
14.318MHZ

P33

CLOCK GENERATOR
SELGO: SLG8SP512K05

FSB

TVOUT
CRT

P37

CPU

Merom 479
uFCPGA P3,P4

P2

+1.2V/+1.25V/1.5V/2.5V

VCORE(ISL6262A)

ZD1(CHAPALA) SYSTEM BLOCK DIAGRAM

Thermal Sensor

BATTERYCHARGER
(ISL6251)

5V/3.3V (ISL6236)
P3

P33

667/800 Mhz

P32

DISCHARGE

+1.8V / +1.05V

P19

TFT LCD Panel

NB
Crestline
PM965

VGA
LVDS

WXGA
WSXGA+
WUXGA

Dual Channel DDR2

533/667 MHz

PCI-Express 16X Lan

P5,P6,P7,P8,P9,P10,P11

X4 DMI interface

DVI
LVDS
VGA/TV out

P24

MXM-NB8P-GS
USB6
( nVidia )
VRAM 256M Mini Card /
VRAM 512M
WLAN / 3G(TV)
P17

SATA0
SATA1

ODD (PATA)

PATA

P24

Bluetooth
USB4

USB 2.0
Azalia

P21

PCI-Express

SB
ICH8M

PCIE-2

USB7

P23

PCIE-4

P29

PCIE-1

PCIE-5

PCIE-6

BROADCOM
1394
+Cardreader
Controller

Int MIC

P27

10/100/1G LAN
5787M
P20

P27

R5C832/833

LPC

Azalia Audio
Controller
ALC268&888 P26

Audio Amplifier

X'TAL
25M

X'TAL24.576MHZ

P12,P13,P14,P15
X'TAL
32.768KHZ

P21

Robson

New Card

PCI Bus

P25

CCD

USB5

P22

USB Port x 4
USB0~3

P35,36

P16

P18

HDD (SATA)

P37

DDRII
SO-DIMM 0
SO-DIMM 1

X'TAL
32.768K

P28

Transformer
P20

EC (WPC8769LDG)

RJ45
P31

P21

IEEE 1394 Port

Media Card Reader

P28

P28

MIC Jack

P27

Line in

P27

Fan Header
P21,P30

SPI ROM
VR

P31

P26
Connector

BOM MARK
A

Speaker

Phone Jack

P27

P27

MDC 1.5

EV@ EXT VGA

Touch Pad

P26

CIR

P30

IV@ INT VGA

268@ AUDIO 268

P21

888@ AUDIO 888

PROJECT : ZD1

K/B COON.

Quanta Computer Inc.

P30

Size

Document Number

Rev
E

Block Diagram
Date:
5

Wednesday, April 25, 2007

Sheet
1

of

38

Clock Generator
Change list:
B-test
1.Change U31 P/N to ALPRS365K13 (ICS)
+3V
+3V

+3V

+3V_VDD_A

R205
BKP1608HS181-T
C347

C349 C340 C352 C362 C342 C345 C339

4.7U/10V

.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
10U/6.3V

R435
*10K_4

R443
*10K_4

PCI_CLK_SIO

PCLK_ICH

R439
10K_4

+1.25V

R220
BKP1608HS181-T

R207
10K_4

+1.25V_VDD
U31

+3V_VDD_A
C355 C350 C375 C372 C353 C360 C359 C358

PCI_CLK_SIO

<13> PCLK_ICH

<14> CLKUSB_48

C: For EMI solution

MCH_BSEL1

R206

0_4

R431

2
9
16
39
55
VDD_A_REF 61
VDD_A_48

VDD_PCI
VDD_48
VDD_PLL3
VDD_SRC
VDD_CPU
VDD_REF

<14> 14M_ICH

*30P/50V_4

<check list>
XTAL length < 500mils
C565

R447

33_4

FSA

10
57

USB_48MHz/FS_A
FS_B/TEST_MODE

R423

33_4

FSC

62

REF/FS_C/TEST_SEL

3 IV@0X2 DREFCLK_R
DREFCLK#_R
1

CPU Clock select

<3> CPU_BSEL0

+1.05V

<3> CPU_BSEL1

PM_STPCPU# <14>
PM_STPPCI# <14>
CK_PWRGD <14>
CLK_CPU_BCLK_R
CLK_CPU_BCLK#_R
CLK_MCH_BCLK_R
CLK_MCH_BCLK#_R
PCIE_CLK_RBS_R
PCIE_CLK_RBS#_R

<3> CPU_BSEL2

+1.05V

2 0X2
4
2 0X2
4
2 0X2
4

RP45 3
1

4 IV@0X2
2

SRC_2
SRC_2#
SRC_3/CLKREQ_C#
SRC_3#/CLKREQ_D#
SRC_4
SRC_4#
SRC_6
SRC_6#
SRC_7/CLKREQ_F#
SRC_7#/CLKREQ_E#
SRC_9
SRC_9#
SRC_10
SRC_10#
SRC_11/CLKREQ_H#
SRC_11#/CLKREQ_G#

21
22
24
25
27
28
41
40
44
43
30
31
34
35
33
32

CLK_PCIE_SATA_R
CLK_PCIE_SATA#_R
CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R
CLK_PCIE_MINI1_R
CLK_PCIE_MINI1#_R
CLK_PCIE_ICH_R
CLK_PCIE_ICH#_R
PECLK_VGA_R
PECLK_VGA#_R
CLK_PCIE_NEW_C_R
CLK_PCIE_NEW_C#_R
CLK_PCIE_3GPLL_R
CLK_PCIE_3GPLL#_R
CLK_PCIE_TV_R
CLK_PCIE_TV#_R

RP47 3
1
RP49 3
1
RP51 3
1
RP50 1
3
RP48 1
3
RP53 3
1
RP52 3
1
RP36 3
1

4
2
4
2
4
2
2
4
2
4
4
2
4
2
4
2

SCL
SDA

CLK_DREFSSCLK <7>
CLK_DREFSSCLK# <7>

0X2

PCLK_DEBUG

2.2K_4

CLKUSB_48

MCH_BSEL2 R424

10K_4

FSC

CLK_PCIE_SATA <12>
CLK_PCIE_SATA# <12>
CLK_PCIE_LAN <20>
CLK_PCIE_LAN# <20>
CLK_PCIE_MINI1 <22>
CLK_PCIE_MINI1# <22>
CLK_PCIE_ICH <13>
CLK_PCIE_ICH# <13>
CLK_MXM <17>
CLK_MXM# <17>
CLK_PCIE_NEW_C <23>
CLK_PCIE_NEW_C# <23>
CLK_PCIE_3GPLL <7>
CLK_PCIE_3GPLL# <7>
CLK_PCIE_TV <22>
CLK_PCIE_TV# <22>

0X2
0X2
0X2
EV@0X2
0X2
0X2
0X2

Clock Gen I2C

+3V

Q27
RHU002N06
3

<14,16,22,23> PDAT_SMB

CG_XOUT

Main: ICS9LPRS365BGLFT:ALPRS365K13
SLG8SP512T: AL8SP512K05

R455

0_4

R456

*56_4

R450

*1K_4

R451

0_4

R429

10K_4

10K_4

CGDAT_SMB

CGCLK_SMB

MCH_BSEL0

<14,16,22,23> PCLK_SMB

MCH_BSEL0 <7>

BSEL Frequency Select Table

MCH_BSEL1

MCH_BSEL1 <7>

FSC

FSB

FSA

Frequency

266Mhz

133Mhz

166Mhz

200Mhz

400Mhz

R449

*0_4

R454

*1K_4

R425

0_4

Reserved

R427

*0_4

100Mhz

R426

*1K_4

333Mhz

R428

+3V
Q28
RHU002N06

ICS9LPRS365BGLFT

MCH_BSEL2

MCH_BSEL2 <7>

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Rev
E

CLOCK GENERATOR CK505 W/REGULATOR

Date:

10K_4

CLK_DREFSSCLK_R
CLK_DREFSSCLK#_R

SRC_0/DOT_96
SRC_0#/DOT_96#

R433

MCH_BSEL0 R446

+3V

CLK_CPU_BCLK <3>
CLK_CPU_BCLK# <3>
CLK_MCH_BCLK <5>
CLK_MCH_BCLK# <5>
PCIE_CLK_RBS <29>
PCIE_CLK_RBS# <29>

48

+1.05V

RP42 1
3
RP44 1
3
RP46 1
3

17
18

64
63

VSS_PCI
VSS_48
VSS_I/O
VSS_PLL3
VSS_SRC_1
VSS_SRC_2
VSS_SRC_3
VSS_CPU
VSS_REF

+1.25V_VDD

LCDCLK/27M
LCDCLK#/27M_SS

13
14

8
11
15
19
23
29
42
52
58

Y4
14.318MHz

33P/50V_4

54
53
51
50
47
46

XTAL_OUT
CPU_0
XTAL_IN
CPU_0#
PCI_0/CLKREQ_A#
CPU_1_MCH
PCI_1/CLKREQ_B#
CPU_1_MCH#
PCI_2
SRC_8/CPU_ITP
PCI_3
SRC_8#/CPU_ITP#
^PCI_4/LCDCLK_SEL
PCIF_5/ITP_EN
NC

CG_XIN

33P/50V_4

37
38
56

R430
R432
R434
R436
R440
R444

CGCLK_SMB
CGDAT_SMB

C563

CPU_STOP#
PCI_STOP#
CKPWRGD/PD#
59
60
1
3
4
5
6
7

RP43 4
2

<7> CLK_DREFCLK
<7> CLK_DREFCLK#

12
20
26
36
45
49

CG_XOUT
CG_XIN
475_4 SATACLKREQ#_R
33_4 PCI_CLK_7412_R
33_4 PCLK_MINI_R
33_4 PCLK_591_R
33_4 PCI_CLK_SIO_R
33_4 PCLK_ICH_R

14M_ICH
C645

VDD_I/O
VDD_PLL3_I/O
VDD_SRC_I/O_1
VDD_SRC_I/O_2
VDD_SRC_I/O_3
VDD_CPU_I/O

<14> SATACLKREQ#
<28> PCLK_PCM
<22,30> PCLK_DEBUG
<31> PCLK_591

0_4

4.7U/10V
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
.1U/10V_4
10U/6.3V

Sheet

Monday, May 07, 2007

1

of

38

<5> H_A#[35:17]

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

<5> H_ADSTB1#
<12> H_A20M#
<12> H_FERR#
<12> H_IGNNE#

A6
A5
C4

A20M#
FERR#
IGNNE#

D5
C6
B4
A3

STPCLK#
LINT0
LINT1
SMI#

M4
N5
T2
V3
B2
C3
D2
D22
D3
F6

RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]

H_STPCLK_R#

A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#

H_ADS# <5>
H_BNR# <5>
H_BPRI# <5>

H5
F21
E1

H_DEFER# <5>
H_DRDY# <5>
H_DBSY# <5>

F1
R79

H4

H_LOCK# <5>

C1
F3
F4
G3
G2

H_CPURST# <5>
H_RS#0 <5>
H_RS#1 <5>
H_RS#2 <5>
H_TRDY# <5>

HIT#
HITM#

G6
E4

H_HIT# <5>
H_HITM# <5>

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#

THERMAL
PROCHOT#
THERMDA
THERMDC
THERMTRIP#

H CLK
BCLK[0]
BCLK[1]

D21 H_PROCHOT_R#
A24 H_THERMDA
B25 H_THERMDC
C7

PM_THRMTRIP#

A22
A21

<31,32> MBCLK

56.2/F_4 +1.05V
H_INIT# <12>

LOCK#

+3V

+3V

H_BREQ#0 <5>

D20 H_IERR#
B3

RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

CPU Thermal monitor

Q25
RHU002N06

H1
E2
G5

+3V
Q26
RHU002N06

BR0#
IERR#
INIT#

ICH

0_4

<12> H_INTR
<12> H_NMI
<12> H_SMI#

DEFER#
DRDY#
DBSY#

REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

R350

<12> H_STPCLK#

K3
H2
K2
J3
L1

ADS#
BNR#
BPRI#

ADDR GROUP 1

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#

CONTROL

<5> H_ADSTB0#
<5> H_REQ#[4:0]

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

XDP/ITP SIGNALS

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

ADDR GROUP 0

CPU(HOST)

U22A

<31,32> MBDATA

R360

R361

R357

10K_4

10K_4

200

LM86VCC
C517

.1U/10V_4
U24
H_THERMDA
8

T8
T2
T3
T6
T4
T5

R362

<14,17> THERM_ALERT#

*0_4

SCLK

VCC

SDA

DXP

C518

ALERT#

DXN

2200P/50V_4

OVERT#

GND

H_THERMDC

MAX6657
R358

0_4

R355

56.2/F_4

R82

*2.2K_4

ADDRESS: 98H
SYS_RST# <14>

+3V

R363

CPUFAN#_ON

*10K_4

<check list>
Layout Note:Routing 10:10 mils and away
from noise source with ground gard

+1.05V
<30> CPUFAN#_ON

H_PROCHOT# <34>

<check list>
Default PU 56ohm if no use.
Serial R NC, If connect to power side PU 68ohm. Serial R 2.2K

CLK_CPU_BCLK <2>
CLK_CPU_BCLK# <2>

RESERVED

<5> H_A#[16:3]

PU/PD (ITP700)

Thermal Trip

+1.05V

Merom Ball-out Rev 1a

<5>
<5>
<5>
<5>

H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#[31:16]

<Check list & CRB>

Layout note: Z=55 ohm
H_GTLREF<0.5"

R365
<5> H_DSTBN#1
1K/F_4
<5> H_DSTBP#1
<5> H_DINV#1
R101
R369

R364
2K/F

T10
T74
T7
T73
<2> CPU_BSEL0
<2> CPU_BSEL1
<2> CPU_BSEL2

H_GTLREF AD26
*1K_4 CPU_TEST1 C23
*1K_4 CPU_TEST2 D25
CPU_TEST3 C24
CPU_TEST4 AF26
CPU_TEST5 AF1
CPU_TEST6 A26

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

B22
B23
C21

BSEL[0]
BSEL[1]
BSEL[2]

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP[0]
COMP[1]
COMP[2]
COMP[3]

R26
U26
AA1
Y1

COMP0
COMP1
COMP2
COMP3

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

MISC

+1.05V
<7,14,34> DELAY_VR_PWRGOOD

Q3

R55

D4

FDV301N

*10K_4

*BAS316

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#

DATA GRP 2

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

DATA GRP 1

+1.05V

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

DATA GRP 3

H_D#[47:32] <5>

U22B
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

DATA GRP 0

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

+1.05V

C39

56.2/F_4
PM_THRMTRIP#

H_DSTBN#2 <5>
H_DSTBP#2 <5>
H_DINV#2 <5>
H_D#[63:48] <5>

R44

39/F_4

XDP_TDI

R42

150/F_4

XDP_BPM#5

R47

*54.9/F_4

XDP_TDO

R45

54.9/F_4

R54

27/F_4

Q4
MMBT3904
3

SYS_SHDN# <33>

PM_THRMTRIP# <7,12>

XDP_TCK

<CRB & Design guide>

Layout Note: Thermal trip should connect to ICH8 & GMCH without T-ing
(ZS1 default NC)

XDP_TRST# R46

680/F_4

<Check list & CRB>

Layout note: L<0.5"
COMP0/2 Z=27.4ohm
COMP1/3 Z=54.9
H_DSTBN#3 <5>
H_DSTBP#3 <5>
H_DINV#3 <5>
R367
R366
R48
R43

27.4/F
54.9/F_4
27.4/F
54.9/F_4

H_DPSLP# <12>
H_DPWR# <5>

<CRB & Design guide>

Layout Note:Connect from
SB and daisy chain to CPU
CORE VR.Not use T
connect.(SB/VR/CPU/NB)

ICH_DPRSTP# <7,12,34>

PROJECT : ZD1

H_PWRGD <12>

H_CPUSLP# <5>
PSI# <34>

Size

Quanta Computer Inc.

Document Number

Date:

Monday, May 07, 2007

Merom Ball-out Rev 1a

5

XDP_TMS
*1U

R56
2

<5> H_D#[15:0]

Rev
E

CPU(1 of 2)/FAN/Thermal
4

Sheet
1

of

38

CPU(Power)
VCC_CORE
U22D

U22C
D

C43

C46

C49

C55

C59

C69

C84

C94

C102

C56

10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8

C60

C42

C47

C53

C58

C63

C80

C90

C99

C51

10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8

C93

C97

C91

C44

C83

C70

DESIGN GUIDE
CHANGE FROM 22UF *20 TO 10UF *32

10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8

C86

C77

C61

C48
10U/6.3V_8
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 <Part Number>
<Description>

+ C40

C57

C52

+ C41

330U/2.5V_7

330U_7

+ C100
330U/2.5V_7

<Check list>
Option1:330U*6(ESR=1.5m ohm aggregate , ESL=0.8nH/6) and 22U*20(ESR=3mohm typ/20 , ESL=0.6nH/20)
Option2:330U*6(ESR=1.5m ohm aggregate , ESL=1.8nH/6) and 22U*32(ESR=3mohm typ/32 , ESL=0.6nH/32)

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

<REV.NO. 0.5/REF.NO.19343>

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

VCCA[01]
VCCA[02]

B26
C26

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

AD6
AF5
AE5
AF4
AE3
AF3
AE2

VCCSENSE

AF7

VCCSENSE <34>

VSSSENSE

AE7

VSSSENSE <34>

Ivcc Max 52A

Ivccp Max 6A(VCCP supply before Vcc stable)
Max 2A(VCCP supply after Vcc stable)
Ivcca Max 130mA

+1.05V

C76

C45

C75

.1U/16V

.1U/16V

.1U/16V .1U/16V .1U/16V .1U/16V

C81

C89

C82

+1.05V
0C Delete R75,R63 0104

C54

<Check list>
ohm

330U/2.5V_7ESR=12m

+1.5V

<CRB>
.01U near to B26 ball
+VCCA_PROC

R368

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

<34>
<34>
<34>
<34>
<34>
<34>
<34>

VCC_CORE

C130

.01U/16V_4 10U/10V_8
R62
100/F

Merom Ball-out Rev 1a

.

C520

R58
100/F

<Demo board>
Routing 27.4ohm with 50mils spacing
PU/PD near to CPU 1"

VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]

Merom Ball-out Rev 1a

.

PROJECT : ZD1
Size

Quanta Computer Inc.

Document Number

Date:

Monday, May 07, 2007

Rev
E

CPU(2 of 2)
5

Sheet
1

of

38

NB(HOST)

R376
221_4
H_SWING

<check list>
0.1U close to B3

C530

100_4

.1U/10V_4

H_RCOMP
R370
24.9_4

<check list>
10:20 mils(Width:Spacing)

R111

E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
W10
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SCOMP

+1.05V
54.9_4
R110

H_SCOMP#

54.9_4

H_SWING
H_RCOMP

B3
C2

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

W1
W2

H_SCOMP
H_SCOMP#

B6
E5

H_CPURST#
H_CPUSLP#

<3> H_CPURST#
<3> H_CPUSLP#

H_AVREF
H_DVREF

B9
A9

HOST

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

+1.05V

R378

H_A#[35:3] <3>

U30A

<3> H_D#[63:0]

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_A#[35:32] are not supported in

Calero Interposer
Crestline support 36 bit address
H_ADS# <3>
H_ADSTB0# <3>
H_ADSTB1# <3>
H_BNR# <3>
H_BPRI# <3>
H_BREQ#0 <3>
H_DEFER# <3>
H_DBSY# <3>
CLK_MCH_BCLK <2>
CLK_MCH_BCLK# <2>
H_DPWR# <3>
H_DRDY# <3>
H_HIT# <3>
H_HITM# <3>
H_LOCK# <3>
H_TRDY# <3>

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

K5
L2
AD13
AE13

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

M7
K3
AD2
AH11

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

L7
K2
AC2
AJ10

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

M14
E13
A11
H13
B12

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#_0
H_RS#_1
H_RS#_2

E12
D7
D8

H_RS#0
H_RS#1
H_RS#2

H_DINV#[3:0]

<3>

H_DSTBN#[3:0] <3>

H_DSTBP#[3:0] <3>

H_REQ#[4:0] <3>

H_RS#[2:0] <3>

H_AVREF
H_DVREF
CRESTLINE_1p0

+1.05V

R383
1K_4

H_AVREF

R384

0_4 H_DVREF

<check list>
0.1U close to B9

R382

C153

2K_4

.1U/10V_4

PROJECT : ZD1
Size

Quanta Computer Inc.

Document Number

Rev
E

GMCH HOST(1/7)
Date:
5

Monday, May 07, 2007

Sheet
1

of

38

<check list>
Vcc1_5 for Calero
Vcc1_25/Vcc1_05 for Crestline

U30C
J40
H39
E39
E40
C37
D35
K40

10K_4
10K_4

<18> INT_LVDS_EDIDCLK
<18> INT_LVDS_EDIDDATA
<18> INT_LVDS_DIGON

<check list & CRB>

For Calero : 1.5K
For Cresstline:2.4K

IV@2.4K_4

IV&EV Dis/Enable
setting

T45

INT_TXLCLKOUTINT_TXLCLKOUT+
INT_TXUCLKOUTINT_TXUCLKOUT+

LVDS_IBG L41
LVDS_VBGL43
N41
N40
D46
C45
D44
E42

LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

<18> INT_TXLOUT0<18> INT_TXLOUT1<18> INT_TXLOUT2-

G51
E51
F49

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2

<18> INT_TXLOUT0+
<18> INT_TXLOUT1+
<18> INT_TXLOUT2+

G50
E50
F48

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2

<18> INT_TXUOUT0<18> INT_TXUOUT1<18> INT_TXUOUT2-

G44
B47
B45

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2

<18> INT_TXUOUT0+
<18> INT_TXUOUT1+
<18> INT_TXUOUT2+

E44
A47
A45

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2

INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R

+3V

R151
R200

E27
G27
K27

TVA_DAC
TVB_DAC
TVC_DAC

F27
J27
L27

TVA_RTN
TVB_RTN
TVC_RTN

TV_DCONSEL_0 M35
TV_DCONSEL_1 P33

*2.2K_4
*2.2K_4

TV

<19> INT_TV_COMP
<19> INT_TV_Y/G
<19> INT_TV_C/R

LVDS

<18>
<18>
<18>
<18>

R182

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN

TV_DCONSEL_0
TV_DCONSEL_1

<FAE>
If no use can be NC

INT_CRT_BLU

<19> INT_CRT_BLU

INT_CRT_GRN

<19> INT_CRT_GRN

INT_CRT_RED

IV&EV Dis/Enable setting

0
<check list & CRB> R397
For Calero : 255
For Cresstline:1.3K/F <FAE>
For external VGA:0 ohm Flexible and safe

<19> INT_CRT_DDCCLK
<19> INT_CRT_DDCDAT
<19> INT_HSYNC

R169
R405

<19> INT_VSYNC

K33
G35
IV@39_4 HSYNC1 F33
CRTIREF C32
IV@39_4 VSYNC1 E33

<check list>
HSYNC/VSYNC
serial R
place close
to NB

TV_DCONSEL_0

R513

EV@0_4

TV_DCONSEL_1

R514

EV@0_4

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

VGA

<19> INT_CRT_RED

H32
G32
K29
J29
F29
E29

GRAPHICS

R406
R413

+3V

PCI-EXPRESS

<18> L_BKLT_CTRL
<23> INT_LVDS_BLON

PEG_COMPI
PEG_COMPO

N43 EXP_A_COMPX
M43

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

R201

<check list>
For EV@
Connect to GND
CRT R/G/B
TV A/B/C
HSYNC/VSYNC

+1.05_PEG

24.9/F_4

PEG_RXN[15:0] <17>

<check list>
SDVO/PCIE/LVDS not
implement
16 lanes NC

<check list>
For IV@
Connect to 150ohm
CRT R/G/B
TV A/B/C
Connect to 39ohm
HSYNC/VSYNC

R167
R166

EV@0_4
EV@0_4

R147

IV@150/F_4

INT_TV_COMP

R145

IV@150/F_4

INT_TV_Y/G

R144

IV@150/F_4

INT_TV_C/R

R157

IV@150/F_4

INT_CRT_BLU

R148

IV@150/F_4

INT_CRT_GRN

R155

IV@150/F_4

INT_CRT_RED

HSYNC1
VSYNC1

PEG_RXP[15:0] <17>

PEG_TXN[15:0] <17>

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

N45 C_PEG_TXN0
U39 C_PEG_TXN1
U47 C_PEG_TXN2
N51 C_PEG_TXN3
R50 C_PEG_TXN4
T42 C_PEG_TXN5
Y43 C_PEG_TXN6
W46 C_PEG_TXN7
W38 C_PEG_TXN8
AD39 C_PEG_TXN9
AC46 C_PEG_TXN10
AC49 C_PEG_TXN11
AC42 C_PEG_TXN12
AH39 C_PEG_TXN13
AE49 C_PEG_TXN14
AH44 C_PEG_TXN15

C305
C300
C309
C307
C308
C301
C316
C331
C320
C311
C326
C313
C322
C318
C315
C329

EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

M45 C_PEG_TXP0
T38 C_PEG_TXP1
T46 C_PEG_TXP2
N50 C_PEG_TXP3
R51 C_PEG_TXP4
U43 C_PEG_TXP5
W42 C_PEG_TXP6
Y47 C_PEG_TXP7
Y39 C_PEG_TXP8
AC38 C_PEG_TXP9
AD47 C_PEG_TXP10
AC50 C_PEG_TXP11
AD43 C_PEG_TXP12
AG39 C_PEG_TXP13
AE50 C_PEG_TXP14
AH43 C_PEG_TXP15

C303
C299
C306
C304
C310
C302
C317
C325
C321
C312
C327
C324
C323
C319
C314
C328

EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4
EV@.1U/10V_4

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP[15:0] <17>

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

IV&EV Dis/Enable setting

CRESTLINE_1p0

INTEL FAE reuqest PD.

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

GMCH GRAPHICS(2/7)
5

Sheet
1

of

38

Strapping table

U30B

Low Power PCI Express

CFG9
CFG[11:10]
CFG[13:12]

PCI Express Graphics

Lane Reversal
Reserved
XOR/ ALLZ/
Clock Un gating

CFG[15:14]
CFG16

Reserved
FSB Dynamic ODT

CFG[18:17]
CFG19

Reserved
DMI Lane Reversal

CFG20

SDVO/PCIe concurrent

INTEL CRB
ADD 0.1UF

C165

00 = Clock gating disable

01 = ALL-Z Mode Enable
10 = XOR Mode Enable
11 = Normal Cperation (Default)
0 = Dynamic ODT disable
1 = Dynamic ODT Enable (Default)

SDVO_CTRLDATA SDVO Present

0 = Normal operation
1 = Reverse Lanes (Default)
0 = Only SDVO or PCIE x1 is operation
(Default)
1 = SDVO and PCIE x1 are operating
simultaneously via the PEG port
0 = No SDVO Card present (Default)
1 = SDVO Card Present

INTEL CRB
CRESSTLINE SHOULD USE 20OHM
C

+1.8VSUS

M_RCOMP#

<check list & CRB>

R Value select
For Calero : 80.6ohm
For Cresstline:20ohm
But check list use 80.6ohm

R387

<FAE>
80.6ohm

20/F_4

<2> MCH_BSEL0
<2> MCH_BSEL1
<2> MCH_BSEL2

T37
T28

10K_4 PM_EXTTS#0

R149

10K_4 PM_EXTTS#1

T25
T27
T32
T40

R138

*4.02K/F_4

MCH_CFG_9

R127

*4.02K/F_4

MCH_CFG_12 R139

*4.02K/F_4

MCH_CFG_13 R137

*4.02K/F_4

MCH_CFG_19 R171

*4.02K/F_4

MCH_CFG_16 R129

*4.02K/F_4

MCH_CFG_20 R174

*4.02K/F_4

<14> PM_BMBUSY#
<3,12,34> ICH_DPRSTP#
<16> PM_EXTTS#0
<16> PM_EXTTS#1
<3,14,34> DELAY_VR_PWRGOOD
<13> PLTRST#_NB
<3,12> PM_THRMTRIP#
<14,34> PM_DPRSLPVR

R184
R177
R401
R150
R140
R130
R407

0_4
0_4
0_4
0_4

G41
L39
L36
J36
AW49
RST_IN#_MCH
100_4
AV20
*0_4 PM_THRMTRIP#_GMCH N20
0_4 PM_DPRSLPVR_GMCH
G36

BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2

R416

R154

1K/F_4

R417
BK1608LL121

*1K/F_4

SM_RCOMP_VOH
R165

C241

C232

3.01K/F_4

.01U/16V_4

2.2U/6.3V

+SM_VREF_MCH
R418

C295

*1K/F_4

.1U/10V_4.1U/10V_4

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16

NC

+1.8VSUS

P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35

PM_BMBUSY#_R
ICH_DPRSTP#_R
PM_EXTTS#0_R
PM_EXTTS#1_R

+SMDDR_VREF

BE29
AY32
BD39
BG37

M_CKE0
M_CKE1
M_CKE2
M_CKE3

<16>
<16>
<16>
<16>

SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3

BG20
BK16
BG16
BE13

M_CS#0
M_CS#1
M_CS#2
M_CS#3

<16>
<16>
<16>
<16>

SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3

BH18
BJ15
BJ14
BE16

M_ODT0
M_ODT1
M_ODT2
M_ODT3

<16>
<16>
<16>
<16>

SM_RCOMP
SM_RCOMP#

BL15
BK14

M_RCOMP
M_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

BK31
BL31

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_VREF_0
SM_VREF_1

AR49
AW4

+SM_VREF_MCH

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

B42
C42
H48
H47

CLK_DREFCLK
CLK_DREFCLK#
CLK_DREFSSCLK
CLK_DREFSSCLK#

PEG_CLK
PEG_CLK#

K44
K45

CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

AN47
AJ38
AN42
AN46

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

AM47
AJ39
AN41
AN45

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

AJ46 DMI_RXN0
AJ41 DMI_RXN1
AM40 DMI_RXN2
AM44 DMI_RXN3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

AJ47 DMI_RXP0
AJ42 DMI_RXP1
AM39 DMI_RXP2
AM43 DMI_RXP3

CLK_DREFCLK <2>
CLK_DREFCLK# <2>
CLK_DREFSSCLK <2>
CLK_DREFSSCLK# <2>
C

CLK_PCIE_3GPLL <2>
CLK_PCIE_3GPLL# <2>

DMI_TXP[3:0] <13>

DMI_RXN[3:0] <13>

DMI_RXP[3:0] <13>

E35
A39
C38
B39
E36

MCH_GFX_VID_0
MCH_GFX_VID_1
MCH_GFX_VID_2
MCH_GFX_VID_3
R183
*0_4

T41
T42
T43
T44
SUSB# <14,31>
+1.25V

CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
TEST_1
TEST_2

AM49
AK50
AT43
AN49
AM50 +1.25V_CL_VREF

H35
K36
G39 CLK_MCH_OE#
G40
A37 GMCH_TEST1
R32 GMCH_TEST2

R422

CL_CLK0 <14>
CL_DATA0 <14>
MPWROK <14,31>
CL_RST#0 <14>

MCH_ICH_SYNC#
R178
R168

1K/F_4

C559

R420

.1U/10V_4

392/F

<14>

0_4
20K_4

CRESTLINE_1p0

+1.25V

SM_RCOMP_VOL

C143

<16>
<16>
<16>
<16>

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN

R163

C250

C233

1K/F_4

.01U/16V_4

2.2U/6.3V

CLK_DREFCLK
CLK_DREFCLK#
CLK_DREFSSCLK
CLK_DREFSSCLK#

R409
R529
R531
R411
R532
R533

*4.7K_4
EV@0_4
EV@0_4
*4.7K_4
EV@0_4
EV@0_4

PROJECT : ZD1
0C Delete R410 and R408 0110

Quanta Computer Inc.

Size

Document Number

Date:

Monday, May 07, 2007

INTEL FAE suggest PD for external graphics

5

<16>
<16>
<16>
<16>

DMI_TXN[3:0] <13>

PM

+3V

MCH_CFG_5

+1.8VSUS

RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43

SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4

CFG

MCH_CFG_3
MCH_CFG_4
MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_8
MCH_CFG_9
MCH_CFG_10
MCH_CFG_11
MCH_CFG_12
MCH_CFG_13
MCH_CFG_14
MCH_CFG_15
MCH_CFG_16
MCH_CFG_17
MCH_CFG_18
MCH_CFG_19
MCH_CFG_20

T34
T24
T29

+3V

10K_4 CLK_MCH_OE#

BH39
AW20
BK20
C48
D47
B44
C44
A35
B37
B36
B34
C34

M_CLK#0
M_CLK#1
M_CLK#2
M_CLK#3

20/F_4

T30
T75

R395

RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31

AW30
BA23
AW25
AW23

R388

M_RCOMP

R170

H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24

SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4

MUXING

CFG8

0 = Reserved
1 = Mobile CPU (Default)
0 = Normal mode
1 = Low Power mode
0 = Reserved Lanes
1 = Normal operation (Default)

M_CLK0
M_CLK1
M_CLK2
M_CLK3

DMI

Reserved
CPU Strap

AV29
BB23
BA25
AV23

GRAPHICS VID

CFG6
CFG7

0 = DMI X2
1 = DMI X4 (Default)

SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4

ME

Reserved
DMI X2 Select

MISC

CFG[4:3]
CFG5

RSVD

Strap Description
FSB Frequency Select

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14

DDR

Configuration
010 = FSB 800MHz
011 = FSB 667MHz

Pin Name
CFG[2:0]

P36
P37
R35
N35
AR12
AR13
AM12
AN13
J12
AR37
AM36
AL36
AM37
.1U/10V_4 D20

CLK

All strap are sampled with respect to the leading edge of the GMCH power ok signal
CFG[17:3] have internal pull-up
CFG[18:19] have internal pull-down
Any CFG signal strapping option not list below should be left NC pin

Rev
E

GMCH (STRAPPING/OTHER 3/7)

2

Sheet
1

of

38

NB(Memory controller)

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_A_BS0 <16>
M_A_BS1 <16>
M_A_BS2 <16>
M_A_CAS# <16>

SA_CAS#

BL17

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
BJ29

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

SA_RAS#
SA_RCVEN#

BE18
AY20

SA_WE#

BA19

TP_SA_RCVEN#

M_A_DM[7:0] <16>

M_A_DQS[7:0] <16>

M_A_DQS#[7:0] <16>

M_A_A[13:0] <16>

M_A_A14 <16>
M_A_RAS# <16>
T35
M_A_WE# <16>

CRESTLINE_1p0

U30E
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BL9
BK5
BL5
BK9
BK10
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

SB_BS_0
SB_BS_1
SB_BS_2

BB19
BK19
BF29

MEMORY

MEMORY

SA_BS_0
SA_BS_1
SA_BS_2

SYSTEM

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

SYSTEM

<16> M_B_DQ[63:0]

U30D
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11

DDR

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR

<16> M_A_DQ[63:0]

AY17
BG18
BG36

M_B_BS0 <16>
M_B_BS1 <16>
M_B_BS2 <16>
M_B_CAS# <16>

SB_CAS#

BE17

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14
SB_RAS#
SB_RCVEN#

BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
BE24
AV16
AY18

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

SB_WE#

BC17

TP_SB_RCVEN#

M_B_DM[7:0] <16>

M_B_DQS[7:0] <16>

M_B_DQS#[7:0] <16>

M_B_A[13:0] <16>

M_B_A14 <16>
M_B_RAS# <16>
T26
M_B_WE# <16>

CRESTLINE_1p0

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

GMCH DDR(4/7)
5

Sheet
1

of

38

NB(Power-1)
+1.05V
+1.05V_AXG
U30G

.1U/10V_4

C247

C249

330U/2V_7 10U/10V_8
10U/10V_8

+1.05V_AXG

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34

AW45
BC39
BE39
BD17
BD4
AW8
AT6

C252

10U/10V_8

+1.05V

C243

.22U/6.3V_4

.22U/6.3V_4

C214
.1U/10V_4

+1.05V_AXG
R100

IV@0_8

R118

IV@0_8

+1.05V_AXG
+1.05V_AXG
+ C521

+ C522

IV@330U_7

IV@330U_7

C191

C174

C172

C201

C185

IV@.47U

IV@1U

IV@10U_8

IV@.1U_4

IV@.1U_4

+1.05V_AXG

R152
EV@0_4

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44
VCC_NCTF_45
VCC_NCTF_46
VCC_NCTF_47
VCC_NCTF_48
VCC_NCTF_49
VCC_NCTF_50

VSS NCTF

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

VCC GFX

R20
T14
W13
W14
Y12
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14

C238

C235

C262

C203

C220

C263

10U/10V_8

.22U/6.3V_4

.22U/6.3V_4

.1U/10V_4

.1U/10V_4

.1U/10V_4

AL24
AL26
AL28
AM26
AM28
AM29
AM31
AM32
AM33
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33

T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28

POWER
VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6

A3
B2
C1
BL1
BL51
A51

+1.05V

+1.05V

C239

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21

VSS SCB

+ C552

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36

VCC SM

C254

AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30

VCC GFX NCTF

POWER

+1.8VSUS

U30F
AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AM35
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37

VCC AXM

VCC_13

T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31

VCC NCTF

R30

0C Delete R156 0104

+1.05V
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83

VCC_AXM_NCTF_1
VCC_AXM_NCTF_2
VCC_AXM_NCTF_3
VCC_AXM_NCTF_4
VCC_AXM_NCTF_5
VCC_AXM_NCTF_6
VCC_AXM_NCTF_7
VCC_AXM_NCTF_8
VCC_AXM_NCTF_9
VCC_AXM_NCTF_10
VCC_AXM_NCTF_11
VCC_AXM_NCTF_12
VCC_AXM_NCTF_13
VCC_AXM_NCTF_14
VCC_AXM_NCTF_15
VCC_AXM_NCTF_16
VCC_AXM_NCTF_17
VCC_AXM_NCTF_18
VCC_AXM_NCTF_19

VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7

AT33
AT31
AK29
AK24
AK23
AJ26
AJ23

VCC AXM NCTF

VCC_1
VCC_2
VCC_3
VCC_5
VCC_4
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

VCC CORE

AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32

CRESTLINE_1p0

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
C156

C154

C151

C171

C264

C257

C291

.1U/10V_4

.1U/10V_4

.22U/6.3V_4

.22U/6.3V_4

.47U/10V

1U/16V

1U/16V
A

PROJECT : ZD1

CRESTLINE_1p0

Quanta Computer Inc.

Size

Document Number

Date:

Wednesday, April 25, 2007

Rev
E

GMCH Power-1(5/7)
5

Sheet
1

of

38

NB(Power-2)

CRT/TV Disable/Enable guideline

R172

+3V

L50

+1.25V

<FAE>
INT VGA disable
VCCSYNC connect to GND

10UH_8
+ C558
470U/2V_7

C246

R162

Ball

IV@.1U_4

EV@0_4

C557
+3V

.1U/10V_4

L47

IV@BKP1608HS181-T
C547

LVDS Disable/Enable guideline

External VGA with EV@part, Internal VGA with IV@ part

IV@0

*IV@22U_8

C237

C245

R404

IV@.1U_4

IV@22N_4

EV@0_4

Enable

Disable

VCCA_CRT

3.3V

VCCD_CRT

1.5V

External VGA with EV@part,Internal VGA with IV@ part

If SDVO Disable
LVDS Disable

If SDVO enable
LVDS enable

If SDVO enable
LVDS Disable

Ball

Enable

Disable

Signal

GND

VCCA_C_TVO

3.3V

GND

VCCD_LVDS

GND

1.8V

1.8V

GND

VCCD_TVO

1.5V

1.5V

VCCA_LVDS

GND

GND

1.8V

VCCDQ_CRT 1.5V

GND

VCCABG_DAC 3.3V

GND

VCCTX_LVDS

GND

GND

1.8V

VCCA_A_TVO 3.3V

GND

VSSABG_DAC GND

GND

VCCA_B_TVO 3.3V

GND

VCC_SYNC

GND

3.3V

EXTERNAL

INTERNAL

.1U/10V_4 +1.8VSUS

R179

IV@0
R186

BKP1608HS181-T

EV@0_4
C136

R106
0.5/F

R415

+3V

.1U/10V_4

AL2

VCCA_HPLL

+1.25VM_VCCA_MPLL

AM2

VCCA_MPLL

+1.8VSUS_VCC_LVDS

A41

VCCA_LVDS

C270

B41

VSSA_LVDS

K50

VCCA_PEG_BG

K49

VSSA_PEG_BG

.1U/10V_4
0

C535

IV@1000P_4

+1.25V_VCCD_PEG_PLL
+1.25VM_VCCA_SM

C539

C173

C538

C163

4.7U/10V

22U/6.3V_8
1U/16V

+
100U/10V_7

*22U_8

CRB RECOMMEND
180OHM@100MHz
Rdc= 0.09OHM (max)
+1.25V

R185

L21
IV@BKP1608HS181-T

C265

C253

C258

*1U

*1U

22U/6.3V_8
.1U/10V_4

C225
+1.25VM_VCCA_SM_CK

+3V
C198

C227

R135

IV@.1U_4

IV@22N_4

EV@0_4

C229

C228

R136

IV@.1U_4

IV@22N_4

EV@0_4

R173

EV@0_4

R164

IV@0

R105

+1.25V

IV@22U_8

C226

C215

R146

IV@.1U_4

IV@22N_4

EV@0_4

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5

AT22
AT21
AT19
AT18
AT17
AR17
AR16

VCCA_SM_7
VCCA_SM_8
VCCA_SM_9
VCCA_SM_10
VCCA_SM_11
VCCA_SM_NCTF_1
VCCA_SM_NCTF_2

BC29
BB29

+1.5V_VCCD_CRT
+1.5V_VCCD_TVDAC

+1.25V

VCCA_SM_CK_1
VCCA_SM_CK_2

C25
B25
C27
B27
B28
A28

VCCA_TVA_DAC_1
VCCA_TVA_DAC_2
VCCA_TVB_DAC_1
VCCA_TVB_DAC_2
VCCA_TVC_DAC_1
VCCA_TVC_DAC_2

M32
L29

VCCD_CRT
VCCD_TVDAC

N28

VCCD_QDAC

+1.25VM_MCH_VCCD_HPLL

AN2

VCCD_HPLL

C142

+1.25V_VCCD_PEG_PLL

U48

VCCD_PEG_PLL

J41
H42

VCCD_LVDS_1
VCCD_LVDS_2

C298
.1U/10V_4

L23

POWER

.1U/10V_4

IV@10U_8

VCCA_PEG_PLL

AW18
AV19
AU19
AU18
AU17

+1.5V_VCCD_QDAC

C540

C543

U51

+3V_TV_DAC

VTT

+1.25VM_VCCA_HPLL

C297

R390

+1.25V

VCCA_DPLLB

+3V_VCCA_PEG_BG

0_8

V1.25M_MPLL_RC
22U/6.3V_8

C132

H49

BKP1608HS181-T
CRESTLINE_1p0
R203

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22

AT23
AU28
AU24
AT29
AT25
AT30

VCC_AXD_NCTF

AR29

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
VCC_DMI

+1.05V

U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1

VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6

B23
B21
A21

C134

C144

2.2U/10V_8

+1.25VM_AXD

C137

R134
C221

C202

1U/16V

*22U_8

+ C523

2.2U/10V_8 .47U/10V

330U/2V_7

+1.25V

R124
C196

C182

1U/16V

10U/10V_8

+1.25V

R421

+1.25V

C560
+1.25V_VCC_AXF

.1U/10V_4
L46

AJ50 +1.25V_VCC_DMI

C192

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

BK24 +1.8VSUS_VCC_SM_CK
BK23
BJ24
BJ23

VCC_TX_LVDS

A43

VCC_HV_1
VCC_HV_2

C40
B40

1UH_8

C542

.1U/10V_4 22U/6.3V_8

R391

+1.8VSUS

+V1.8_SMCK_RC

1/F

C541

22U/6.3V_8

IV&EV Dis/Enable setting

HV

22U/6.3V_8

VCCA_DPLLA

+1.25V_VCCA_DPLLB

AD51
W50
W51
V49
V50

VCC_RXR_DMI_1
VCC_RXR_DMI_2

AH50
AH51

VTTLF1
VTTLF2
VTTLF3

+1.8VSUS_VCC_TX_LVDS

L48

IV@1UH_8
+1.8VSUS

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

VTTLF

C145

VSSA_DAC_BG

B49

AXD

L15

C135

B32
+1.25V_VCCA_DPLLA

AXF

BKP1608HS181-T

VCCA_DAC_BG

SM CK

IV&EV Dis/Enable setting

+3V_VCCA_DAC_BG A30

PEG

EV@0_4

DMI

R403

IV@22N_4

PLL

C546

IV@.1U_4

VCCA_CRT_DAC_1
VCCA_CRT_DAC_2

A LVDS

.1U/10V_4

VCCSYNC

A33
B33

A PEG

C544
C296

L14

+1.25V

+3V_VCCA_CRT_DAC

A SM

470U/2V_7

IV@0

A CK

+ C338

R396

TV

+3V_TV_DAC

D TV/CRT

10UH_8

LVDS

L24

+1.25V

J32

CRT

U30H
+3V_VCCSYNC

+3V_VCC_HV

R412

C554

+ C553

EV@0_4

IV@1000P_4

IV@220U_7

+1.05_PEG
B

L22

A7
F2
AH1

C330
C138

C524

C532

+ C332

2.2U/10V_8 220U/2.5V_7

.47U/6.3V_4
.47U/6.3V_4
.47U/6.3V_4

91nH

+1.05V

<FAE>
VCC_RXR_DMI and VCC_PEG
connect to+1.05V

+ C334

1/F_8

<FAE>
INT VGA disable
VCCD_TVDAC still +1.5V

IV&EV Dis/Enable setting

+1.5V

R402

220U/2.5V_7

+V1.25S_PEGPLL_FB
C341
2.2U/10V_8

0
C218

C217

D41

.1U/10V_4 22N/16V_4

+1.05V
R414

+1.8VSUS
R153

Change to
100 ohm Resistor

IV@100
C219
IV@.1U_4

C200
IV@22N_4

R133

+1.05V_SD

PDZ5.6B

+1.8V_VCCD_LVDS
C279

C555

R187

IV@1U

*IV@10U_8

EV@0_4

+3V_VCC_HV

R515
10
R181

+3V

PROJECT : ZD1

C189

Use site for filter

cap with Gfx
enabled CS
4

C269

<CRB>
+1.25V AND +1.25M shall be
+1.5V for Calero Interposer

EV@0_4
IV@1U

IV@0

.1U/10V_4

Quanta Computer Inc.

Size

Document Number

Date:

Wednesday, April 25, 2007

Rev
E

GMCH Power-2(6/7)
2

Sheet
1

10

of

38

NB(Power-3)

U30I
D

A13
A15
A17
A24
AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AL1
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

VSS

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41

U30J
C46
C50
C7
D13
D24
D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36
F4
F40
F50
G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48
G8
H24
H28
H4
H45
J11
J16
J2
J24
J28
J33
J35
J39

VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243

K12
K47
K8
L1
L17
L20
L24
L28
L3
L33
L49
M28
M42
M46
M49
M5
M50
M9
N11
N14
N17
N29
N32
N36
N39
N44
N49
N7
P19
P2
P23
P3
P50
R49
T39
T43
T47
U41
U45
U50
V2
V3

VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286

VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305

W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28

VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313

AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50

0C Delete R142,R197,R198,R143 0104

VSS

CRESTLINE_1p0

CRESTLINE_1p0

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Date:

Wednesday, April 25, 2007

Rev
E

GMCH Power-3(7/7)
5

Sheet
1

11

of

38

RTC
+VCCRTC

RTC_RST#

1U/10V

1K_4
RTC_N02 1

R331

1K

R326

JP5

C461

Y3

1.2K

+5VPCU

R320
47K
R314

R280
10M

32.768KHZ

Q20
MMBT3904

RTC_N03

10P/50V_4

*RTC_RST

C448

U34A

18P/50V_4

CLK_32KX1
CLK_32KX2

AG25
AF24

RTCX1
RTCX2

RTC_RST#

AF23

RTCRST#

ICH_INTRUDER#

AD22

INTRUDER#

AF25
AD21

INTVRMEN
LAN100_SLP

150K
+VCCRTC

CN39

R304

1M_4

ICH_INTVRMEN
LAN100_SLP

1
2
3
4
RTC CONN

SB Strap
T69
INTVRMEN

LAN100_SLP

Low = Internal VR disable

High = Internal VR enable(Default)

+VCCRTC

<26> ACZ_SDIN0
<26> ACZ_SDIN1
T83
T61

+VCCRTC

R259
332K/F

<14> ACZ_SDOUT
T65
T71

R252
332K/F

ICH_INTVRMEN

R264
*0_4

<30> SATA_LED#

LAN100_SLP

R263
*0_4

<24>
<24>
<24>
<24>

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

<24>
<24>
<24>
<24>

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

HDA
ACZ_SDOUT

ACZ_SYNC

ICH_GPIO13

Low = Internal VR disable

High = Internal VR enable(Default)

R291

33_4

R307

33_4

R487

33_4

R502

33_4

R489

33

R503

33

B24

GLAN_CLK

D22

LAN_RSTSYNC

C21
B21
C22

LAN_RXD0
LAN_RXD1
LAN_RXD2

D21
E20
C20

LAN_TXD0
LAN_TXD1
LAN_TXD2

AH21

GLAN_COMPI
GLAN_COMPO

ACZ_BCLK
ACZ_SYNC

AJ16
AJ15

HDA_BIT_CLK
HDA_SYNC

ACZ_RST#

AE14

HDA_RST#

ACZ_SDOUT
GPIO33#
GPIO34#
SATA_LED#

AJ17
AH17
AH15
AD13

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

AE13

HDA_SDOUT

AE10
AG14

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

AF10

SATALED#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

C628
C629

3900P/25V_4
3900P/25V_4

SATA_TXN0_C
SATA_TXP0_C

AF6
AF5
AH5
AH6

C627
C626

*3900P/25V_4
*3900P/25V_4

SATA_TXN1_C
SATA_TXP1_C

AG3
AG4
AJ4
AJ3

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AF2
AF1
AE4
AE3

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

<2> CLK_PCIE_SATA#
<2> CLK_PCIE_SATA

AB7
AC6

SATA_CLKN
SATA_CLKP

R277

AG1
AG2

24.9/F_4 SATA_BIAS

<check list>
L<500mils
ACZ_SDOUT_AUDIO

E5
F5
G8
F6

LAD0
LAD1
LAD2
LAD3

<22,30,31>
<22,30,31> +1.05V
<22,30,31>
<22,30,31>

FWH4/LFRAME#

C4

LDRQ0#
LDRQ1#/GPIO23

G9
E6

LDRQ0#
ICH_GPIO23

AF13
AG26

GATEA20

DPRSTP#
DPSLP#

AF26
AE26

H_DPRSTP#_R
H_DPSLP#_R

R261
R255

0_4
0_4

H_PWRGD_R

R480

0_4

A20GATE
A20M#

GLAN_DOCK#/GPIO13

D25
C25

ACZ_SDIN2
ACZ_SDIN3

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

RTC
LPC

1U/10V

FERR#

AD24

CPUPWRGD/GPIO49

AG29

IGNNE#

AF27

INIT#
INTR
RCIN#

AE24
AC20
AH14

NMI
SMI#

AD23
AG28

LAN / GLAN
CPU

C506

R319

20K_4

IHDA

R348
C499

IDE

1
RB500V

SATA

R_3VRTC 2
D28

1
RB500V

2
D27

+3VPCU

SATARBIAS#
SATARBIAS

R475

*56.2/F_4

ICH_DPRSTP# <3,7,34>
H_DPSLP# <3>

H_PWRGD <3>

H_INIT# <3>
H_INTR <3>
RCIN# <31>

+1.05V

H_NMI <3>
H_SMI# <3>

AE27

H_THERMTRIP_R

TP8

AA23

ICH_TP8

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

DA0
DA1
DA2

AA4
AA1
AB3

PDA0
PDA1
PDA2

W4
W3
Y2
Y3
Y1
W5

R260

56.2/F_4

RCIN#

AA24

DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ

R254
*56.2/F_4

GATEA20 <31>
H_A20M# <3>

H_IGNNE# <3>

STPCLK#

Y6
Y5

T53
T50

H_FERR# <3>

THRMTRIP#

DCS1#
DCS3#

+1.05V

LFRAME# <22,30,31>

H_STPCLK# <3>

R268
56.2/F_4

R258
T59
PDD[15:0] <24>

24/F

R267

*0_4

PM_THRMTRIP# <3,7>

Placement close SB L<2"

PDA[2:0] <24>

PDCS1# <24>
PDCS3# <24>
PDIOR# <24>
PDIOW# <24>
PDDACK# <24>
IRQ14 <24>
PIORDY <24>
PDDREQ <24>

ICH8M REV 1.0

<26>

ACZ_SDOUT_MDC <26>

ACZ_SYNC_AUDIO
ACZ_SYNC_MDC

<26>
<26>
+3V

ACZ_BCLK

ACZ_RST#

R309
R289

33_4
33_4

0810 UR FAE:
RCIN# DOESN'T NEED PU

BIT_CLK_AUDIO <26>
BIT_CLK_MDC <26>

RCIN#

R498

*10K_4

GATEA20

R290

8.2K_4

PROJECT : ZD1

ACZ_RST#_AUDIO <26,27>
ACZ_RST#_MDC <26>

Quanta Computer Inc.

Size

Document Number

Rev
E

ICH8M HOST(1/4)
Date:
5

Monday, May 07, 2007

Sheet
1

12

of

38

SB-PCIE/USB/DMI

SB-PCI
U34D

TV CARD

<22>
<22>
<22>
<22>

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2

WLAN

<22>
<22>
<22>
<22>

PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4

ROBSON

<29>
<29>
<29>
<29>

PCIE_RXN5
PCIE_RXP5
PCIE_TXN5
PCIE_TXP5

<20>
<20>
<20>
<20>

GLAN_RXN
GLAN_RXP
GLAN_TXN
GLAN_TXP

GLAN

C405
C397

.1U/10V_4
.1U/10V_4

C611
C612

.1U/10V_4
.1U/10V_4

PCIE_TXN1_C
PCIE_TXP1_C

P27
P26
N29
N28

PERN1
PERP1
PETN1
PETP1

PCIE_TXN2_C
PCIE_TXP2_C

M27
M26
L29
L28

PERN2
PERP2
PETN2
PETP2

K27
K26
J29
J28

PERN3
PERP3
PETN3
PETP3

C385
C389

.1U/10V_4
.1U/10V_4

PCIE_TXN4_C
PCIE_TXP4_C

H27
H26
G29
G28

PERN4
PERP4
PETN4
PETP4

C379
C374

.1U/10V_4
.1U/10V_4

PCIE_TXN5_C
PCIE_TXP5_C

F27
F26
E29
E28

PERN5
PERP5
PETN5
PETP5

C371
C365

.1U/10V_4
.1U/10V_4

GLAN_TXN_SB
GLAN_TXP_SB

D27
D26
C29
C28

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

C23
B23
E22

SPI_CLK
SPI_CS0#
SPI_CS1#

D23
F21

SPI_MOSI
SPI_MISO

USBOC#0
USBOC#1
USBOC#2
USBOC#3
USBOC#4
USBOC#5
USBOC#6
NC_EN#
USBOC#8
USBOC#9

<23> NC_EN#

AJ19
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18

OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#

<28> AD[0..31]

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

V27
V26
U29
U28

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

<7>
<7>
<7>
<7>

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y27
Y26
W29
W28

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

<7>
<7>
<7>
<7>

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB26
AB25
AA29
AA28

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

<7>
<7>
<7>
<7>

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD27
AD26
AC29
AC28

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

<7>
<7>
<7>
<7>

DMI_CLKN
DMI_CLKP

T26
T25

CLK_PCIE_ICH# <2>
CLK_PCIE_ICH <2>

DMI_ZCOMP
DMI_IRCOMP

Y23
Y24

PCI-Express
Direct Media Interface

PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1

SPI

NEW CARD

<23>
<23>
<23>
<23>

USB

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2

USBRBIAS#
USBRBIAS

F2
F3

+1.5V

R474
24.9/F_4

<CRB>
DMI_IRCOMP_R<500mils

DMI_IRCOMP_R

USBP9USBP9+

USBP0USBP0+
USBP1USBP1+
USBP2USBP2+
USBP3USBP3+
USBP4USBP4+
USBP5USBP5+
USBP6USBP6+
USBP7USBP7+
USBP8USBP8+
T57
T58

<25>
<25>
<22>
<22>
<25>
<25>
<25>
<25>
<21>
<21>
<23>
<23>
<22>
<22>
<18>
<18>
<22>
<22>

USB
USB
USB
USB
<28> INTA#
<28> INTB#

BLUETOOTH
NEW CARD

U34B

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

INTA#
INTB#
INTC#
INTD#

F9
B5
C5
A10

PIRQA#
PIRQB#
PIRQC#
PIRQD#

PCI

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

A4
D7
E18
C18
B19
F18
A11
C10

C/BE0#
C/BE1#
C/BE2#
C/BE3#

C17
E15
F16
E17

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

C8
D9
G6
D16
A7
B7
F10
C16
C9
A17

IRDY#

PLTRST#
PCICLK
PME#

AG24
B10
G7

PLT_RST-R#
R481
PCLK_ICH

F8
G11
F12
B3

INTE#
INTF#
INTG#
INTH#

Interrupt I/F
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

REQ0# <28>
GNT0# <28>
T48
T51
T47

CBE0#
CBE1#
CBE2#
CBE3#

<28>
<28>
<28>
<28>

IRDY# <28>
PAR <28>
PCIRST# <22,28>
DEVSEL# <28>
PERR# <28>

DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#

SERR# <28>
STOP# <28>
TRDY# <28>
FRAME# <28>
0

R211

PLTRST#_NB <7>
PCLK_ICH <2>
PCI_PME# <28>

*0_4

CRT_SENSE# <19,31>

ICH8M REV 1.0

MINI PCIE

CCD
3G CARD

USB_RBIAS_PN

ICH8M REV 1.0

<CRB>
1.USB_RBIAS_PN<500mils
2.Avoid routing next to
clock/high speed signals

R226
22.6/F

A16 SWAP Override strap

PCI_GNT#3

GNT3#

Low = A16 swap override enabled

High = Default
R217

+3V

+3V

RP33

*1K_4

REQ0#
INTH#
+3V

6
7
8
9
10

RP35
5
4
3
2
1

DEVSEL#
INTF#
INTG#
SERR#

INTC#
INTB#

+3V

6
7
8
9
10

8.2KX8

USBOC#8 R248

8.2K_4

+3V_S5

USBOC#9 R491

8.2K_4

+3V_S5

5
4
3
2
1

STOP#
REQ1#
FRAME#
REQ2#

8.2KX8

+3V_S5
USBOC#1
USBOC#5
NC_EN#
USBOC#0

C457
+3V_S5

.1U/10V_4
PLT_RST-R#

5
4
3
2
1

TRDY#
LOCK#
IRDY#
PERR#

USBOC#4
USBOC#6
USBOC#3
USBOC#2

+3V

6
7
8
9
10

5
4
3
2
1

INTE#
INTD#
REQ3#
INTA#

8.2KX8

PLTRST# <14,17,20,22..24,29..31>

1
TC7SH08FU

6
7
8
9
10

RP34

8.2KX8

U15

+3V

RP38

+3V

R295

100K

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Rev
E

ICH8M PCIE\PCI\USB(2/4)
Date:
5

Monday, May 07, 2007

Sheet
1

13

of

38

<3> SYS_RST#
R504
*10K_4

R306
R490

<2> PM_STPPCI#
<2> PM_STPCPU#
+3V

<20,22,31> PCIE_WAKE#
<28,30,31> SERIRQ
<3,17> THERM_ALERT#

U36
1
2
3

<34> VR_PWRGD_CK410#

0_4
0_4

<28,31> CLKRUN#

.1U/10V_4 C475
5

AF17

LPC_PD#
SYS_RST#

F4
AD15

SUS_STAT#/LPCPD#
SYS_RESET#

AG12

BMBUSY#/GPIO0

SMB_ALERT#

AG22

SMBALERT#/GPIO11

PM_STPPCI_ICH#
PM_STPCPU_ICH#

AE20
AG18

STP_PCI#/GPIO15
STP_CPU#/GPIO25

CLKRUN#

AH11

CLKRUN#/GPIO32

PCIE_WAKE#
SERIRQ
THERM_ALERT#

AE17
AF12
AC13

WAKE#
SERIRQ
THRM#

VR_PWRGD_CLKEN

AJ20

VRMPWRGD

NC7SZ04

AJ22

TP7

AJ8
AJ9
AH9
AE16
AC19
AG8
AH12
AE11
AG10
AH25
AD16
AG13
AF9
AJ11
AD10

TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
GPIO12
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48

TP7

T79

<31> KBSMI#
<22,23,31> LID591#

BAS316
D43

BAS316

<31>

SCI#

D42
T80
T62

KBSMI#_ICH
LID591#_ICH
ICH_GPIO7
SCI#
ICH_GPIO12

BOARD_ID0
BOARD_ID1
BOARD_ID3

ICH_GPIO22
ICH_GPIO27
ICH_GPIO28
SATACLKREQ#
ICH_GPIO38
ICH_GPIO39
ICH_GPIO48

T70
T85
T63
+3V

<2> SATACLKREQ#
R500

T66

*10K_4
R497

<7> MCH_ICH_SYNC#

<check list>
internal PD

0_4

<26> PCSPK

PCSPK

SATA
GPIO

RI#

AD9

SPKR

MCH_ICH_SYNC#_R

AJ13

MCH_SYNC#

ICH_TP3

AJ21

TP3
ICH8M REV 1.0

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37
CLK14
CLK48

AJ12
AJ10
AF11
AG11

GPIO21
BOARD_ID2
GPIO36
GPIO37

AG9
G5

14M_ICH
CLKUSB_48

T81
T67
T72
14M_ICH <2>
CLKUSB_48 <2>

SUSCLK

D3

SLP_S3#
SLP_S4#
SLP_S5#

AG23
AF21
AD18

SLP_S3#
SLP_S4#
SLP_S5#

S4_STATE#/GPIO26

AH27

ICH_GPIO26

PWROK

AE23

ICH_PWROK

DPRSLPVR/GPIO16

AJ14

PM_DPRSLPVR_R

BATLOW#

AE21

PM_BATLOW#_R

R303
R288

100/F_4
100/F_4

SUSB# <7,31>
SUSC# <31>

T64

<FAE>
Since your CPU VRM has no
DPRSTP# pin, connect
PM_DPRSLPVR to IMVP6 is correct

T77

PWRBTN#

C2

DNBSWON#

LAN_RST#

AH20

PM_LAN_ENABLE_R

RSMRST#

AG27

PM_RSMRST#_R

R501

100/F_4

DNBSWON# <31>
R494

0_4

PLTRST# <13,17,20,22..24,29..31>

CK_PWRGD

E1

CK_PWRGD <2>

CLPWROK

E3

MPWROK <7,31>

+3V_S5

SLP_M#
CL_CLK0
CL_CLK1

F23
AE18

CL_CLK0 <7>
CL_CLK1 <22>

CL_DATA0
CL_DATA1

F22
AF19

CL_DATA0 <7>
CL_DATA1 <22>

CL_VREF0
CL_VREF1

D24
AH23

CL_RST#

AJ23

MEM_LED/GPIO24
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14
WOL_EN/GPIO9

AJ27
AJ24
AF22
AG19

R299
3.24K/F

ICH_RSV0

HDA_SDOUT

Description

RSVD

1
1

R272

10K_4

CL_RST#1

R305

*10K_4

SMB_CLK_ME

R250

10K_4

R225

R294

SMB_DATA_ME

R269

10K_4

10_4

*33_4

PCLK_SMB

R496

2.2K_4

PDAT_SMB

R262

2.2K_4

SMB_ALERT#

R287

10K_4

PCIE_WAKE#

R265

1K_4

Enter XOR Chain

Normal opration(Default)

RI#

C380

C462

10P/50V_4

*10P_4

C458

CL_RST#0 <7>
ICH_GPIO24
ICH_GPIO10
ICH_GPIO14
ICH_GPIO9

+3V

R286
453/F_4

R256

10K_4

ICH_GPIO10

R519

10K_4

.1U/10V_4

Controller Link 1 VREF for IAMT support only

Low = Default
High = No Reboot

+3V

INTEL FAE (08/17)

"Add RSMRST# isolation (important!!! See ww22 Santa Rosa MoW)"

PCSPK

R257

*10K_4

KBSMI#_ICH

R522

10K_4

LID591#_ICH

R534

10K_4

+3VSUS

R51
R485

10K_4
Q6
MMBT3906

INTEL CRB SHOW IT

8.2K_4

SYS_RST#

C382

R213
453/F_4

.1U/10V_4
T78
T82
T84

ICH_GPIO39

PM_BATLOW#_R R249

Set PCIE port config bit 1

R210
3.24K/F

CL_VREF0_SB
CL_VREF1_SB

HDA_SPKR

14M_ICH

+3V

AJ25

No Reboot strap

CLKUSB_48

If no use internal LAN MAC connect

LAN_RST# to PLTRST#
Use internal LAN MAC connect
LAN_RST# to RSMRST#
should go high no sooner than 10 ms
after both VccLAN3_3 and VccLAN1_5
have reached their nominal voltages.

PM_DPRSLPVR <7,34>

+3V_S5

XOR Chain Entrance Strap

PM_RSMRST#_R
PM_LAN_ENABLE_R

R493

*0_4

4.7K_4

RSMRST# <31>

TO ICH8

FROM uR(EC)
R61
10K_4

DISABLE LAN: STUFF

R321
*1K

+3V

R495
*1K_4

ICH_GPIO14

R520

10K_4

ICH_GPIO9

R278

100K_4

VR_PWRGD_CLKEN

R492

100K_4

ICH_PWROK

R266

10K_4

SATACLKREQ#

R310

10K_4

THERM_ALERT# R251

8.2K_4

SERIRQ

R292

10K_4

CLKRUN#

R484

8.2K_4

SCI#

R488

10K_4

ICH_TP3

D6
BAV99

ACZ_SDOUT <12>

D5
BAV99

3
R64
2.2K_4

T68

SMB

RI#

<7> PM_BMBUSY#

R317
*10K_4

SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1

T49

Clocks

+3V

AJ26
AD19
AG21
AC17
AE19

Power MGT

PCLK_SMB
PDAT_SMB
CL_RST#1
SMB_CLK_ME
SMB_DATA_ME

<2,16,22,23> PCLK_SMB
<2,16,22,23> PDAT_SMB
<22> CL_RST#1

SYS
GPIO

SB-GPIO
<FAE>
CRB STP_PCI# PU is no stuff.
CRB STP_CPU# always keeps high to
ensure ME alive in M1 state.
(CLK_MCH_BCLK/# must keep alive to
make ME work)
I think there will be update for this design,
I suggest you to keep PU and 0
isolation resistors for this signal.

U34C

MISC
GPIO
Controller Link

+3V

<31> PWROK_EC

R479

2
100K_4

PWROK_EC

C620
DELAY_VR_PWRGOOD 1

<3,7,34> DELAY_VR_PWRGOOD

.1U/16V_4
+3V

U14
4 ICH_PWROK

Board ID

TC7SH08FU

ID3

ID2

ID1

+3V

+3V

+3V

ID0
R308
*10K_4
BOARD_ID3

R293
10K_4

R506
*10K_4
BOARD_ID2

R483
10K_4

R486

R505

*10K_4

*10K_4

BOARD_ID1

R499

BOARD_ID0

PROJECT : ZD1

R482

10K_4

Quanta Computer Inc.

10K_4
Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

ICH8M GPIO(3/4)
2

Sheet
1

14

of

38

+3V

+5VREF_SB

C391

C419

.1U/10V_4

.1U/10V_4

+5VREF_SUS_SB

+1.5V_B

L25
FBMJ2125HS420-T_8

+1.5V

Intel use 0.5UH inductor

+ C395

C414

C413

C388

220U/2.5V_710U/10V_8 10U/10V_8 2.2U/6.3V

+1.5V

C455

C456

10U/6.3V

1U/16V

C433
1U/16V

C377
.1U/10V_4

G4

VCC1_5_B[01]
VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]

AJ6

VCCSATAPLL

AE7
AF7
AG7
AH7
AJ7

VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]

AC1
AC2
AC3
AC4
AC5

VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]
VCC1_5_A[09]
VCC1_5_A[10]

AC10
AC9

VCC1_5_A[11]
VCC1_5_A[12]

AA5
AA6

VCC1_5_A[13]
VCC1_5_A[14]

G12
G17
H7

VCC1_5_A[15]
VCC1_5_A[16]
VCC1_5_A[17]

AC7
AD7

VCC1_5_A[20]
VCC1_5_A[21]
VCC1_5_A[22]
VCC1_5_A[23]
VCC1_5_A[24]

W23

VCC1_5_A[25]

F17
G18

VCCLAN1_05[1]
VCCLAN1_05[2]

+3V

R231

+3V_VCCLAN

F19
G20

VCCLAN3_3[1]
VCCLAN3_3[2]

+1.5V_VCCGLANPLL

A24

VCCGLANPLL

+1.5V_GLAN

A26
A27
B26
B27
B28

VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]
VCCGLAN1_5[5]

B25

VCCGLAN3_3

+1.5V

0
C386
.1U/10V_4

+1.5V

R445

1_8 +1.5V_GLANP L52

1UH_12

C573

C576

10U/6.3V

2.2U/6.3V

GLAN POWER

F1
L6
L7
M6
M7

USB CORE

VCCUSBPLL

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]

+1.05V

A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

VCCDMIPLL

R29

VCC_DMI[1]
VCC_DMI[2]

AE28
AE29

V_CPU_IO[1]
V_CPU_IO[2]

AC23
AC24

VCC3_3[01]

AF29

VCC3_3[02]

AD2

VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]

AC8
AD8
AE8
AF8

VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]

AA3
U7
V7
W1
W6
W7
Y7

VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]

A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11

C396
C398

+1.25V_DMI

R243
C430

C431

C423

.1U/10V_4

.1U/10V_4

4.7U/10V
+3V

C436

C437

.1U/10V_4

.1U/10V_4

C420
.1U/10V_4

C369

C367

C378

.1U/10V_4 .1U/10V_4 .1U/10V_4

TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2

AC16

TP_VCCSUS1_5_ICH_1

P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6

+1.05V

0_8

+1.05V_V_CPU_IO

J6
AF20

VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]

R478

10U/10V_8

VCCSUS1_05[1]
VCCSUS1_05[2]

AC18
AC21
AC22
AG20
AH28

1_8

C616

C619

+VCCSUSHDA

VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]
VCCSUS3_3[06]

R471

+1.25V

AD11

J7

L54 +1.5V_ICH

.01U/16V_4 10U/6.3V

VCCSUSHDA

C3

1UH_12
C615

+3V_1.5V_HDA_IO_ICH

VCCSUS1_5[2]

U34E

.1U/10V_4

VCCDMIPLL_ICH

AC12

VCCSUS3_3[01]

.1U/10V_4

+1.5V

VCCHDA

VCCSUS1_5[1]

VCC1_5_A[18]
VCC1_5_A[19]

D1

C403
.1U/10V_4

V5REF_SUS

AA25
AA26
AA27
AB27
AB28
AB29
D28
D29
E25
E26
E27
F24
F25
G24
H23
H24
J23
J24
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25
W25
Y25

ATX

1U/16V

V5REF[1]
V5REF[2]

ARX

C426

A16
T7

VCCA3GP

+1.5V_APLL
L29
10UH_8
<Part Number>

VCCRTC

CORE

100

AD25

VCCP_CORE

R244

U34F

IDE

PDZ5.6B

+5V

+1.05V

C434

PCI

10

R227

PDZ5.6B
+5V_S5

C424

1U/6.3V_4.1U/10V_4.1U/10V_4

VCCPSUS

C427
D19

VCCPUSB

D18

+VCCRTC

+3V_S5

R245

*0

+1.5V_S5

C422

R517

+3V_S5

.1U/16V

Can be connect to
+3V_S5 or +1.5V_S5

R516

+3V

R247

*0

+1.5V

C429

Can be connect to
or +1.5V

.1U/10V_4
+3V

+3V_S5

TP_VCCSUS1_5_ICH_2

C368

C366

.1U/10V_4 .022U/16V_4

+V3.3A_USB_ICH

R241

0_8

C411
4.7U/10V
TP_VCCSUS1_05_ICH_1
TP_VCCSUS1_05_ICH_2

VCCCL1_05

G22

TP_VCCCL1_05_ICH

VCCCL1_5

A22

VCCCL1_5_INT_ICH

VCCCL3_3[1]
VCCCL3_3[2]

F20
G21

+V3.3M_ICH

C392
C454

TP_VCCSUS1_5_ICH_1
TP_VCCSUS1_5_ICH_2
TP_VCCCL1_05_ICH
C574

C575

1U/16V

*.1U_4

.1U/16V
.1U/16V
T60
T54
T52

A23
A5
AA2
AA7
A25
AB1
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29
AD3
AD4
AD6
AE1
AE12
AE2
AE22
AD1
AE25
AE5
AE6
AE9
AF14
AF16
AF18
AF3
AF4
AG5
AG6
AH10
AH13
AH16
AH19
AH2
AF28
AH22
AH24
AH26
AH3
AH4
AH8
AJ5
B11
B14
B17
B2
B20
B22
B8
C24
C26
C27
C6
D12
D15
D18
D2
D4
E21
E24
E4
E9
F15
E23
F28
F29
F7
G1
E2
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6

VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]

VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]

K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

ICH8M REV 1.0

A

ICH8M REV 1.0

+1.5V

R452

PROJECT : ZD1

C577
R228

4.7U/10V
+3V

R209

+3V

Quanta Computer Inc.

+3V_GLAN

Size

Document Number

Date:

Wednesday, April 25, 2007

Rev
E

ICH8M Power(4/4)
5

Sheet
1

15

of

38

+SMDDR_VREF

+1.8VSUS

+1.8VSUS

+SMDDR_VREF
+SMDDR_VTERM
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4

CN25

M_A_DQS#0
M_A_DQS0

M_A_DQ2
M_A_DQ3
M_A_DQ8
M_A_DQ9
M_A_DQS#1
M_A_DQS1
M_A_DQ11
M_A_DQ14

M_A_DQ16
M_A_DQ21
M_A_DQS#2
M_A_DQS2
M_A_DQ19
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DM3
M_A_DQ31
M_A_DQ30
M_CKE0
C

M_A_BS2
M_A_A12
M_A_A9
M_A_A8
M_A_A5
M_A_A3
M_A_A1
M_A_A10
M_A_BS0
M_A_WE#
M_A_CAS#
M_CS#1
M_ODT1
M_A_DQ37
M_A_DQ33
M_A_DQS#4
M_A_DQS4
M_A_DQ34
M_A_DQ35
M_A_DQ40
M_A_DQ41
M_A_DM5

M_A_DQ53
M_A_DQ48

M_A_DQS#6
M_A_DQS6
M_A_DQ50
M_A_DQ51
M_A_DQ56
M_A_DQ61
M_A_DM7
M_A_DQ62
M_A_DQ59
PDAT_SMB
PCLK_SMB
+3V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

M_A_DQ26
M_A_DQ27

RP17
1
3
RP22
M_A_A2
1
M_A_A4
3
RP21
M_A_A5
1
M_A_A3
3
RP25
M_A_A6
1
M_A_A7
3
RP24
M_A_A8
1
M_A_A1
3
RP27
M_A_A11
1
M_A_A9
3
RP6
M_ODT0
1
M_A_A13
3
RP14
M_A_RAS#
1
M_A_BS1
3
RP31
M_A_A12
1
M_A_BS2
3
RP13
M_A_WE#
1
M_A_CAS#
3
RP10
M_CS#0
1
M_A_A0
3
RP28
M_CKE0
1
M_CKE1
3
RP9
M_CS#1
1
M_ODT1
3

M_CKE1

M_A_A14 R180

M_A_DQ4
M_A_DQ5
M_A_DM0
M_A_DQ6
M_A_DQ7
M_A_DQ12
M_A_DQ13
M_A_DM1
M_CLK0
M_CLK#0
M_A_DQ10
M_A_DQ15

M_A_DQ20
M_A_DQ17
PM_EXTTS#0
M_A_DM2
M_A_DQ18
M_A_DQ22
M_A_DQ28
M_A_DQ29
M_A_DQS#3
M_A_DQS3

M_A_A10
M_A_BS0

+1.8VSUS

M_B_DQ0
M_B_DQ1
M_B_DQS#0
M_B_DQS0
M_B_DQ3
M_B_DQ2
M_B_DQ8
M_B_DQ9
M_B_DQS#1
M_B_DQS1
M_B_DQ10
M_B_DQ11

M_B_DQS#2
M_B_DQS2
M_B_DQ19
M_B_DQ23
M_B_DQ25
M_B_DQ24
M_B_DM3
M_B_DQ26
M_B_DQ27

M_B_BS2

M_A_A11
M_A_A7
M_A_A6

M_B_A12
M_B_A9
M_B_A8

M_A_A4
M_A_A2
M_A_A0
M_A_BS1
M_A_RAS#
M_CS#0
M_ODT0
M_A_A13

M_A_DQ36
M_A_DQ32

+SMDDR_VTERM
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4

+SMDDR_VREF

M_A_DM4
M_A_DQ38
M_A_DQ39
M_A_DQ44
M_A_DQ45

C333

.1U/16V_4

C337

1U/10V_4
+1.8VSUS

M_A_DQS#5
M_A_DQS5

C545
C244
C260
C194
C184
C266
C212
C242
C224
C248

M_A_DQ46
M_A_DQ42
M_A_DQ52
M_A_DQ49
M_CLK1
M_CLK#1

M_B_A5
M_B_A3
M_B_A1
M_B_A10
M_B_BS0
M_B_WE#
M_B_CAS#
M_CS#3
M_ODT3
M_B_DQ32
M_B_DQ36
M_B_DQS#4
M_B_DQS4
M_B_DQ39
M_B_DQ38
M_B_DQ44
M_B_DQ45

330U/2.5V_7
M_B_DM5
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4

M_B_DQ47
M_B_DQ43
M_B_DQ48
M_B_DQ49

M_B_DQS#6
M_B_DQS6

M_A_DM6
+3V

M_A_DQ54
M_A_DQ55
C123

M_A_DQ60
M_A_DQ57

C127

.1U/16V_4
1U/10V_4

M_A_DQS#7
M_A_DQS7

M_B_DQ50
M_B_DQ51
M_B_DQ56
M_B_DQ57
M_B_DM7
M_B_DQ58
M_B_DQ59

M_A_DQ58
M_A_DQ63
A_SA0
A_SA1

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

M_B_DQ17
M_B_DQ20

M_A_A14

C169
C190
C175
C234
C222
C275
C231
C274
C277
C176
C276
C178
C278
C177

A_SA0
A_SA1

R99
R94

10K_4
10K_4

PDAT_SMB
PCLK_SMB
+3V

DDR2_SODIMM_H5.2_RVS

SO-DIMM0

+1.8VSUS
+SMDDR_VTERM
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4
56X2_4
2
4

CN24
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

M_CKE2

56_4

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

VSS18
DQ16
DQ17
VSS1
DQS#2
DQS2
VSS19
DQ18
DQ19
VSS22
DQ24
DQ25
VSS23
DM3
NC4
VSS9
DQ26
DQ27
VSS4
CKE0
VDD7
NC1
A16_BA2
VDD9
A12
A9
A8
VDD5
A5
A3
A1
VDD10
A10/AP
BA0
WE#
VDD2
CAS#
S1#
VDD3
ODT1
VSS11
DQ32
DQ33
VSS26
DQS#4
DQS4
VSS2
DQ34
DQ35
VSS27
DQ40
DQ41
VSS29
DM5
VSS51
DQ42
DQ43
VSS40
DQ48
DQ49
VSS52
NCTEST
VSS30
DQS#6
DQS6
VSS31
DQ50
DQ51
VSS33
DQ56
DQ57
VSS3
DM7
VSS34
DQ58
DQ59
VSS14
SDA
SCL
VDD(SPD)

VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

M_B_DQ31
M_B_DQ30

RP20
1
3
RP19
M_B_A3
1
M_B_A5
3
RP23
M_B_A4
1
M_B_A6
3
RP26
M_B_A7
1
M_B_A11
3
RP29
M_B_A9
1
M_B_A12
3
RP18
M_B_BS1
1
M_B_A2
3
RP7
M_ODT2
1
M_B_A13
3
RP16
M_B_BS0
1
M_B_WE#
3
RP32
M_CKE2
1
M_B_BS2
3
RP12
M_B_CAS#
1
M_B_A10
3
RP15
M_CS#2
1
M_B_RAS#
3
RP30
M_CKE3
1
M_B_A8
3
RP8
M_CS#3
1
M_ODT3
3

M_CKE3

M_B_A14R175

M_B_DQ4
M_B_DQ5
M_B_DM0
M_B_DQ6
M_B_DQ7
M_B_DQ12
M_B_DQ13
M_B_DM1
M_CLK2
M_CLK#2
M_B_DQ15
M_B_DQ14

M_B_DQ16
M_B_DQ21
PM_EXTTS#1
M_B_DM2
M_B_DQ18
M_B_DQ22
M_B_DQ29
M_B_DQ28
M_B_DQS#3
M_B_DQS3

M_B_A0
M_B_A1

56_4

M_B_A14
M_B_A11
M_B_A7
M_B_A6

+1.8VSUS
R204
R202

+SMDDR_VTERM
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4

C283
C183
C199
C251
C187
C240
C230
C271
C272
C170
C255
C236
C261
C273

M_B_BS1
M_B_RAS#
M_CS#2
M_ODT2
M_B_A13

M_B_DQ37
M_B_DQ33

<7> PM_EXTTS#1

PM_EXTTS#1

<7> PM_EXTTS#0

PM_EXTTS#0

+SMDDR_VREF

M_B_DQ34
M_B_DQ35

C335

M_B_DQ41
M_B_DQ40

.1U/16V_4

C336

PCLK_SMB
M_CS#[3:0]

<7> M_CS#[3:0]

M_ODT[3:0]

<7> M_ODT[3:0]

M_CKE[3:0]

<7> M_CKE[3:0]

M_CLK#[3:0]

<7> M_CLK#[3:0]

M_CLK[3:0]

<7> M_CLK[3:0]

M_A_CAS#

<8> M_A_CAS#

M_A_RAS#

<8> M_A_RAS#

M_A_WE#

+1.8VSUS

M_B_DQS#5
M_B_DQS5

C519

M_B_DQ46
M_B_DQ42

C259
C216
C197
C267
C223
C204
C211
C195
C268

M_B_DQ52
M_B_DQ53
M_CLK3
M_CLK#3
M_B_DM6

M_A_BS[2:0]

<8> M_A_BS[2:0]

M_A_DM[7:0]

<8> M_A_DM[7:0]

M_A_DQS#[7:0]

<8> M_A_DQS#[7:0]

1U/10V_4

330U/2.5V_7
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4
.1U/16V_4

M_A_DQS[7:0]

<8> M_A_DQS[7:0]

M_A_A[14:0]

<8> M_A_A[14:0]

M_A_DQ[63:0]

<8> M_A_DQ[63:0]

M_B_CAS#

<8> M_B_CAS#

M_B_RAS#

<8> M_B_RAS#

M_B_WE#

<8> M_B_WE#

M_B_BS[2:0]

<8> M_B_BS[2:0]

M_B_DQ54
M_B_DQ55

+3V

M_B_DQ60
M_B_DQ61

C125
C122

M_B_DQS#7
M_B_DQS7

.1U/16V_4

M_B_DM[7:0]

<8> M_B_DM[7:0]

M_B_DQS#[7:0]

<8> M_B_DQS#[7:0]

M_B_DQS[7:0]

<8> M_B_DQS[7:0]

1U/10V_4

M_B_A[14:0]

<8> M_B_A[14:0]

M_B_DQ[63:0]

<8> M_B_DQ[63:0]

M_B_DQ62
M_B_DQ63

PDAT_SMB

<8> M_A_WE#

M_B_DM4

*1K_4
*1K_4

<2,14,22,23> PCLK_SMB

M_B_A4
M_B_A2
M_B_A0

B_SA0
B_SA1

+SMDDR_VREF

<2,14,22,23> PDAT_SMB

M_A_DQ47
M_A_DQ43

VSS46
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VREF
VSS47
DQ0
DQ1
VSS37
DQS#0
DQS0
VSS48
DQ2
DQ3
VSS38
DQ8
DQ9
VSS49
DQS#1
DQS1
VSS39
DQ10
DQ11
VSS50

PC4800 DDR2 SDRAM

SO-DIMM (200P)

M_A_DQ0
M_A_DQ1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

PC4800 DDR2 SDRAM

SO-DIMM (200P)

+3V
B_SA1
B_SA0

R96
R95

10K_4
10K_4

DDR2_SODIMM_H9.2_RVS

SMbus address A0

Close to DIMM0

SO-DIMM1

SMbus address A2

Close to DIMM1
A

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Rev
E

DDRII SO-DIMM
Date:
5

Sheet

Monday, May 07, 2007

1

16

of

38

121
123

CLK_MXM#
CLK_MXM

PEX_RX0#
PEX_RX1#
PEX_RX2#
PEX_RX3#
PEX_RX4#
PEX_RX5#
PEX_RX6#
PEX_RX7#
PEX_RX8#
PEX_RX9#
PEX_RX10#
PEX_RX11#
PEX_RX12#
PEX_RX13#
PEX_RX14#
PEX_RX15#

3V3RUN
3V3RUN
3V3RUN

+2.5V
222

2V5RUN

+1.8V_MXM

3.5Amp
0C Change power
name from +1.8V to
+1.8V_MXM 0108

PEG_RXN[15:0] <6>
<18> EV_LVDS_UCLK#
<18> EV_LVDS_UCLK
<18> EV_LVDS_UTX#0
<18> EV_LVDS_UTX#1
<18> EV_LVDS_UTX#2

<18> EV_LVDS_UTX0
<18> EV_LVDS_UTX1
<18> EV_LVDS_UTX2

PEG_RXP[15:0] <6>

118
112
106
100
94
88
82
76
70
64
58
52
46
40
34
28

<18> EV_LVDS_LTX#0
<18> EV_LVDS_LTX#1
<18> EV_LVDS_LTX#2

<18> EV_LVDS_LTX0
<18> EV_LVDS_LTX1
<18> EV_LVDS_LTX2
<18> EV_LVDS_VDDEN
<23> EV_LVDS_BLON
<18> EV_LVDS_BL_BRGHT
<18> EV_LVDS_DDCCLK
<18> EV_LVDS_DDCDAT

148
150

LVDS_UCLK#
LVDS_UCLK

DVI_A_CLK#
DVI_A_CLK

207
209

HDMICLKHDMICLK+

EV_LVDS_UTX#0
EV_LVDS_UTX#1
EV_LVDS_UTX#2

172
166
160
154

LVDS_UTX0#
LVDS_UTX1#
LVDS_UTX2#
LVDS_UTX3#

DVI_A_TX0#
DVI_A_TX1#
DVI_A_TX2#

225
219
213

HDMITX0N
HDMITX1N
HDMITX2N

EV_LVDS_UTX0
EV_LVDS_UTX1
EV_LVDS_UTX2

174
168
162
156

LVDS_UTX0
LVDS_UTX1
LVDS_UTX2
LVDS_UTX3

DVI_A_TX0
DVI_A_TX1
DVI_A_TX2

227
221
215

HDMITX0P
HDMITX1P
HDMITX2P

DVI_A_HPD

205

HDMI_HP_A

EV_LVDS_LCLK#
EV_LVDS_LCLK

178
180

LVDS_LCLK#
LVDS_LCLK

DDCB_CLK
DDCB_DAT

220
218

MXM_HDMI_DDCCLK_R
MXM_HDMI_DDCDATA_R

EV_LVDS_LTX#0
EV_LVDS_LTX#1
EV_LVDS_LTX#2

202
196
190
184

LVDS_LTX0#
LVDS_LTX1#
LVDS_LTX2#
LVDS_LTX3#

IGP/DVI_B_CLK#
IGP/DVI_B_CLK

177
179

EV_LVDS_LTX0
EV_LVDS_LTX1
EV_LVDS_LTX2

204
198
192
186

LVDS_LTX0
LVDS_LTX1
LVDS_LTX2
LVDS_LTX3

IGP/DVI_B_TX0#
IGP/DVI_B_TX1#
IGP_/DVI_B_TX2#

201
195
189

EV_LVDS_VDDEN
EV_LVDS_BLON
EV_LVDS_BL_BRGHT

212
216
214

LVDS_PPEN
LVDS_BLEN
LVDS_BL_BRGHT

IGP/DVI_B_TX0
IGP/DVI_B_TX1
IGP_DVI_B_TX2

203
197
191

EV_LVDS_DDCCLK
EV_LVDS_DDCDAT

210
208

DDCC_CLK
DDCC_DAT

DVI_B_HPD/GND

181

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

<19> EV_CRT_HSYNC
<19> EV_CRT_VSYNC

EV_CRT_HSYNC
EV_CRT_VSYNC

<19> EV_CRT_R
<19> EV_CRT_G
<19> EV_CRT_B

139
141

VGA_HSYNC
VGA_VSYNC

EV_CRT_R
EV_CRT_G
EV_CRT_B

136
140
144

VGA_RED
VGA_GREEN
VGA_BLUE

EV_CRT_DDCCLK
EV_CRT_DDCDAT

143
145

DDCA_CLK
DDCA_DAT

IGP
IGP
IGP
IGP
IGP
IGP
IGP
IGP
IGP
IGP
IGP

147
149
151
159
161
163
165
167
169
171
173

<19> EV_CRT_DDCCLK
<19> EV_CRT_DDCDAT

<19> EV_TV_Y/G
<19> EV_TV_C/R

EV_TV_Y/G

128

TV_Y/HDTV_Y/TV_CVBS

EV_TV_C/R

124

TV_C/HDTV_Pr

EV_TV_COMP

132

TV_CVBS/HDTV_Pb

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

185
183
155
153
131
129

PEG_TXP[15:0] <6>

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

<19> EV_TV_COMP

MXMDATA
MXMCLK

HDMITX0P <23>
HDMITX1P <23>
HDMITX2P <23>
HDMI_HP_A <23>

+3V

THERM#

133
135

RUNPWROK

SMB_DAT
SMB_CLK

AC/BATT#

16

MXM_PWROK

157

MXM_ACIN

R528
D44

VIN

MXM_CLK <31>

C289

C287

C288

C290

C64

EVPRSNT1# R188

EV@0_4

Q8
EV@RHU002N06

EV@4.7U/25V_8 EV@4.7U/25V_8 EV@4.7U/25V_8

<26> MXM_SPDIF_OUT

C256

EV@10U/10V_8 EV@.1U/16V_4*EV@.1u_4

Q53
EV@2N7002E

EV@.1U/25V_4 EV@.1U/25V_4 EV@.1U/25V_4

ACIN <22,31,32>

Modify Rev:D
3

MXM_DATA <31>

C294

*EV@.1u_4

C562

*EV@.1u_4

+3V

C561

*EV@.1u_4

C280
MXMCLK

R81

EV@4.7K_4

MXMDATA

R86

EV@4.7K_4

+1.8V_MXM

+2.5V
C286

C548

+5V

C550

C549

PROJECT : ZD1

C551

+ C647
EV@1U/10V_4 EV@.1U/16V_4

330U/2.5V_7

EV@10U/10V_8 EV@.1U/16V_4

EV@1U/10V_4 EV@.1U/16V_4

Quanta Computer Inc.

Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

MXM

change from 10k to 4.7k , NV suggestion. on 10/20

5

R541
*EV@10K_4

0C Change power name from +1.8V to +1.8V_MXM

0108

+3V

C282

+3V

C50

+3V
122
26

PWROK_MXM <31>

ACIN
*EV@BAS316

10K

Q7
EV@RHU002N06

EV@0_4

Q52
EV@DTA114YUA
3

+3V

MXMCLK

PRSNT1#
PRSNT2#

R530
*10K_4

EV@MXM CONNECTOR_2

MXMDATA

C284

HDMITX0N <23>
HDMITX1N <23>
HDMITX2N <23>

0C Connect to EC 0104

EV@0_4 THERM# 137

R196

<3,14> THERM_ALERT#

EV@MXM CONNECTOR_2

HDMICLK- <23>
HDMICLK+ <23>

47K

120
114
108
102
96
90
84
78
72
66
60
54
48
42
36
30

EV_LVDS_UCLK#
EV_LVDS_UCLK

PEG_TXN[15:0] <6>

PEG_TXP[15:0]
PEX_TX0
PEX_TX1
PEX_TX2
PEX_TX3
PEX_TX4
PEX_TX5
PEX_TX6
PEX_TX7
PEX_TX8
PEX_TX9
PEX_TX10
PEX_TX11
PEX_TX12
PEX_TX13
PEX_TX14
PEX_TX15

<18> EV_LVDS_LCLK#
<18> EV_LVDS_LCLK

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

PEG_TXN[15:0]
PEX_TX0#
PEX_TX1#
PEX_TX2#
PEX_TX3#
PEX_TX4#
PEX_TX5#
PEX_TX6#
PEX_TX7#
PEX_TX8#
PEX_TX9#
PEX_TX10#
PEX_TX11#
PEX_TX12#
PEX_TX13#
PEX_TX14#
PEX_TX15#

0_4

CN27B

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

TV

MXM_SPDIF_OUT

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

117
111
105
99
93
87
81
75
69
63
57
51
45
39
33
27

R410

CLK_MXM# <2>
CLK_MXM <2>

PEG_RXP[15:0]
PEX_RX0
PEX_RX1
PEX_RX2
PEX_RX3
PEX_RX4
PEX_RX5
PEX_RX6
PEX_RX7
PEX_RX8
PEX_RX9
PEX_RX10
PEX_RX11
PEX_RX12
PEX_RX13
PEX_RX14
PEX_RX15

0_4

CRT

17
19
20
21
22
23
24
29
32
35
38
41
44
47
50
53
56
59
62
65
68
71
74
77
80
83
86
89
92
95
98
101
104
107
110
113
116
119
126
130
134
138
142
146
152
158
164
170
175
176
182
187
188
193
194
199
200
206
211
217
223
224
229

1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN
1V8RUN

R297

LVDS

2
4
6
8
10
12
14

MXM_HDMI_DDCCLK <23>

0.5Amp

115
109
103
97
91
85
79
73
67
61
55
49
43
37
31
25

3MXM_HDMI_DDCCLK

PLTRST# <13,14,20,22..24,29..31>

PEG_RXN[15:0]

5VRUN

0F Modify 0425
*EV@RHU002N06

226
228
230

+3V

*4.7K_4
Q55

PEX_REFCLK#
PEX_REFCLK

+3V

1.5Amp

R75

MXM_HDMI_DDCCLK_R

MXM_HDMI_DDCDATA <23>

DVI-A

PLTRST#

3MXM_HDMI_DDCDATA

DVI

127

MXM_HDMI_DDCDATA_R

*EV@RHU002N06

DVI-B

18

PEX_RST#

PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC
PWR_SRC

+5V

0.5Amp

CLK_REQ#

125

4Amp

+3V

*4.7K_4
Q54

1
3
5
7
9
11
13
15

R63
0C Change footprint 0103

CN27A

VIN

+3V

+3V

Sheet
1

17

of

38

LVDS

+5V

TXLCLKOUTTXLCLKOUT+

RN6

2
4

1 IV@0X2
3

INT_TXLCLKOUT- <6>
INT_TXLCLKOUT+ <6>

TXLOUT0TXLOUT0+

RN15 4
2

3 IV@0X2
1

INT_TXLOUT0- <6>
INT_TXLOUT0+ <6>

TXLOUT1TXLOUT1+

RN17 2
4

1 IV@0X2
3

INT_TXLOUT1- <6>
INT_TXLOUT1+ <6>

TXLOUT2TXLOUT2+

RN12 4
2

3 IV@0X2
1

INT_TXLOUT2- <6>
INT_TXLOUT2+ <6>

+3V

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41

<23> DISPON

VIN

R9

0_8 INVCC0

TXUOUT2+
TXUOUT2TXLOUT0+
TXLOUT0-

RN5

1
3

2 EV@0X2
4

EV_LVDS_LCLK# <17>
EV_LVDS_LCLK <17>

RN14 3
1

4 EV@0X2
2

EV_LVDS_LTX#0 <17>
EV_LVDS_LTX0 <17>

RN16 1
3

2 EV@0X2
4

EV_LVDS_LTX#1 <17>
EV_LVDS_LTX1 <17>

RN11 3
1

4 EV@0X2
2

EV_LVDS_LTX#2 <17>
EV_LVDS_LTX2 <17>

R5
R7
R6

CN1
LCDVCC

TXLOUT2+
TXLOUT2TXUCLKOUT+
TXUCLKOUT-

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42

LVDS_VADJ
USBP7-_R
USBP7+_R

0_4
*EV@0_4
*IV@0_4

3
1

TXUOUT1+
TXUOUT1-

EC_L_BKLT_CTRL <31>
EV_LVDS_BL_BRGHT <17>
L_BKLT_CTRL <6>
CCD_POWER <21>
USBP7- <13>
USBP7+ <13>

4
2
RP1

0X2

TXLCLKOUT+
TXLCLKOUTTXLOUT1+
TXLOUT1TXUOUT0+
TXUOUT0LCD_EDIDDATA
LCD_EDIDCLK

ACES_88242-40XX_LVDS

+5V

+3V

C12

C4

1000P/50V_4

TXUCLKOUTTXUCLKOUT+

RN2

2
4

1 IV@0X2
3

INT_TXUCLKOUT- <6>
INT_TXUCLKOUT+ <6>

TXUOUT0TXUOUT0+

RN4

4
2

3 IV@0X2
1

INT_TXUOUT0- <6>
INT_TXUOUT0+ <6>

TXUOUT1TXUOUT1+

RN8

2
4

1 IV@0X2
3

INT_TXUOUT1- <6>
INT_TXUOUT1+ <6>

TXUOUT2TXUOUT2+

RN10

4
2

3 IV@0X2
1

INT_TXUOUT2- <6>
INT_TXUOUT2+ <6>

RN1

1
3

2 EV@0X2
4

EV_LVDS_UCLK# <17>
EV_LVDS_UCLK <17>

RN3

3
1

4 EV@0X2
2

EV_LVDS_UTX#0 <17>
EV_LVDS_UTX0 <17>

RN7

1
3

2 EV@0X2
4

EV_LVDS_UTX#1 <17>
EV_LVDS_UTX1 <17>

RN9

3
1

4 EV@0X2
2

EV_LVDS_UTX#2 <17>
EV_LVDS_UTX2 <17>

1000P/50V_4

+3V

C3
+3V

R399

<6> INT_LVDS_DIGON

2.2K_4
<17> EV_LVDS_DDCCLK

VIN

<6> INT_LVDS_EDIDCLK

R400

EV@0_4

R398

IV@0_4

<17> EV_LVDS_VDDEN

*10U

2.2K_4
<17> EV_LVDS_DDCDAT
<6> INT_LVDS_EDIDDATA

EV@0_4

DISP_ON

IN

OUT

IN

GND

ON/OFF

GND

LCDVCC_1

R10

C23

0_8
C17

.1U/10V_4

LCDVCC
C14

2.2U/10V_8

C13

C16

.1U/10V_4 .01U/16V_4 2.2U/10V_8

AAT4280
R12

C22
1000P/X7R/50V_4

IV@0_4

R13

<demo circuit>
Crestline suggest 100K
G73 suggest 10K(ZS1 Default)100K_4
(Need to confirm with Max)

R393
C21

R14

LCD_EDIDCLK

+3V

U1

.1U/10V_4

R394

EV@0_4

R392

IV@0_4

LCD_EDIDDATA

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Rev
E

LVDS
Date:
5

Monday, May 07, 2007

Sheet
1

18

of

38

CRT CONNECTOR AND ESD

<17> EV_CRT_G
<17> EV_CRT_B
<17> EV_CRT_HSYNC
<17> EV_CRT_VSYNC
<17> EV_CRT_DDCCLK
<17> EV_CRT_DDCDAT

<6> INT_CRT_RED
<6> INT_CRT_GRN
<6> INT_CRT_BLU
<6> INT_HSYNC
<6> INT_VSYNC
<6> INT_CRT_DDCCLK
<6> INT_CRT_DDCDAT

R30

EV@0_4

SYS_VGA_RED

R32

EV@0_4

SYS_VGA_GRN

R35

EV@0_4

SYS_VGA_BLU

R28

EV@0_4

HSYNC

SYS_VGA_RED

L3

BLM18BA220SN1

CRT_R1

R25

EV@0_4

VSYNC

SYS_VGA_GRN

L2

BLM18BA220SN1

CRT_G1

R20

EV@0_4

CRTDCLK

SYS_VGA_BLU

L1

BLM18BA220SN1

R17

EV@0_4

CRTDDAT

R29

IV@0_4

R31

IV@0_4

R34

IV@0_4

R27

IV@0_4

R24

IV@0_4

R19

IV@0_4

R18

IV@0_4

D1

+5V

SSM14

CRTVDD3

CN13
CRT

R15

R11

R8

C26

150/F_4

150/F_4 150/F_4

C20

C15

CRT_B1

C11

10P/50V_410P/50V_4
10P/50V_4

6
1
7
2
8
3
9
4
10
5

C19

C25

10P/50V_410P/50V_4
10P/50V_4

11

CRT_11

12

DDCDAT_1

13

CRTHSYNC

14

CRTVSYNC

15

DDCCLK_1

D3
*MTW355

D2

+5V

U2

CRTVDD3
C30
.1U/10V_4

CRT_BYP
.22U/25V

C28

T1

17

<17> EV_CRT_R

16

CRT Select

7
8
2

+3V
SYS_VGA_RED
C29
.1U/10V_4SYS_VGA_GRN
SYS_VGA_BLU

3
4
5
6

VCC_SYNC SYNC_OUT2
SYNC_OUT1
VCC_DDC
BYP
SYNC_IN2
VCC_VIDEO
SYNC_IN1
VIDEO_1
VIDEO_2
VIDEO_3
GND

16
14

CRT_VSYNC1
CRT_HSYNC1

15
13

VSYNC
HSYNC

DDC_IN1
DDC_IN2

10
11

CRTDCLK
CRTDDAT

DDC_OUT1
DDC_OUT2

9
12

DDCCLK_1
DDCDAT_1

L4
L5

BLM18BA220SN1
BLM18BA220SN1

CRTVSYNC
CRTHSYNC
CRTVDD3

R23
R22

2.7K_4
2.7K_4

R26
2.7K_4

+3V

R21
2.7K_4

MTW355

CRT_SENSE# <13,31>

C10

.1U/10V_4

C9

*10P_4

CRTVSYNC

CRTVDD3

C18

*10P_4

CRTHSYNC

C8

10P/50V_4

DDCCLK_1

C24

10P/50V_4

DDCDAT_1

IP4772

R373

EV@0_4

SYS_TV_C/R

R377

EV@0_4

SYS_TV_COMP

R379

IV@0_4

R371

IV@0_4

R374

IV@0_4

SYS_TV_C/R

CN22
4

C525
6P/50V_4

C526

TV-LUMA

L42

BLM18PG181SN1D

C531

6P/50V_4

6P/50V_4

<6> INT_TV_C/R
<6> INT_TV_COMP

BLM18PG181SN1D
TV-CHROMA

TV_OUT

L41

TV-COMP

6P/50V_4

R381

6P/50V_4

150/F_4

SYS_TV_COMP

R375

C527
6P/50V_4

150/F_4

FOR ESD

D36
3

TV-COMP

TV-LUMA

DA204U

DA204U

DA204U

D38
3

TV-CHROMA

D37
3

+3V

+3V

+3V

C533

BLM18PG181SN1D

C528

D2C: NEW ADD

SYS_TV_Y/G
C

R372
150/F_4

<6> INT_TV_Y/G

L40

SYS_TV_Y/G

<17> EV_TV_COMP

EV@0_4

<17> EV_TV_C/R

R380

<17> EV_TV_Y/G

TV Out (SVHS) MiniDIN 7-pin

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

CRT/TVOUT
1

Sheet

19
8

of

38

LAN

+3V_S5

Q11
DTC144EUA

R107
4.7K_4
+3V_S5
PCIE_WAKE_R#

VAUX_25

+3V_S5

C120
.1U/16V_4

BLM11A601S

L8

AVDDL
C78

C72

2.2U/10V_8

.1U/16V_4

C68

GPHY_PLLVDD
C74

2.2U/10V_8

.1U/16V_4

C87

PCIE_PLLVDD
C98

2.2U/10V_8

.1U/16V_4

BLM11A601S

VAUX_12

L11

BLM11A601S

L12

BLM11A601S

PCIE_SDS_VDD
C92

C96
2.2U/10V_8

<13>
<13>
<13>
<13>

C103
C105

GLAN_RXP
GLAN_RXN
GLAN_TXP
GLAN_TXN
R91

<13,14,17,22..24,29..31> PLTRST#
<2> CLK_PCIE_LAN
<2> CLK_PCIE_LAN#

0_4

R71
R70
R598
R90
R77
R73

+3V_S5
+3V
LAN_LOWPWR

<31> LAN_LOWPWR

.1U/16V_4
.1U/16V_4

+3V_S5

.1U/16V_4

AUX_PRES
VMA_PRES
LAN_SMBC
LAN_SMBD

35

GPHY_PLLVDD

30

C73
.1U/16V_4

XTALVDD

23

XTALVDD

BCM5787M
10mm X 10mm
68-Pin QFN

27
33

PCIE_VDD
PCIE_VDD

24

PCIE_GND

54
53
3

VAUXPRSNT
VMAINPRSNT
LOW_PWR

58
57

SMB_CLK
SMB_DATA
XTALO
XTALI

RDAC

37

RDAC

38

AVDD

45

AVDD_F14

AVDD

52

TRD3TRD3+

49
50

TX3N
TX3P

TRD2TRD2+

48
47

TX2N
TX2P

TRD1TRD1+

42
43

TX1N
TX1P

TRD0TRD0+

41
40
2
1
67
66

C88
.1U/16V_4

T12

9
7
4

T13

NC/(ENERGY_DET)

59

REGCTL25

18

REGCTL12
NC(CLK_REQ#)

REG_GND

MCT2
MX2+
MX2-

21
20
19

TX2P
TX2N

7
8
9

X-TX1P
X-TX1N

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

18
17
16

X-TX2P
X-TX2N

TX3P
TX3N

10
11
12

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

15
14
13

X-TX3P
X-TX3N

R88
4.7K_4

R92
*4.7K_4

R97
4.7K_4

R39
75/F_4

R38
75/F_4

U5
8
7
6
5

BCM_SCL
SI

BCM_SDA

VCC
WP
SCL
SDA

A0
A1
NC
GND

1
2
3
4

CS#
R599

0_4

AT24C64

LAN_ENERGYDET

LAN_ENERGYDET <31>

Broadcom recommended cost down solution

LAN REGCTL25

14

C119
Q9
MMJT9435

C133

.1U/16V_4

D8
LINKLED# 1
D9
100# 1
D7
1000# 1

2.2U/10V_8

LAN REGCTL12
VAUX_25

16

BAS316
2
BAS316
2
BAS316
2

LAN_LINKLED#

69

C139
Q10
MMJT9435

C141

.1U/16V_4

VAUX_25

2
4
C118

C109

C95

C117

C65

.1U/16V_4

.1U/16V_4

.1U/16V_4

.1U/16V_4

.1U/16V_4

2.2U/10V_8

C124

C140

.1U/16V_4

+3V_S5

C121
47U/6.3V_12
C66
C67
.01U/16V_4 .01U/16V_4

10U/6.3V_8

Close Transformer

LAN_REG1_2V

+3V_S5

C116

C106

C111

C101

C113

.1U/16V_4

.1U/16V_4

.1U/16V_4

.1U/16V_4

2.2U/10V_8

LAN_LINKLED# <21>

LAN_REG1_2V

10U/10V_8

C104

R37
75/F_4

BCM_WP

VAUX_12

.1U/16V_4

X-TX3P <21>
X-TX3N <21>

C114
.1U/16V_4

T11

.1U/16V_4

C85

X-TX2P <21>
X-TX2N <21>

VAUX_12

.1U/16V_4

X-TX1P <21>
X-TX1N <21>

C36
1500P/2KV_1808

C131

C115

X-TX0P <21>
X-TX0N <21>

+3V_S5

GND

27P/50V_4

U4

TCT2
TD2+
TD2-

R40
75/F_4

2
4

CLK_LAN_X2

TX1P
TX1N

4
5
6

LAN_ACTLED# <21>

11

X-TX0P
X-TX0N

+3V_S5

R66
1.21K

T14

TCT1
TD1+
TD1-

TX0N
TX0P

UART_MODE
GPIO1_SERIALDI
GPIO0_SERIALDO

65
63
64
62

BLM11A601S

MCT1
MX1+
MX1-

24
23
22

C71
.1U/16V_4

LINKLED#
100#
1000#
LAN_ACTLED#

SCLK
SI
SO
CS#

L9

TX0P
TX0N

1
2
3

NS892402P

GPIO2

Y1
25MHZ
1

BLM11A601S

AVDD

LINKLED#
SPD100LED#
SPD1000LED#
TRAFFICLED#

PCIE_TXDP
PCIE_TXDN
PCIE_RXDP
PCIE_RXDN
WAKE#
PERST#
REFCLK+
REFCLK-

L13

C107
.1U/16V_4

C108

36

PCIE_PLLVDD

22
21

27P/50V_4

BIASVDD

VDDP
VDDP

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

AVDDL
AVDDL
AVDDL
AVDDL

CLK_LAN_X2
CLK_LAN_X1

CLK_LAN_X1
C110

39
44
46
51

GLAN_TXP_5787 26
GLAN_TXN_5787 25
31
32
PCIE_WAKE_R#
12
-LAN_RST
10
29
28

1K_4
1K_4
0_4
*4.7K_4
47K
47K

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

BLM11A601S

17
68

6
15
19
56
61
L10

5
13
20
34
55
60

U21
VAUX_25

L7

BIASVDD

VAUX_12

VDDP+AVDD)

C112
.1U/16V_4

<14,22,31> PCIE_WAKE#

BCM_SCL

R85

*4.7K_4

SI

R84

*4.7K_4

CS#

R83

4.7K_4

R112

1.5_12

R109

*1_12

+3V_S5

VAUX_25

PROJECT : ZD1

A1A: (9/1 BCM recommend)

in order to pull up C321/C51 and Q17 pin 3 to
3V_LAN rail.

Quanta Computer Inc.

Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

BCM5787 LAN/TRANSFORMER
5

Sheet
1

20

of

38

CAMERA MODULE CONNECTOR

RJ45-11

1000P/X7R/50V_4

C31

1000P/X7R/50V_4
A

CN14
+3V_LED1

LED1_YELP_Y

LAN_ACTLED#

LED1_YELN_Y

X-TX3N

RX2-

X-TX3P

RX2+

X-TX1N

RX1-

X-TX2N

TX2-

X-TX2P

TX2+

<20> X-TX3N
<20> X-TX3P
<20> X-TX1N
<20> X-TX2N
<20> X-TX2P
<20> X-TX1P
<20> X-TX0N
<20> X-TX0P

+3V_S5

R36

16

GND18

18

RX1+

X-TX0N

TX1-

X-TX0P

10

TX1+

11

LED2_P_A2

LAN_LINKLED#

<20> LAN_LINKLED#
B

GND16

X-TX1P

+3V_LED2

220_4

+3V
+3V

3
C1

Q1
AO3413

2.2U/10V_8

C2

R1
4.7K_4

1000P/50V_4

220_4

CCD_POWER <18>

GND15

15

GND17

17

C34
470PF/3KV_1808

12

LED2_GRNN_A3

13

TIP

RINGL

14

RING

CCD_POWERON

<31>

Q2
DTC144EU

CN3
1
2
FI-S2P-HF(JAE)

RINGL

TIPL

TIPL
1

R33

<20> LAN_ACTLED#

+3V_S5

CCD_POWER

C27

C35
470PF/3KV_1808

FOXCONN_JM34F23-P2053
C33
C32

BLUETOOTH MODULE CONNECTOR

1000P/X7R/50V_4
1000P/X7R/50V_4

Q19
AO3413

2nd FAN
+3VPCU

BT_POWER_R

L31

BK2125HS330_8
C464

CIR

+3VSUS

C467

+3VPCU

BT_POWER
2.2U/10V_8
1000P/X7R/50V_4

BT_POWERON# <31>
R586
*10K_4

R587
*10K_4
+5V

+5V

Q34
*RHU002N06

R543
3

CIRRX2 <31>

R219

BT_POWER

Q33
*AO3413

*10K_4
2

<13> USBP4+
<13> USBP4<22> BT_LED

0_4

CN12

CIRR_X2

<31> TV_FAN

2ND_FAN_ON
Q31
*2N7002E

+5VPCU
D

R197

C635

0C Modify circuits 0104

CIRR_X2

2 0X2
4

USBP4+_R
USBP4-_R
BT_LED

CN31

TV_FAN

RP39 1
3

1
2
3

1
2
3
4
5
6
7
Aces 88266-0500

*0.1U/X7R/50V

C490

C480

C495

*22P_4

*22P_4

.01U/16V_4

U37
47

C646
4.7U/10V_8

*FAN_CON

1
2
3
4
5

EVER_IRM-V038_TRI-P

Modify Rev:D

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

BT/CCD/RJ45-11/CIR/2nd FAN
1

Sheet

21
8

of

38

+3VPCU
D48

MINI-Card

R67

+3V

+3V_MC

L6

FBJ3216HS800_12

+1.5V

0_4 KEDRON_GND_37

<13> PCIE_TXP4
<13> PCIE_TXN4
<13> PCIE_RXP4
<13> PCIE_RXN4

<2> CLK_PCIE_MINI1
<2> CLK_PCIE_MINI1#

+3VSUS

Q5

R49
*4.7K_4

*DTC144EU

<14,20,31> PCIE_WAKE#

Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved

15
13
11
9
7
5
3
1

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
Reserved
GND

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V

16
14
12
10
8
6
4
2

+3V_MINI-CARD

NBSWON#

WL_LED#
USBP6+_R
USBP6-_R

RP4

4 0X2
2

3
1

+ C514

USBP6+ <13>
USBP6- <13>

DA204U

+3VPCU
RF_EN_RR
LFRAME#_R
LAD3_R
LAD2_R
LAD1_R
LAD0_R

R65

R60
R57
R53
R52
R50

0_4
0_4
0_4
0_4
0_4
0_4

D50

1
Q24
DTA114YUA

LFRAME# <12,30,31>
LAD3 <12,30,31>
LAD2 <12,30,31>
LAD1 <12,30,31>
LAD0 <12,30,31>

MX4_WL#

DA204U

+3VPCU

MX2_WWW#

16
14
12
10
8
6
4
2

USBP8+_D
USBP8-_D

RP37 3
1

PDAT_SMB_3G
PCLK_SMB_3G

R131
10K_4

0_4 3G MINI_LED#

4 0X2
2

R253
R477

PDAT_SMB
PCLK_SMB

0_4
0_4

R132
10K_4

<31> A_KEY
<30,31> MX0_E_KEY#
<30,31> MY0
<31> TB2CLK
<31> TB2DATA

USBP8+ <13>
USBP8- <13>

L19
L18

R539
0_4

CN30
C507

R509
150/F_4

C651
1000P/50V_4

.1U/10V_4

+5V_TV-CARD

S-Video-Y

Close near CN30

EMI SOLUTION
C637

+1.5V

C213

USBON#
USBP1USBP1+

<25,31> USBON#
<13> USBP1<13> USBP1+

2 USBP1-_R
4 USBP1+_R
0X2_4

1
3
RP40

+5V_S5

1000P/X7R/50V_4

.1U/10V_4

<30> CAPSLED
<30> NUMLED
<30> IDE_LED
<31> NBSWON#

<14,23,31> LID591#
<30,31> PWRLED#
<30,31> SUSLED#

PWRLED#
SUSLED#

Aces_88501-1601

Modify Rev:D
3G MINI_LED

47K

PROJECT : ZD1

0_4

10K

Quanta Computer Inc.

150/F_4

CLK_PCIE_TV <2>
CLK_PCIE_TV# <2>
PCIE_RXP2 <13>
PCIE_RXN2 <13>
PCIE_TXP2 <13>
PCIE_TXN2 <13>

Size

3G MINI_LED#

Date:
3

Document Number

Rev
E

MINI PCI-E card/3G/TV/Media Key

Close near Mini-card connector

2

UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

R270
CLK_PCIE_TV
CLK_PCIE_TV#
PCIE_RXP2
PCIE_RXN2
PCIE_TXP2
PCIE_TXN2

150/F_4
150/F_4

C421
C438
C442
.1U/10V_4.1U/10V_4 10P/50V_4

0C Change footprint 0103

CN4
AC_IN

+3V
R511
R510

+3VSUS
+3V

Aces_87212-1600L

R512

+3G_VDD

C432
C383
4.7U/10V_8 4.7U/10V_8

Q32
2N7002

Q18
DTA114YUA

CVBS
S-Video-Y
S-Video-C
FBJ3216HS800_12

Q35
AO3413

C428
.1U/10V_4

+3V

+3VPCU
C

<17,31,32> ACIN

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

R508
R507 Audio Left
150/F_4 150/F_4
Audio Right

L27

+3VPCU

Aces 88501-0801

+5V_S5

+5V

2.2U/10V_8

Aces 88501-120N

Modify Rev:D

S-Video-C

+ C193

MY0

R545
10K_4

+5V_S5
FBJ3216HS800_12

3G MINI_LED

<31> TV_KEY

3G_ON <31>

Modify Rev:E

1
2
3
4
5
6
7
8
9
10
11
12

WL_LED

<30,31> MX2_WWW#
<30,31> MX1_EMAIL#
<30,31> MX5_BT#
<21> BT_LED
<30,31> MX3_3G#

1
2
3
4
5
6
7
8

MMB_A_KEY
R525
0_4
R526
0_4
MMB_MX0_E_KEY#
MMB_MY0
R527
0_4
LZA10-2ACB104MT TBCLK_R
LZA10-2ACB104MT TBDATA_R

CVBS

L59

2
DA204U

CN8

PLTRST#

UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR

CN5

0C Change footprint 0103

R274

DA204U

<30,31> MX4_WL#

+3G_VDD

3G_LED#

MY0

+3V

+3V_MMB

UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
+3.3V

D51

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#

53

+5V_TV-CARD

15
13
11
9
7
5
3
1

+3VPCU

D47

CLK_PCIE_TV
CLK_PCIE_TV#

GND

S-Video-Y
S-Video-C

GND

PCIE_RXP2
PCIE_RXN2
C

DA204U

0_4

WL_LED#

54

PCIE_TXP2
PCIE_TXN2

2
WL_LED

MINIPCI EXP_Aces

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

MX3_3G#

R352

Media Key

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
W_DISABLE#
GND

+3V

Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
UIM_C4
UIM_C8

+3VPCU

D46
PLTRST# <13,14,17,20,23,24,29..31>
RF_EN <31>

Alltop_MINI CARD

+1.5V +3G_VDD

49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

2.2U/10V_8 .1U/10V_4

+3G_VDD

Audio Right
Audio Left

DA204U

R536

CVBS

MX5_BT#
2

PDAT_SMB <2,14,16,23>
PCLK_SMB <2,14,16,23>

3G/TV MINI CARD

CN34

C513

0C delete net FAN_OT#

0103
51

D49

PCIE_WAKE#_MINI-Card

+3VPCU

D45
+1.5V

R68

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

CL_RST#0_CN
*0_4
*0_4
CL_DATA1_CN
CL_CLK1_CN
*0_4
KEDRON_GND_43
0_4
+3V_MINI-CARD

10K

R80
R76
R74
R69

2
DA204U

+3VPCU

CN19

<14> CL_RST#1
<14> CL_DATA1
<14> CL_CLK1

.1U/10V_4

10U/10V_8

*0

MX1_EMAIL#

For ESD close to conn. side

C79

*0_4
*0_4

R59

47K

R78
R72

<13,28> PCIRST#
<2,30> PCLK_DEBUG

+3VSUS

+3V_MINI-CARD

+ C62

Monday, May 07, 2007

Sheet

22
8

of

38

+NEW_3V

PERST#
+NEW_3VAUX
+NEW_1.5V
NEW_SMDATA
NEW_SMCLK

R441
R442

<13> USBP5+
<13> USBP5-

NEW CARD'S POWER SWITCH

PERP3
PERN3
CLK_PCIE_NEW_C
CLK_PCIE_NEW_C#
NC_EN#
+NEW_3V
PERST#
+NEW_3VAUX
+NEW_1.5V
NEW_SMDATA
NEW_SMCLK

USBP5+_R
USBP5-_R

29
30

GND1
GND29
PETp0 GND30
PETn0
GND2
GND27
PERp0 GND28
PERn0
GND3
REFCLK+
REFCLKCPPE#
CLKREQ#
+3.3V1
+3.3V2
PERST#
+3.3VAUX
WAKE#
+1.5V1
+1.5V2
SMB_DATA
SMB_CLK
RESERVED1
RESERVED2
CPUSB#
USB_D+
USB_DGND4

U33
QFN-TPS2231RGP

27
28

*Aces_NEW CARD

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

PERP3
PERN3
CLK_PCIE_NEW_C
CLK_PCIE_NEW_C#
NC_EN#
+NEW_3V

PERST#
+NEW_3VAUX
+NEW_1.5V
NEW_SMDATA
NEW_SMCLK

USBP5+_R
USBP5-_R

+NEW_3V

1.3A

AUXOUT

15

+NEW_3VAUX

275mA

1.5VOUT
1.5VOUT

11
13

+NEW_1.5V

650mA

NC_EN#

0C Connect to NC_EN# 0103

2
4

3.3VIN
3.3VIN

+3V_S5

17

AUXIN

+1.5V

12
14

1.5VIN
1.5VIN

PLTRST#_NEW

6
20

*SYSRST#
*SHDN#

1
10
9

18
16
7
21

*STBY#
*CPPE#
*CPUSB#

*RCLKEN
NC
GND
GNDPAD

PERST#
OC#

8
19

3.3VOUT
3.3VOUT

TI
PERST#

: AL002231001

RICOH : AL005538001
GMT

: AL000577008

+3V

*Taitwun_NEW CARD

CN43

PCIE_TXP1
PCIE_TXN1

REV:B MODIFY

3
5

+3V

<13,14,17,20,22,24,29..31>
29
30

GND1
GND29
PETp0 GND30
PETn0
GND2
GND27
PERp0 GND28
PERn0
GND3
REFCLK+
REFCLKCPPE#
CLKREQ#
+3.3V1
+3.3V2
PERST#
+3.3VAUX
WAKE#
+1.5V1
+1.5V2
SMB_DATA
SMB_CLK
RESERVED1
RESERVED2
CPUSB#
USB_D+
USB_DGND4

PLTRST#_NEW
1
Q37
2N7002

PLTRST#

REV:B MODIFY

+NEW_3V

27
28
+3V_S5

+3V

+1.5V

4
2

<2> CLK_PCIE_NEW_C
<2> CLK_PCIE_NEW_C#
<13> NC_EN#

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

PCIE_TXP1
PCIE_TXN1

27
28

+NEW_3VAUX

RP41
Q30

C599

C581

C582

C598

C597

.1U/10V_4

.1U/10V_4

.1U/10V_4

.1U/10V_4

.1U/10V_4

C351
.1U/10V_4
<2,14,16,22> PDAT_SMB

+NEW_3V

10KX2_4

2N7002E

3
1

C381
C376

GND5
GND1
PETp0 GND27
PETn0 GND28
GND2
PERp0
PERn0
GND3
REFCLK+
REFCLKCPPE#
CLKREQ#
+3.3V1
+3.3V2
PERST#
+3.3VAUX
WAKE#
+1.5V1
+1.5V2
SMB_DATA
SMB_CLK
RESERVED1
RESERVED2
CPUSB#
USB_D+
USB_DGND4
GND6

<13> PCIE_TXP1
<13> PCIE_TXN1
<13> PCIE_RXP1
<13> PCIE_RXN1

29
26
25
24
23
PERP3
22
PERN3
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
0_4 USBP5+_R 3
0_4 USBP5-_R 2
1
30

CN44

New card

CN9

NEW_SMDATA

+NEW_3V

+NEW_1.5V

Q29
C579
2.2U/10V_8

C354

C357

C348

.1U/10V_4

.1U/10V_4

C344

2.2U/10V_8

2N7002E

.1U/10V_4
<2,14,16,22> PCLK_SMB

NEW_SMCLK

FOX_EXPCARD

LID SWITCH

HDMI

+5V
+5V

0C Change footprint 0103

CN21
+3V

D35

BAS316
R194
100K_4

DISPON

<18> DISPON

D11

BAS316

LID591# <14,22,31>

BAS316

R354

R353

2K_4

2K_4

NV suggestion near
HDMI connector

R192

IV@0_4

R189

EV@0_4

HDMI_DDCCLK
HDMI_DDCDATA
*.1U_4

R359

<17> HDMI_HP_A

EV@10K_4

EV_LVDS_BLON <17>

L38
<17> MXM_HDMI_DDCDATA

HDMI_DDCDATA

HDMI monitor default have PU

to 5V.So ZY3 PD for level
change.And serial R for
current limited

220R_100MHZ

<demo circuit>
Crestline suggest 100K
G73 suggest 10K(ZS1 Default)
(Need confirm with Max)

R602

1K_4

HP_DET

19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

R356
EV@10K_4

SHELL1
D2+
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0GND
CK+
CK Shield GND
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL2

20

23
22

21

HDMI CON

+5V
C516

HDMITX0P
HDMITX0N

*.1U_4

HDMICLK-

C515

INT_LVDS_BLON <6>

R191

C632

C631

C633

.1U/16V_4

.1U/16V_4

.1U/16V_4

HDMI_HP_A

U26
1
2
3
4
5

1
2
VCC
4
5

*RClamp0514M_AG
10 10
9 9
GND 8
7 7
6 6

HDMITX0P
HDMITX0N
HDMI_HP_A
A

EC_FPBACK# <31>

Q12

HDMITX0N
HDMICLK+

<17> HDMICLK-

*1K_4

100K_4

HDMITX1N
HDMITX0P

HDMI_DDCCLK

220R_100MHZ
R190

<17> HDMITX2N
<17> HDMITX1P

<17> HDMITX0N
<17> HDMICLK+

<17> MXM_HDMI_DDCCLK

BAS316

HDMITX2N
HDMITX1P

<17> HDMITX1N
<17> HDMITX0P

L39

D10

HDMITX2P

<17> HDMITX2P

D34

DTC144EU

HDMITX2P
HDMITX2N
HDMITX1P
HDMITX1N

U27
1
2
3
4
5

1
2
VCC
4
5

*RClamp0514M_AG
10 10
9 9
GND 8
7 7
6 6

HDMITX2P
HDMITX2N

HDMICLK+
HDMICLK-

HDMITX1P
HDMITX1N

HDMI_DDCCLK
HDMI_DDCDATA

U25
1
2
3
4
5

1
2
VCC
4
5

*RClamp0514M_AG
10 10
9 9
GND 8
7 7
6 6

PROJECT : ZD1

HDMICLK+
HDMICLKHDMI_DDCCLK
HDMI_DDCDATA

Quanta Computer Inc.

Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

NEW CARD/HDMI/LID
5

Sheet
1

23

of

38

SATA HDD2

SATA HDD1

Main
CN33

CN32
23

GND23

23

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

GND24

24

GND24

24

SATA_TXP1 <12>
SATA_TXN1 <12>
SATA_RXN1_C
SATA_RXP1_C

+3.3VSATA1 R229

C361
C370

*0_8

*.01U/25V_4
*.01U/25V_4

SATA_RXN1 <12>
SATA_RXP1 <12>

+3.3VSATA1

+3V

+3.3VSATA1

+3.3VSATA1

C400
*10U/10V_8

C401
*10U/10V_8

C390
*.1U/10V_4

HDDA5V

R246

+5V

HDDA5V

*0_8

+
C439
*150U/6.3V_7343

C425
*10U/10V_8

C415
*.1U/16V_4

C417
*.1U/16V_4

C416
*.01U/16V_4

C418
*.01U/16V_4

*C16654-122A4-L_Serial_ATA

SATA_TXP0 <12>
SATA_TXN0 <12>
SATA_RXN0_C
SATA_RXP0_C

+3.3VSATA2

R464

C583
C585

0_8

.01U/25V_4
.01U/25V_4

SATA_RXN0 <12>
SATA_RXP0 <12>

+3.3VSATA2

+3V

+3.3VSATA2

+3.3VSATA2

C601
10U/10V_8

C595
10U/10V_8

C592
.1U/10V_4

HDDB5V

R476

+5V

HDDB5V

0_8

GND23

C621
150U/6.3V_7343

C614
10U/10V_8

C617
.1U/16V_4

C618
.1U/16V_4

C606
.01U/16V_4

C607
.01U/16V_4

C16654-122A4-L_Serial_ATA

ODD (PATA)

IDERST#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

10K_4

PDIOW#
PIORDY
IRQ14
PDA1
PDA0
PDCS1#
IDELED#

<12> PDIOW#
<12> PIORDY
<12> IRQ14
<12> PDCS1#

<30> IDELED#

+5V_ODD
C292

1000P/X7R/50V_4

.1U/10V_4

RCSEL
R176
470_4

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDDREQ
PDIOR#

+3V

+5V
C

R199
10K_4

PDDREQ <12>
PDIOR# <12>

PDDACK#

<13,14,17,20,22,23,29..31>

PLTRST#

PLTRST# 1
Q13

IDERST#
3
DTC144EU

PDDACK# <12>

PDIAG# R195
PDA2
PDCS3#

*10K_4

+5V

PDCS3# <12>

+5V_ODD

L49

C281

C285

.1U/10V_4

.1U/10V_4

C293

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

R193

0_8

+5V

PDD[15..0]

C556

<12>

PDA[2..0] <12>

150U/6.3V_7343

51
52

IDELED#

51
52

CN28
SUYIN-ODDREV-800194MR050S110ZL

+5V

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

SATA-HDD & PATA-ODD

1

Sheet
4

24

of

38

USB

USBPWR1
C536
C537
100U/6.3_3528 1000P/X7R/50V_4
+5V_S5

CN23

U28

<22,31> USBON#

2
3

IN1
IN2

4
1
9

EN#
GND
GND-C

OUT3
OUT2
OUT1

8
7
6

OC#

USBPWR1

RP11 3
1

<13> USBP0<13> USBP0+

USBP0-_R
USBP0+_R

4 0X2_4
2

1
2
3
4

1
2
3
4

5
6
7
8

5
6
7
8

Alltop_USB
R389

*6.34K/F

U29
CM1293-04SO

TPS2061DGNR
1

CH1

VN

CH2

CH4

VP

CH3

+5V_S5

USBPWR2
C508
3
1

<13> USBP3<13> USBP3+

+5V_S5
U3
2
3

IN1
IN2

4
1
9

EN#
GND
GND-C

OUT3
OUT2
OUT1

8
7
6

OC#

U20
CM1293-04SO

USBPWR2

R41

*6.34K/F

G548A2P8U

CH1

VN

CH2

RP2

CH4

VP

CH3

100U/6.3_3528 100U/6.3_3528

USBP3-_R
USBP3+_R

4
2

C38
C37
1000P/X7R/50V_4

CN18

0X2_4

1
2
3
4
9
11

+5V_S5

5
6
7
8
10
12
+5V_S5

RP3

<13> USBP2+
<13> USBP2-

+5V_S5

Suyin_dual_usb

2 0X2_4 USBP2+_R
USBP2-_R
4

1
3

C534
.1U/10V_4

C509
.1U/10V_4

HOLES
CPU NUT

8
1
9

HOLE5
*H-TC256BC315D118P2-8
2
5
3
6
4
7

8
1
9

HOLE25
*H-TC256BC315D118P2-8
2
5
3
6
4
7

8
1
9

8
1
9

HOLE1
HOLE2
*H-TC354BC256D118P2-8 *H-TC256BC315D118P2-8
2
5
2
5
3
6
3
6
4
7
4
7

8
1
9

8
1
9

HOLE11
HOLE20
*H-TC256BC315D118P2-8 *H-TC256BC315D118P2-8
2
5
2
5
3
6
3
6
4
7
4
7

8
1
9

HOLE21
*H-C236D142P2
2
5
3
6
4
7

8
1
9

8
1
9

HOLE15
H-C236D142P2
2
5
3
6
4
7

MXM NUT
HOLE19
*H-TC256BC217D118P2-8
2
5
3
6
4
7

HOLE22
*H-TC256BC315D118P2-8
2
5
3
6
4
7

HOLE26
*H-TC256BC315D118P2-8
2
5
3
6
4
7
8
1
9

HOLE27
*H-TC256BC315D118P2-8
2
5
3
6
4
7

8
1
9

HOLE10
H-C236D142P2-8
2
5
3
6
4
7

8
1
9

HOLE18
H-C236D142P2-8
2
5
3
6
4
7

8
1
9

HOLE17
H-C236D142P2-8
2
5
3
6
4
7

8
1
9

HOLE14
H-C236D142P2-8
2
5
3
6
4
7

8
1
9

8
1
9

HOLE13
H-C236D142P2-8
2
5
3
6
4
7

8
1
9

HOLE9
H-C236D142P2-8
2
5
3
6
4
7

8
1
9

8
1
9

HOLE6
H-C236D142P2
2
5
3
6
4
7

8
1
9

HOLE16
H-C236D142P2
2
5
3
6
4
7

8
1
9

HOLE7
H-C236D142P2
2
5
3
6
4
7

MINI CARD NUT

PAD3

PAD4

PAD5

PAD6

PAD7

PAD8

PAD9

PAD10

PAD11

EMIPAD

EMIPAD

*EMIPAD

EMIPAD

*EMIPAD

EMIPAD

*EMIPAD

*EMIPAD

EMIPAD

EMIPAD

EMIPAD

HOLE28
*H-TC256BC315D118P2-8
2
5
3
6
4
7

HOLE29
*H-TC236BC217D118P2-8
2
5
3
6
4
7

EMI PAD
PAD12

PAD13

PAD14

PAD15

PAD16

PAD17

PAD18

PAD19

PAD20

PAD21

PAD22

EMIPAD

EMIPAD

EMIPAD

EMIPAD

EMIPAD

EMIPAD

*EMIPAD

*EMIPAD

*EMIPAD

EMIPAD

EMIPAD

Footprint error: PAD15 , PAD4 ,PAD16:

emipad97x87

HOLE4
H-TC197BC98D59P2-8
2
5
3
6
4
7

PROJECT : ZD1
Quanta Computer Inc.

8
1
9

HOLE3
H-TC197BC98D59P2-8
2
5
3
6
4
7

MDC NUT

8
1
9

8
1
9

PAD2

8
1
9

PAD1

Modify Rev:E

HOLE12
H-TC98BC197D59P2
2
5
3
6
4
7
8
1
9

HOLE8
H-TC98BC197D59P2
2
5
3
6
4
7
8
1
9

8
1
9

HOLE23
H-TC98BC197D59P2
2
5
3
6
4
7

8
1
9

HOLE24
H-TC98BC197D59P2
2
5
3
6
4
7

Size

Document Number

Rev
E

USB/HOLE
Date:
5

Monday, May 07, 2007

Sheet
1

25

of

38

CODEC(ALC268)

R313

LINE OUT Amplifier

10K

C463
+5V

+5V_ADO
L30

C441
.1U/10V_4

Gain = -(Rf/Ri)

TI321611U480_1206

C443
10U/10V_8

C479
.1U/10V_4

C648

C487
.1U/10V_4

C650

C649

C501
C469
.1U/10V_4 4.7U/10V_8 1000P/50V_4 1000P/50V_4

47P/50V_4

U18

C652

10P/50V_4

FRONT-L

10P/50V_4

C465

10U/10V_8

R312

10K

+3V_AVDD
ADOGND

MIC1-VREFO-R
MIC2-VREFO

+3V

R276

+1.5V

R275

*0

<27> SECNTL

MIC1-VREFO-L

100K_4

1
D24
1
D23

<27> MUTE#

MIC2-VREFO <27>
MIC1-VREFO-L <27>

+AZA_VDD
FRONT-L

R296

+3V_AVDD

MIC1-VREFO-R <27>

FRONT-R

C477

+5V_ADO

FRONT-R

C502

+NVDD

2
MTW355
2
*MTW355

1412MUTE#
10U/10V_8

R324

10K

3
15

SVDD
PVDD

6
10

SVSS
NVDD

1
16

SHDNR#
SHDNL#

4.7U/10V_8

INR

HPL

OUTL

NC1
NC2
NC3
NC4
SGND
PGND
TPAD

9
11
12
14
2
13
17

OUTR

INL

+
D

HPL

<27>
D

ADOGND

+
-

G1412

C449

C450
4.7U/10V .1U/10V_4

42

AVSS2

CD-GND

19

C483

.1U/10V_4

43

NC

CD-L

18

C481

.1U/10V_4

MIC2_INT_R

C474

1U/16V

MIC2_INT_L

C466

1U/16V

15

NC

14

48

SPDIFO

Sense A

13

C444
10U/10V_8

C452
.1U/10V_4

PCBEEP

VIN

ADJ

GND

*G961-18ADJTEU(SOT89-5)

/SHDN
GND

ADOGND

Change C19 to 4.7u

MIC2_INTL1 <27>

MIC1_JD <27>
LINEIN_JD

VR

<27>

VR1

LINE_JD <27>

DIGVOL_UP

<31> DIGVOL_UP

C453

1U/16V

BEEP_1

R273

10K_4

PCSPK

DIGVOL_DN

BIT_CLK268

ACZ_SDIN268

22_4

R282

R279
1K_4

0C Change power from +3V

to +3v_S5 to slove wake on
ring issue 0111

22_4

ACZ_RST#_AUDIO

<12,27>

ACZ_SYNC_AUDIO

<12>

ACZ_SDIN0 <12>

<12> ACZ_SDOUT_MDC
<12> ACZ_SYNC_MDC
<12> ACZ_SDIN1
<12> ACZ_RST#_MDC

ACZ_SDOUT_MDC
ACZ_SYNC_MDC
R3
22_4

MDC_SDIN1

1
3
5
7
9
11
15

GND
AC_SDO
GND
AC_SYNC
AC_SDI
AC_RST#
GND

RSV
RSV
3.3V
GND
GND
AC_BCLK
GND

2
4
6
8
10
12
16

R4

+3V_S5

*0
C5
.1U/10V_4

BIT_CLK_MDC <12>

MDC
R2
*22_4

C7
*10P-50V_4

<12>

C6
*10P-50V_4

MXM_SPDIF_OUT

MXM_SPDIF_OUT <17>

The pin2 of ALC888 define MXM_SPDIF_OUT

R301
*12K_4

0
CN2

BIT_CLK_AUDIO <12>

ACZ_SDOUT_AUDIO

888@0_4

+3V_S5

EAPD
R524

22P/50V_4

R302
*36K_4

PCSPK <14>

U16

C-

R16

C451

VOUT

VIN

1412MUTE#

G5930

MDC

R281

VEN

6
5

12

11

10

MIC2_INTR1 <27>

C+

VOUT

ADOGND

5.1K/F

C440
100P-50V

+5V_ADO

4.7U/6.3V

888@0_4

+5V
*0

ADOGND

10K/F

<27>

U35

C630
4.7U/6.3V

20K/F

R349

+NVDD

R537

Tied at one point only

under the codec or
near the codec

R271

C460
+3V_AVDD

MIC1-L <27>

R347

HPR

+NVDD

.1U/10V_4

R346

HPR

VR_XRE094_NOBLE

+AZA_VDD

ADOGND

0C Change size to 0603 0111

<31> DIGVOL_DN

MUTE_888

SPDIF_OUT_888

+3V

888@1U/16V SURR-L
888@1U/16V SURR-R

C639
C640

SENSEA

PCBEEP

NC

EAPD

RESET#

DMIC-CLK

47

SYNC

46

DVDD2

16

SDATA-IN

MIC2-L

DVSS2

NC

BIT-CLK

MIC2-R

45

DVDD1

NC

17

SDATA-OUT

EAPD_268

44

10K

C468
C447
4.7U/6.3V .1U/10V_4

MIC1-R <27>

MIC1-L

47P/50V_4

R325

26

25
AVDD1

27
VREF

AVSS1

28

29
LINE1-VREFO

MIC1-VREFO-L

31

32

30
MIC2-VREFO

GPIO1

33
NC

MIC1-VREFO-R

C489

268@0_4

ADOGND

35

20

R311

34

21

CD-R

0C Modify circuits for subwoofer 0111

R335

Sense B

MIC1-L

HP-OUT-R

<27> MONO_OUT_L
<27> MONO_OUT_R

FRONT-L

JDREF

41

+3V_AVDD

ADOGND

LINE1-L <27>

40

MXM_SPDIF_OUT

MONO_OUT_L
MONO_OUT_R

MIC1-R

LINE1-R <27>

SURR-R

SPDIF_OUT

<27> SPDIF_OUT

LINE1-L

20K/F

DVSS1

268@0_4

LINE1-R

23

MIC1-R

R538

24

LINE1-L

HP-OUT-L

EAPD

LINE1-R

22

Acer ALC268&888

C478

2
BLM11A601S

C435
*4.7U/10V_8

39

ADOGND

<27> EAPD

AVDD2

DMIC-3/4/GPIO3

R329

ADOGND
<27> SURR-R

MONO-OUT

38

37

L28

+3V

SURR-L

<27> SURR-L

FRONT-R

268@0_4 MONO_OUT_268

+5V_ADO

DMIC-1/2/GPIO0

R523

MONO_OUT_L

36

ADOGND
U19

PROJECT : ZD1
Quanta Computer Inc.
Size

Vo=1.2*(R371+R372)/R371= 4.8V

ADOGND

Document Number

Rev
E

REALTEK ALC268&888/MDC/VR
Date:
4

Monday, May 07, 2007

Sheet
1

26

of

38

Speaker Amplifier

SYSTEM LINE OUT/SPDIF

+5V_ADO
+3V_AVDD
C471

1U/16V
+3V_SPD

C446
.1U/10V_4

R316

<26> SPDIF_OUT

ADOGND
SECNTL

SPDIFO

0_4

LINEOUT_JD:
HP not insert->H
HP insert->L

SECNTL <26>

C473
.1U/10V_4

Gain = -(Rf/Ri)
10K

C476

2.2U/10V_8

SURR-R-1

R300

10K

INSPKL+

R330
C484
R315
C470

INSPKR+

+5V_ADO

4.7U/6.3V

C445

4.7U/6.3V

C482

1441 MUTE

1441 MUTE

SURR-R-2

10K
330P/25V_4
10K
330P/25V_4

ADOGND
R328
100K_4

LIN1

18

RIN1

2
17

16
3

R327

0_4

R298

0_4

11

14

6
8
23

LIN2
RIN2

RBYPASS
LBYPASS
SHDN
SE/BTL
G1441

Q22
MUTE#

4
15

U17

SURR-L-2

B1A: Add R588 & R591

CT
NC
SECNTL

R336

VDD3

SURR-L-1

LVDD
RVDD

2.2U/10V_8

VOL

IN1/IN2

13

ROUT+
ROUTLOUT+
LOUT-

19
12
24
7

<26>
<26>

ADOGND

HPL
HPR

HPL
HPR

R342
R341

75/F_4
75/F_4

L35
L34

INSPKR+
INSPKRINSPKL+
INSPKL-

R340
*1K_4

R343
*1K_4

5
4
10
3
2
1

HPL_SYS
HPR_SYS

BK1608LL121
BK1608LL121
C491
470P/50V_4

C492
470P/50V_4

ADOGND

LED

Drive
IC

2SJ1371-0010A1_SPDIF

ADOGND

Normal OPEN Jack

D2C: NEW ADD

FOR ESD

+5V_ADO

D33

LINEOUT_JD
2N7002

Q21
ME2347

DA204U

+3V_AVDD

+3V

2
ADOGND

ADOGND

7
8
6

SPDIFO

ADOGND

CN40

LINEOUT_JD

20

THRMPAD
GND/HS
GND/HS
GND/HS
GND/HS

<26> SURR-R

C494

25
22
21
10
9

<26> SURR-L

Pin5 connect to Pin3 on Jack

BLACK

ADOGND

ADOGND

+3V_SPD

C485
10U/10V_8

LINEOUT_JD

EC MUTE

2
MTW355

1
D21

2
*MTW355

<12,26> ACZ_RST#_AUDIO

R283
10K_4
MUTE#

LINE_JD
R551
R550
R547
R549
R548
R546
R540
R408
R337
R284
C472
C459

SPEAKER
CN35
L55
L56
L57
L58

0
0
0
0

0C Change to 0 0122

INSPKR-N
INSPKR+N
INSPKL-N
INSPKL+N

1
25
36
4

C623

C624

C625

C622

47P/50V_4

47P/50V_4

47P/50V_4

47P/50V_4

0
0
0
0
0
0
0
0
0
0
0
0

R595
10K_4

+5V

22K_4

<26>

Q43

2N7002

R594

LINEOUT_JD

LINE_JD

Q42

2N7002

INSPKRINSPKR+
INSPKLINSPKL+

Foxconn DFTJ10FR470 2FB5441-BKMC-7F

Singatron DFTJ10FR437 2SJ1371-0010A1

+5V
MUTE# <26>

2
MTW355

1
D20

1
D22

<26> EAPD

<31> AMP_MUTE#

ADOGND

85204-04001_SPEAKER-CON
ADOGND

MIC

SYSTEM LINE IN/SUBWOOFER

<26> MIC1-VREFO-L
<26> MIC1-L

BLUE

<26> MIC1-VREFO-R

CN42
<26> LINE1-L
B

<26> LINE1-R

C503

10U/10V_8

LINE1-L_1 L37

BK1608LL121

C504

10U/10V_8

LINE1-R_1 L36

BK1608LL121

1
2
6
3
4

LINEINL_SYS
LINEINR_SYS
<26> LINEIN_JD
C500

C505

470P/50V_4

470P/50V_4

<26> MIC1-R

R345

2.2K_4

C493

2.2U/6.3V

MIC1_L1

L33

BK1608LL121

MIC1_L

R339

2.2K_4

MIC1_R1

L32

BK1608LL121

MIC1_R

C497

2.2U/6.3V

CN41
1
2
6
3
4

<26> MIC1_JD

8
5
2SJ-T351-S11

C498
C496
470P/50V_4 470P/50V_4

Normal OPEN Jack

5
2SJ-T351-S15
ADOGND

Normal OPEN Jack

For ESD close to audio out connecter

D2C: NEW ADD FOR ESD

ADOGND

D2C: NEW ADD

FOR ESD
LINEIN_JD

INT MIC array

MIC1_JD
R333

4.7K_4

1
D29

2
MTW355

MIC2-VREFO

<26>

ADOGND

DA204U

MIC2_INTR1

DA204U

For ESD close to audio out connecter

+5V_ADO

D32

+5V_ADO

D31

MIC2_INTR1

ADOGND

<26>

+5V

1
2
3
4
5

1441 MUTE
<26> MONO_OUT_L
<26> MONO_OUT_R

C486
*22P-50V_4

Singatron DFTJ06FR732 2SJ-T351-S15

Foxconn DFTJ06FRA21 JA6233L-U3T4-7F
Alltop
DFTJ06FR902
C12107-906A9-L

CN16

Singatron DFTJ06FR741 2SJ-T351-S11

Foxconn DFTJ06FRA39 JA6233L-P3T4-7F
Alltop DFTJ06FR899 C12107-D06A9-L

ADOGND
6
7

CN11

SUBWOOFER

MIC2_INTR1

1
2
3
4

MIC2_INTL1

R285
R332

4.7K_4

85204-0200L_INT_MIC
A

ADOGND

1
D30

MIC2-VREFO
2
MTW355

0
ADOGND
A

ADOGND

MIC2_INTL1

MIC2_INTL1 <26>

C488
*22P-50V_4

PROJECT : ZD1

ADOGND

Quanta Computer Inc.

Size

Document Number

Rev
E

AMP /AUDIO JACK CONN

Date:
5

Monday, May 07, 2007

Sheet
1

27

of

38

+3V

R5C832 : AJ5C8320H26
R5C833 : AJ5C8330H05

+3V

.1u/16V_4

C566
.01U/16V_4

C564

C364

C580

4.7U/10V

.01U/16V_4

.01U/16V_4

VCC_ROUT_832
D

C571

C572

.01U/16V_4

.01U/16V_4

C593
.47U/6.3V_4

C586
.47U/6.3V_4

10
20
27
32
41
128

VCC_PCI1
VCC_PCI2
VCC_PCI3
VCC_PCI4
VCC_PCI5
VCC_PCI6

61

VCC_RIN

16
34
64
114
120

VCC_3V

VCC_MD

AD25
INTA#,B#
R208

150/F_4

PCM_IDSEL

PowerOnReset for VccCore

C

When GRESET# is controlled by system,

the pull-up resistor(R762) and
capacitor(C492) do not need to apply.
<13> PAR
<13> CBE3#
<13> CBE2#
<13> CBE1#
<13> CBE0#

+3V
PCLK_PCM
R473
100K_4
GRST#_832

<13> REQ0#
<13> GNT0#
<13> FRAME#
<13> IRDY#
<13> TRDY#
<13> DEVSEL#
<13> STOP#
<13> PERR#
<13> SERR#

R457
*22_4

C613
.22u/10V_4

C578
*22p_4

<13,22> PCIRST#

Ground guard

<2> PCLK_PCM
<13> PCI_PME#

<14,31> CLKRUN#

125
126
127
1
2
3
5
6
9
11
12
14
15
17
18
19
36
37
38
39
40
42
43
44
46
47
48
49
50
51
52
53
33
7
21
35
45
8

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PAR
C/BE3#
C/BE2#
C/BE1#
C/BE0#
IDSEL

REQ0#
GNT0#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#

124
123
23
24
25
26
29
30
31

REQ#
GNT#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#

GRST#_832
PCIRST#

71
119

GBRST#
PCIRST#

PCLK_PCM

121

PCICLK

PCI_PME#

70

CLKRUN#

117

1394_XIN

FW^22P/50V_4
Y5
FW^24.576MHz

C605

94

1394_XOUT 95

FIL0_PWR

96

REXT

VREF

GUARD GND

>60 ns

HWSPND#

69

832_SUS#

MSEN

58

R463

10K_4
10K_4

R460
R462

UDIO3
UDIO4

65
59

SCL_CARD
SDA_CARD

UDIO2

56

UDIO1

60

UDIO0/SRIRQ#

72

When HWSPND# is
controlled by system, the
pull-up resistor(R755)
dose not need to apply.

100K_4
*100K_4

3
1
RN13

R467

R465

FW^56.2/F_4

FW^56.2/F_4

4
2
FW^0_4P2R

115

INTA#

INTB#

116

INTB#

66

R5C832T_V00

1
3
4
2

SUYIN_1394

FW^270P/25V_4

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1
XD_D2/MS_D2/SD_D2
XD_D3/MS_D3/SD_D3
XD_RE#/CLK
XD_WE#/MS_BS/SD_CMD
SD_CDZ
XD_R/B#/SD_WP#

23
25
29
10
11
24
12
36
35

(4)SD-VCC
(7)SD-DAT0
(8)SD-DAT1
(9)SD-DAT2
(1)SD-DAT3
(5)SD-CLK
(2)SD-CMD
SD-CD
SD-WP

R242
Q16

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1
XD_D2/MS_D2/SD_D2
XD_D3/MS_D3/SD_D3
XD_RE#/CLK
MS_CDZ
XD_WE#/MS_BS/SD_CMD

L53

C594

C589

C373

C587

4.7U/10V

.1u/16V_4

.01U/16V_4

1000P/X7R/50V_4

TPBIAS0
TPB0N
TPB0P
TPA0N
TPA0P

MDIO17
MDIO16
MDIO15
MDIO14
MDIO13
MDIO12
MDIO11
MDIO10

87
92
89
91
90
93
81
82

XD_D7
XD_D6
XD_D5
XD_D4
XD_D3/MS_D3/SD_D3
XD_D2/MS_D2/SD_D2
XD_D1/MS_D1/SD_D1
XD_D0/MS_D0/SD_D0

MDIO05
MDIO08
MDIO19
MDIO18
MDIO02
MDIO03

75
88
83
85
78
77

XD_WPO#
XD_WE#/MS_BS/SD_CMD
XD_ALE
XD_CLE
XD_CE#
XD_R/B#/SD_WP#

MDIO00

80

SD_CDZ

MDIO01

79

MS_CDZ

MDIO09
MDIO04
MDIO06
MDIO07

84
76
74
73

14
19
20
18
16
15
17
21

(9)MS-VCC
(4)MS-DATA0
(3)MS-DATA1
(5)MS-DATA2
(7)MS-DATA3
(8)MS-SCLK
(6)MS-INS
(2)MS-BS

13
22

(3)SD/(1)MS/(1)XD-GND
(6)SD/(10)MS/(9)XD-GND

10K_4

2N7002
1

Q17

MC_PWR_CTRL_0#

33

(18)XD-VCC

+3V

VCC_XD

INTB# <13>

113
104
105
108
109

7
8

Memory Card Power Supply

INTA# <13>

TPBIAS0
TPBN0
TPBP0
TPAN0
TPAP0

(19)XD-CD
(2)XD-R/B
(3)XD-RE
(4)XD-CE
(5)XD-CLE
(6)XD-ALE
(7)XD-WE
(8)XD-WP

34
1
2
3
4
5
6
7

XD_CDZ
XD_R/B#/SD_WP#
XD_RE#/CLK
XD_CE#
XD_CLE
XD_ALE
XD_WE#/MS_BS/SD_CMD
XD_WPO#

(10)XD-D0
(11)XD-D1
(12)XD-D2
(13)XD-D3
(14)XD-D4
(15)XD-D5
(16)XD-D6
(17)XD-D7

8
9
26
27
28
30
31
32

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1
XD_D2/MS_D2/SD_D2
XD_D3/MS_D3/SD_D3
XD_D4
XD_D5
XD_D6
XD_D7

SDIO-GND
SDIO-GND1

37
38

ME2347

30mil

VCC_XD

MC_PWR_CTRL_0
R240

C412

100K_4

4.7u/6.3V

VCC_XD

C410
.01U/16V_4

C409

C407

.01U/16V_4

.01U/16V_4

CARD_READER_TTN_R013-B10-XX-C

VCC_XD

VCC_XD

VCC_XD

CN36

2
D40
2
D39
MS_SD_CLK
R470
MC_PWR_CTRL_0
TP_XD_LED#

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1
XD_D2/MS_D2/SD_D2
XD_D3/MS_D3/SD_D3
XD_RE#/CLK
XD_WE#/MS_BS/SD_CMD
SD_CDZ
XD_R/B#/SD_WP#

23
25
29
10
11
24
12
36
35

(4)SD-VCC
(7)SD-DAT0
(8)SD-DAT1
(9)SD-DAT2
(1)SD-DAT3
(5)SD-CLK
(2)SD-CMD
SD-CD
SD-WP

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1
XD_D2/MS_D2/SD_D2
XD_D3/MS_D3/SD_D3
XD_RE#/CLK
MS_CDZ
XD_WE#/MS_BS/SD_CMD

14
19
20
18
16
15
17
21

(9)MS-VCC
(4)MS-DATA0
(3)MS-DATA1
(5)MS-DATA2
(7)MS-DATA3
(8)MS-SCLK
(6)MS-INS
(2)MS-BS

13
22

(3)SD / (1)MS / (9)XD-GND

(6)SD / (10)MS / (19)XD-GND

+3V

R472
10K_4
1
BAS316
1
BAS316
56.2/F

XD_CDZ

XD_RE#/CLK

T76

GRST#
> 100 ns
SDA_CARD
SCL_CARD

R234

R230

*10K_4

*10K_4

VCC_XD
CN38

(18)XD-VCC

33

(19)XD-CD
(2)XD-R/B
(3)XD-RE
(4)XD-CE
(5)XD-CLE
(6)XD-ALE
(7)XD-WE
(8)XD-WP

34
1
2
3
4
5
6
7

XD_CDZ
XD_R/B#/SD_WP#
XD_RE#/CLK
XD_CE#
XD_CLE
XD_ALE
XD_WE#/MS_BS/SD_CMD
XD_WPO#

(10)XD-D0
(11)XD-D1
(12)XD-D2
(13)XD-D3
(14)XD-D4
(15)XD-D5
(16)XD-D6
(17)XD-D7

8
9
26
27
28
30
31
32

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1
XD_D2/MS_D2/SD_D2
XD_D3/MS_D3/SD_D3
XD_D4
XD_D5
XD_D6
XD_D7

GND1
GND2

37
38

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1
XD_D2/MS_D2/SD_D2
XD_D3/MS_D3/SD_D3
XD_RE#/CLK
XD_WE#/MS_BS/SD_CMD
SD_CDZ
XD_R/B#/SD_WP#

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1
XD_D2/MS_D2/SD_D2
XD_D3/MS_D3/SD_D3
XD_RE#/CLK
MS_CDZ
XD_WE#/MS_BS/SD_CMD

21
31
34
9
11
25
15
39
41

SD-VCC
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CLK
SD-CMD
SD-C/D
SD-WP

19
29
40

SD-VSS1
SD-VSS2
SD-GND

12
22
24
20
16
14
18
26
10
28
42
43

MS-VCC
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-SCLK
MS-INS
MS-BS
MS-VSS1
MS-VSS2
GND
GND

XD-VCC

38

XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP

2
3
4
5
6
7
8
13

XD_CDZ
XD_R/B#/SD_WP#
XD_RE#/CLK
XD_CE#
XD_CLE
XD_ALE
XD_WE#/MS_BS/SD_CMD
XD_WPO#

XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

23
27
30
32
33
35
36
37

XD_D0/MS_D0/SD_D0
XD_D1/MS_D1/SD_D1
XD_D2/MS_D2/SD_D2
XD_D3/MS_D3/SD_D3
XD_D4
XD_D5
XD_D6
XD_D7

XG-GND1
XD-GND2

1
17

*PROCONN-MXP038-A0-4010

*CARD_READER_PLASTREN-CM47-X-38P-L

R5C832T_V00

* NOT Use EEPROM :

R759 : installed
R760,U43,C505 : NOT installed
* Use EEPROM :
R760,U43,C505 : installed
R759 : NOT installed

U12
5
6

SDA
SCL

WP

GND

A0
A1
A2

1
2
3

VCC

*FW^24LC08

PCLK(33MHz)

COMMON MODE CHOKE

NEAR CONN.

38M030006-00
IEEE 1394 CONN 6POLE R/A 787956-1 DIP AMP
<MOUNTED>

SERIRQ <14,30,31>

98
106
110
112

L1394_TPB0L1394_TPB0+

CN26

C590

VCC_XD

AVCC_PHY1
AVCC_PHY2
AVCC_PHY3
AVCC_PHY4

HWSPND#

L1394_TPA0+
L1394_TPA0-

L1394_TPB0L1394_TPA0L1394_TPA0+
L1394_TPB0+

* NOT Use EEPROM : PU

* Use EEPROM : PD

+3V

PRST#

FW^0_4P2R
4
2

3
1

FW^5.1K/F_4

BK1608HS220_6_1A

RSV

FW^.01U/16V_4

5 IN 1 CARD READER

SERIRQ

INTA#

TEST

C588

FW^.33U/10V

CN37

VCC
A

TPB0P

C584

RN18

TPB0N

+3V

FIL0

100

FW^56.2/F_4

R468

R469
10K_4

R458

XO

REXT

R461

FW^56.2/F_4

TPA0P
TPA0N

+3V

1394_AVCC

XI

FW^.01U/16V_4

> 1 ms

AGND1
AGND2
AGND3
AGND4
AGND5

99
102
103
107
111

R459

1394_COM

CLKRUN#

101

97

4
13
22
28
54
62
63
68
118
122

57

IEEE1394/SD

VREF_PWR

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10

55

FW^10K/F_4
C596

4.7U/10V

86

XDEN

FW^.01U/16V_4
R466

C591

.01U/16V_4

AS CLOSE AS
POSSIBLE TO
R5C833

UDIO5

FW^22P/50V_4
C602

C399

+3V

PME#

U32A

C604

PCI / OTHER

AD25

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PAR
CBE3#
CBE2#
CBE1#
CBE0#
PCM_IDSEL

TPBIAS0

67

VCC_ROUT1
VCC_ROUT2
VCC_ROUT3
VCC_ROUT4
VCC_ROUT5

<13> AD[31..0]

REQ2#
GNT2#

1394

+3V

U32B

C603

.01U/16V_4

C610

4.7U/10V

C570

+3V

PROJECT : ZD1
C408

Quanta Computer Inc.

*.1u/16V_4

Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

R5C832/833(5IN1/1394)
5

Sheet
1

28

of

38

ROBSON
DIAMOND-LAKE ASIC
+3V

RBS_AVDDL

RBS_AVDDT

+1.2V

RBS_AVDD
U8

AVDD
AVDDT
AVDDL

2
15
38
52
61
69

VDDO1
VDDO2
VDDO3
VDDO4
VDDO5
GND_PAD
NF_WE[0]#
NF_WE[1]#

R126

33_4

WE#[0]_R

54
55

RE#[0]_RBS

R158

33_4

RE#[0]_R

39
40

NF_RE[0]#
NF_RE[1]#

R159

33_4

CE#[0]_R

42
43
49
50

NF_CE[0]#
NF_CE[1]#
NF_CE[2]#
NF_CE[3]#

CLE_RBS
R161
ALE_RBS
R128
WP#_RBS
READY_BUSY_RBS

33_4
33_4

CLE_RBS_R
ALE_RBS_R

NF_CLE
NF_ALE
NF_WP#
NF_RB
BUSY

R141

330_4 DISK_BUSY_R

51
53
56
37
33

T16
T15
T18
T17
T19

TP_RBS_RSVD2
TP_RBS_RSVD3
TP_RBS_RSVD4
TP_RBS_RSVD5
TP_RBS_RSVD6

9
10
11
12
14

RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]

19

ISET

30
29

CLKP
CLKN

26
25

RXP
RXN

LED1
*LED_G_LTST-C190KGKT

R117

1.4K/F_4

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6

3
8
13
41
45
47

VDDR1
VDDR2
DIS_REG12

46
48
44

NF_IO[0]
NF_IO[1]
NF_IO[2]
NF_IO[3]
NF_IO[4]
NF_IO[5]
NF_IO[6]
NF_IO[7]
NF_IO[8]
NF_IO[9]
NF_IO[10]
NF_IO[11]
NF_IO[12]
NF_IO[13]
NF_IO[14]
NF_IO[15]

DIS_REG12

ISET_RBS

R160

PLACE CLOSE TO NAND FALSH

1K_4

NF_IO_00
NF_IO_01
NF_IO_02
NF_IO_03
NF_IO_04
NF_IO_05
NF_IO_06
NF_IO_07
NF_IO_08
NF_IO_09
NF_IO_10
NF_IO_11
NF_IO_12
NF_IO_13
NF_IO_14
NF_IO_15

57
59
62
64
66
68
4
6
58
60
63
65
67
1
5
7

NAND I/F

CE#[0]_RBS
RE#[0]_RBS
ALE_RBS
CLE_RBS
WE#[0]_RBS
WP#_RBS

31
32

TP_RBS_RSVD7
TP_RBS_RSVD8

T36
T33

RSVD[09]
RSVD[10]
RSVD[11]
RSVD[12]

28
21
20
34

TP_RBS_RSVD9
TP_RBS_RSVD10
TP_RBS_RSVD11
TP_RBS_RSVD12

T31
T22
T23
T38

RSVD[00]
RSVD[01]

16
17

TP_RBS_RSVD0
TP_RBS_RSVD1

T20
T21

TXP
TXN

23
22

+3V

CLOCK
<13> PCIE_TXP5
<13> PCIE_TXN5
T39
<13,14,17,20,22..24,30,31>

PLTRST#

CLRREQ#_RBS
R600
0_4
R601

<31> RBS_RST#

35
36

TXP_RBS_R
TXN_RBS_R

C162
C160

C159

C157

PCIE_RXP5 <13>
PCIE_RXN5 <13>

CLKREQ#
PERST#

RE#[0]_RBS
ALE_RBS
CLE_RBS
WE#[0]_RBS
WP#_RBS

STUFF: INDICATES A 2KB VIRTUAL PAGE. => 256MB

DESTUFF: INDIACTESS A 4KB VIRTUAL PAGE => 512MB & 1024MB

R123
*10K_4

+3V
B

+1.2V
+3V

C128

+1.5V

C164

C188

C210

C150

C207

.1U/10V_4.01U/16V_4
.1U/10V_41U/6.3V_4

R/B1#
NC24
CE1#
NC25
RE#
ALE
CLE
WE#
WP#

PRE/VSS
I/O[0]
I/O[1]
I/O[2]
I/O[3]
I/O[4]
I/O[5]
I/O[6]
I/O[7]

38
29
30
31
32
41
42
43
44

1
2
3
4
5
11
14
15
23
24
25
27
28

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13

NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
DNU1
DNU2
DNU3

26
33
34
35
39
40
45
46
47
48
20
21
22

VCC1
VCC2

VSS1
VSS2

13
36

12
37

C209

C148

C205

C149

C208

R113
R114
R115
R116
R119
R121
R122
R125

33_4 NF_IO_00
33_4 NF_IO_01
33_4 NF_IO_02
33_4 NF_IO_03
33_4 NF_IO_04
33_4 NF_IO_05
33_4 NF_IO_06
33_4 NF_IO_07

FLASH(48P)512MB
<Part Number>
TSOP48-ZS1

C129

C126

7
6
9
10
8
17
16
18
19

R/B1#
NC24
CE1#
NC25
RE#
ALE
CLE
WE#
WP#

PRE/VSS
I/O[0]
I/O[1]
I/O[2]
I/O[3]
I/O[4]
I/O[5]
I/O[6]
I/O[7]

38
29
30
31
32
41
42
43
44

1
2
3
4
5
11
14
15
23
24
25
27
28

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13

NC14
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
DNU1
DNU2
DNU3

26
33
34
35
39
40
45
46
47
48
20
21
22

12
37

VCC1
VCC2

VSS1
VSS2

13
36

NF_IO_08_R
NF_IO_09_R
NF_IO_10_R
NF_IO_11_R
NF_IO_12_R
NF_IO_13_R
NF_IO_14_R
NF_IO_15_R

R87
R89
R93
R98
R102
R103
R104
R108

33_4 NF_IO_08
33_4 NF_IO_09
33_4 NF_IO_10
33_4 NF_IO_11
33_4 NF_IO_12
33_4 NF_IO_13
33_4 NF_IO_14
33_4 NF_IO_15

FLASH(48P)512MB
<Part Number>
TSOP48-ZS1

.01U/16V_4
.1U/10V_41U/6.3V_4

.1U/10V_41U/6.3V_4

NF_IO_00_R
NF_IO_01_R
NF_IO_02_R
NF_IO_03_R
NF_IO_04_R
NF_IO_05_R
NF_IO_06_R
NF_IO_07_R

U6
CE#[0]_RBS

NF_IO_00

PLACE AS CLOSE AS POSSIBLE TO

DIAMOND-LAKE ASIC.

7
6
9
10
8
17
16
18
19

.01U/16V_4
.1U/10V_41U/6.3V_4

.1U/10V_4
.1U/10V_4

PCIE I/F
Diamond_Lake
<Part Number>
QFN68-8X8-4-69P-ZS1

*0_4

C158

U7

READY_BUSY_RBS

RSVD[07]
RSVD[08]

INTEL NAND FLASH

R120
1K_4

RESERVED
<2> PCIE_CLK_RBS
<2> PCIE_CLK_RBS#

PLACEMENT NOTE:
PLACE TERMINATION RESISTERS
AT 10% TO 25% DISTANCE FROM
NAND FLASH.

+3V
+1.5V

POWER

WE#[0]_RBS

CE#[0]_RBS

18
24
27

C206

.1U/10V_4 .1U/10V_4.01U/16V_4
.01U/16V_4
1U/6.3V_4

LAYOUT NOTE:
ANY VIA ADDED BENEATH THE NAND FLASH
NEEDS TO HAVE A SOLDERMASK ON IT.
+3V

RBS_AVDD
L16
BK1608HS800-T

+1.5V

RBS_AVDDT
L17
BK1608HS800-T

C147

C152

.1U/10V_4

.01U/16V_4
.1U/10V_41U/6.3V_4

C146

C155

+1.5V

RBS_AVDDL
L20
BK1608HS800-T

C161

C166

.1U/10V_4

.01U/16V_4
.1U/10V_41U/6.3V_4

C167

C168

C186

C179

.1U/10V_4

.01U/16V_4
.1U/10V_41U/6.3V_4

C180

C181

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

ROBSON
5

Sheet
1

29

of

38

INT K/B

MY15
MY14
MY13
MY12
MY11
MY10
MY9
MY8
MY7
MY6
MY5
MY4
MY3
MX7
MX6
MY2
MX5_BT#
MX4_WL#
MX3_3G#
MX2_WWW#
MY1
MY0
MX1_EMAIL#
MX0_E_KEY#
MY16
MY17

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5_BT#
MX4_WL#
MX3_3G#
MX2_WWW#
MX1_EMAIL#
MX0_E_KEY#

+3V

CPU FAN

CN6

<31>
MY15
<31>
MY14
<31>
MY13
<31>
MY12
<31>
MY11
<31>
MY10
<31>
MY9
<31>
MY8
<31>
MY7
<31>
MY6
<31>
MY5
<31>
MY4
<31>
MY3
<31>
MX7
<31>
MX6
<31>
MY2
<22,31> MX5_BT#
<22,31> MX4_WL#
<22,31> MX3_3G#
<22,31> MX2_WWW#
<31>
MY1
<22,31> MY0
<22,31> MX1_EMAIL#
<22,31> MX0_E_KEY#
<31>
MY16
<31>
MY17

+5V
R351

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

C638

10K_4

0C Add 0103

2.2U/10V_8

+3VSUS

<31> FANSIG

+5V
RP5
MX3_3G#
MX2_WWW#
MX1_EMAIL#
MX0_E_KEY#

10
9
8
7
6

1
2
3
4
5

U23

MX4_WL#
MX5_BT#
MX6
MX7

2
<3> CPUFAN#_ON

CPUFAN#_ON

VO
GND
/FON GND
GND
VSET GND

CPUFAN#

<31> CPUFAN#

VIN

CN20

TH_FAN_POWER

3
5
6
7
8

C512

C511

C510

2.2U/10V_8

.01U/16V_4

*.01U_4

1
2
3

G995

10KX8

FAN_CON

FANPWR = 1.6*VSET

Aces 88502-2641

DEBUG PORT

LED

EC Debug Port
+3V

+3V

+3V

+3VPCU

+3V

<31> EC_SOUT_CR_DEBUG
<31> EC_SWD_DEBUG

R323

R322
10K_4

R334
330_4

1
2
3
4

CN10
*ACES_88231-0400

IDE_LED

LAD0
LAD1
LAD2
LAD3

<12,22,31> LAD0
<12,22,31> LAD1
<12,22,31> LAD2
<12,22,31> LAD3
<2,22> PCLK_DEBUG
<12,22,31> LFRAME#
<13,14,17,20,22..24,29,31> PLTRST#
<14,28,31> SERIRQ

T87
T88
T89
T90
T91
T92
T93
T94

LFRAME#
PLTRST#
SERIRQ

IDE_LED <22>

10K_4

R318
10K_4

1
EC_SOUT_CR_DEBUG 2
EC_SWD_DEBUG
3
4

Reserved for LPC debug card

<24> IDELED#
<12> SATA_LED#

D26

BAS316

D25

BAS316

Reserve to debug
2

Q23

2N7002E

T/P

+5V
+5V
L45
BLM21P300S
+TPVDD

+3VPCU

R344

R386
10K_4

LED2

330_4

SUSLED# <22,31>

PWRLED# <22,31>

C529
L44
L43

<31> TBDATA
<31> TBCLK

LED_DUAL_LIGHT

R338

R385
10K_4

.1U/16V_4

LZA10-2ACB104MT
LZA10-2ACB104MT

CN7

LED3

330_4

BATLED1# <31>

BATLED0# <31>

1
2
3
4
5
6

TPDATA_R
TPCLK_R

ACES_88058-0601

LED_DUAL_LIGHT

EMI solution
+5V

Q15
DTA114YUA

NUMLED <22>

C643

C644

1000P/50V_4

1000P/50V_4

CAPSLED

CAPSLED <22>

330_4

10K

330_4

10K

NUMLED

R221
47K

47K

<31> NUMLED#

C641

1000P/50V_4 1000P/50V_4

+3V

+3V
R235

C642

Q14
DTA114YUA

+3V

+1.5V

PROJECT : ZD1

NUMLED#
<31> CAPSLED#

CAPSLED#

Quanta Computer Inc.

Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

FAN,LED,KB,DEBUG PORT,TP
5

Sheet
1

30

of

38

+3VPCU

+3VPCU
1/13 Vendor mail:
Dedicate cap for AVCC

L51

+3V

C406

C402

1/13 Comfirm by vendor mail:

VBAT for keep PLL power let power up can quick.
no VBAT will switch to VCCpower.
If PLL no power will cause boot time delay.

C600

C384

.1U/10V_4

If
.1U/10V_410U/10V_8

C387

8
121

<12> RCIN#

122

<14>

D15

SCI#

BAS316 SCI#_uR

<22> A_KEY

124

C394
*10P_4

<13,14,17,20,22..24,29,30>

PLTRST#

PLTRST#

GA20

LPCPD/GPIO10/HGPIO00

LREST

<14,28,30> SERIRQ

125

SERIRQ

SMI

MX0_E_KEY#
MX1_EMAIL#
MX2_WWW#
MX3_3G#
MX4_WL#
MX5_BT#
MX6

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

MY16
MY17

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
KBSOUT16/GPIO60
KBSOUT17/GPIO57/HGPIO03

MBCLK
MBDATA
MXM_CLK
MXM_DATA

70
69
67
68

SCL1
SDA1
SCL2
SDA2

72
71
10
11
12
13

PSCLK1
PSDAT1
PSCLK2/GPIO26
PSDAT2/GPIO27
PSCLK3/GPIO25
PSDAT3/GPIO12

77

32KX1/32KCLKIN

<30> TBCLK
<30> TBDATA
<22> TB2CLK
<22> TB2DATA

8768_32KX1

R212

8768_32KX2

Y2

3
4

C363
C356
5.6P/50V_4

32.768KHZ

4
VDD
31
117
63

A_PWM0
A_PWM1/GPIO21
B_PWM0/GPIO13

32
118
62

32KX2
WPC8769LDG

TIMER

SPI

IR
SMB

PS/2

.1U/10V_4

C636

.1U/10V_4

TEMP_ABAT

+3VPCU

MBCLK
MBDATA
MXM_CLK
MXM_DATA

R448
R438
R544
R535

4.7K_4
4.7K_4
4.7K_4
4.7K_4

CRT_SENSE#

R223

4.7K_4

+3V

11/23 Reduce switch

On/Off noise

I/O ADDRESS SETTING

I/O Address

MTEMP <32>

T56

BADDR1-0

DIGVOL_UP
DIGVOL_DN

DIGVOL_UP <26>
DIGVOL_DN <26>

DA3_GPI97

CC-SET <32>
CPUFAN# <30>
TV_KEY <22>

T86

R542

ACIN <17,22,32>
NBSWON# <22>
LID591# <14,22,23>
SUSB# <7,14>
EC_FPBACK# <23>
SUSLED# <22,30>
PWRLED# <22,30>
BATLED0# <30>
BATLED1# <30>
VRON <34>
MAINON <35..37>
PWROK_MXM <17>
AMP_MUTE# <27>
TV_FAN <21>
SUSON <36,37>
LAN_ENERGYDET <20>

*0

0C Add net 0104

TV_FAN

0C Add net 0104

LAN_ENERGYDET

0C Add net 0110

0C Add net 0110

XOR TREE TEST MODE

01

CORE DEFINED

10

2Eh

2Fh

11

164Eh

164Fh

HWPG
BAS316

BADDR0

CCD_POWERON

BADDR1

SOUT_CR_DEBUG R237

*10K_4

SHBM

RF_EN

10K_4

10K_4

1/13 Comfirm by vendor mail :

Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware
C

ACER ID

+3VPCU

U9
6
5

Modify Rev:D

DNBSWON# <14>
BT_POWERON# <21>
CCD_POWERON <21>

T55
08/10 FAE: ADD TP FOR DEBUG
R419
*0

R239

R218

MBCLK
MBDATA

D/C# <32>
S5_ON <33,37>
LAN_LOWPWR <20>

LAN_LOWPWR
D17

Data

00

SHBM=0: Enable shared memory with host BIOS

PWROK_MXM

DNBSWON#_uR

Index

A0
A1
A2

1
2
3

VCC
GND

8
4

SCL
SDA
WP

C343
.1U/10V_4

24LC08

CCD_POWERON ACITVE LO => HI

PCIE_WAKE# <14,20,22>
RBS_RST# <29>
FANSIG <30>
EC_L_BKLT_CTRL <18>
USBON# <22,25>
3G_ON <22>

SPI FLASH

+3VPCU

+3VPCU
U11

SPI_DI/GPIO77
SPI_DO/GPO76/SHBM
SPI_SCK/GPIO75

86
87
90
92

SPI_SDI_uR
SPI_SDO_uR
SPI_CS0#_uR
SPI_SCK_uR

81

SWD_DEBUG

CLKOUT/GPIO55

30

uR_TP_CLKOUT

VCC_POR

85

VCC_POR#

R224

104

VREF_uR

R236

F_SDI
F_SDO
F_CS0
F_SCK

VREF

SPI_SDI_uR

CRT_SENSE# <13,19>
RF_EN <22>
CELL-SET <32>

RF_EN

RSMRST#_uR

SWD/GPIO66

08/10 FAE:
ADD ONE GAD PAD UNDER X'TAL,
AND KEEP CLEANCE.

84
83
82
75
73
74
113
14
114
111

IRRX1/GPIO72
IRRX2_IRSL0/GPIO70
IRTX/GPIO71
SIN_CR/CIRRX/GPIO87
GPIO34/CIRRX2
CIRTX/GPIO16/HGPIO04
SOUT_CR/GPO83/BADDR1

FIU

R222

PWROK_EC_uR

R215

R233
10K_4

RSMRST# <14>
SUSC# <14>
PWROK_EC <14>

0_4

R238

0_4

R596

22

R597

22

R453

12/4 Add 22 ohm for EMI

SPI_SCK_uR_R
0_4

SPI_CS0#_uR

SI

8
7

WP

VSS

SCK
CE

C393
.1U/10V_4

1/13 Comfirm by vendor mail :

If the Southbridge enables 'Long Wait Abort' by default, the
flash device should be 50MHz (or faster)

EC_SOUT_CR_DEBUG <30>

SPI_SDO_uR_R

SPI_SCK_uR_R

VDD
HOLD

SO

W25X80VSSIG

CIRRX2 <21>
SOUT_CR_DEBUG

SPI_SDO_uR_R 5

BUTTON ON KEYBOARD MATRIX

EC_SWD_DEBUG <30>

T46
4.7K_4 +3VPCU
0_4 +A3VPCU

0~AVCC power for DA pin

power reference
08/14 FAE:
Please connect VREF(uRider pin104) to
+A3VPCU instead of +3VPCU.
C346

5.6P/50V_4
+3V

1/13 Comfirm by vendor mail :

Connect to AGND
8769AGND

79

R216
33K/F
2
1

0810 FAE:
CHECK X'TAL'S FOOTPRINT
CEECK RESULT: OK

20M

TA1/GPIO56
TA2/GPIO20
TB1/GPIO14/HGPIO4

GND1
GND2
GND3
GND4
GND5
GND6

<3,32> MBCLK
<3,32> MBDATA
<17> MXM_CLK
<17> MXM_DATA

54
55
56
57
58
59
60
61

5
18
45
78
89
116

<22,30> MY0
<30>
MY1
<30>
MY2
<30>
MY3
<30>
MY4
<30>
MY5
<30>
MY6
<30>
MY7
<30>
MY8
<30>
MY9
<30>
MY10
<30>
MY11
<30>
MY12
<30>
MY13
<30>
MY14
<30>
MY15
<30>
MY16
<30>
MY17

64
95
93
94
119
109
120
65
66
15
16
17
20
21
22
23
24
25
26
27
28
91
110
112

LPC

LDRQ/GPIO24/HGPIO01

08/10 FAE: SMI DOESN'T NEED DIODE <14> KBSMI#

MX0_E_KEY#
MX1_EMAIL#
MX2_WWW#
MX3_3G#
MX4_WL#
MX5_BT#
<30>
MX6
<30>
MX7

GPIO01
GPIO03
GPIO06/HGPIO06
GPIO07/HGPIP07
GPIO23
GPIO30
GPIO31
GPIO32
GPIO33
GPIO36
GPIO40
GPIO42/TCK
GPIO
GPIO43/TMS
GPIO44/TDI
GPIO45
GPIO46/TRST
GPO47/JEN0
GPIO50/TDO
GPIO51
GPIO52/RDY
GPIO53
GPIO81
GPO82/HGPIO00/TRIS
GPO84/HGPIO01/BADDR0

D/A

ECSCI

PWUREQ

<22,30>
<22,30>
<22,30>
<22,30>
<22,30>
<22,30>

101
105
106
107

KBRST

123

<30> NUMLED#

DA0/GPI94
DA1/GPI95
DA2/GPI96
DA3/GPI97

A/D

CLKRUN/GPIO11/HGPIO02

29

<30> CAPSLED#

97
98
99
100
108
96

VCORF

<12> GATEA20

AD0/GPI90
AD1/GPI91
AD2/GPI92
AD3/GPI93
AD4/GPIO05
AD5/GPIO04

C634

DIGVOL_DN

44

<14,28> CLKRUN#

R232
*22_4

LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK

DIGVOL_UP

VCORF_uR

PCLK_591

PCLK_591

3
126
127
128
1
2

AGND

<12,22,30> LFRAME#
<12,22,30> LAD0
<12,22,30> LAD1
<12,22,30> LAD2
<12,22,30> LAD3
<2> PCLK_591

08/10 FAE:
0.1UF

80

U10

VBAT

C567
C404
.1U/10V_4 .1U/10V_4

103

C609
.1U/10V_4

102

C608
.1U/10V_4

VCC1
VCC2
VCC3
VCC4
VCC5

C568
.1U/10V_4

AVCC

C569
2.2U/10V_8

19
46
76
88
115

.1U/10V_410U/10V_8

8769AGND

SM BUS PU

1/13 Comfirm by vendor mail:

VDD must power up after VCC/AVCC

+A3VPCU

BLM18AG601SN1

L26
HZ0603B601R-00

1U/16V

GPIO PIN PU

R214
10K_4

TV_KEY

R518

+3VPCU

INTERNAL KEYBOARD STRIP SET

A

+3VPCU

4.7K_4

MY0

R437

10K_4

8769AGND
<37> HWPG_CPUIO
<33> HWPG_3/5VPCU
<35> HWPG_1.05V
<36> HWPG_1.8V

D12

BAS316

D14

BAS316

D16

BAS316

D13

BAS316

HWPG

08/10 FAE:
L83 CAN CHANGE FROM BEAD TO SHORT.
BUT, PLEASE PUT AGND & 32K CAP & AVCC CAP AT ONE POINT.

R521

PROJECT : ZD1
Quanta Computer Inc.

0_4

ZS1 STILL USE BEAD FOR SAFE.

MPWROK <7,14>

Size

Document Number

Date:

Monday, May 07, 2007

Rev
E

PC8769L & FLASH

3

Sheet
1

31

of

38

0.02_3720
PR82

VA

PC84
.1U/X7R/50V_8

PL13

PDS1040S-13

HI0805R800R-00_8

PQ31
SUD45P03-15
2

PC11
0.1U/X7R/25V_8

PR9
220K/F

PC82
PC87 .1U/X7R/50V_8
.1U/X7R/50V_8

ACIN_1

10K/F
PR10

PR13
6.8K/F

PR8
220K/F

PR5
20

PR7

VIN

PC12 2.2U/X5R/10V_8
1
2

PC90

CSON

20

PC6
1

15
BOOT

47n/X7R/25V_6
22 CSON

PC9
23
0.1U/X7R/50V_6 ACPRN
DCIN

PC86

24

17

PHASE

18

ISL6251_PHASE

LGATE

14

ISL6251_LGATE

PGND

13

GND

12

PC3
.01U/50V_6

PQ35
2N7002E

PR111
100K/F

PQ34
2N7002E

3
A

CHLIM

10

VRFE
8

VCOMP

ICM
7

ICOMP

ACLIM

G1

D1 1

7 S1/D2

D1 2

G2 3

S2 4

VA3
PL11
SIL104R-100PF

PR81
0.03_3720
6251LR
1

BAT-V

2
PC154
2200P/50V_6

PC89
.01U/50V_6
VREF
PR100
19.6K/F

PR91
*514K/F

VADJ

PC94
PC91
10U/X6S/25V_1206 10U/X6S/25V_1206

CSOP
CSON

Float = 4.2V / CELL

B

ACLIM
PR102
33K/F

PU1
ISL6251A

PR85
*514K/F

LIM = (1/R2)*(((0.05/VREF=2.39)VACLM)+0.050)
PC96
100P/NPO/50V_6

PC101
100P/NPO/50V_6

CURRNT LIMIT POINT =(90w/19v)*0.85= 4.026A

4.026A=(1/0.02)((0.05/2.365)Vaclm+0.05)

Vaclm=((33//152)/(33//152+19.6//152))*Vref

PR16
ICMNT
PR92
10K/F

R2=adapter current sense resistnece

*100_4

PC102
.01U/50V_6

PR105
100K/F

11

PQ29
FDS6900AS

CC-SET <31>

PC95
6.8N/X7R/50V_6

6251CELLS_2 2

<31> CELL-SET

CELLS

PR110
10K/F

*100K/F

PR14 10K/F

0.1U/X7R/25V_8

VREF

6251VCOMP2

PR158

6251CELLS_1

MTEMP

MBDATA <3,31>

PD1
ZD3.6V

6251EN

PR15 10K/F

6251VCOMP1

ISL6251_VDD

6251ICOMP 5

+3VPCU

MBCLK <3,31>

PD2
ZD3.6V

EN

PR86
10K/F

100K/F

ACSET

VADJ

PR157
47P/NPO/50V_6
0.1U/X7R/50V_6

MBDATA

PL9
HI0805R800R-00_8

PC83

6251ACSET 2
3

PR2
100_4

PR1
100_4

PR87
130K/F

HI0805R800R-00_8
PL8
BAT-V

LITTLE-7A-1206

10mil

47P/NPO/50V_6

SUYIN_BATTERY

PF2
1

PL12
HI0805R800R-00_8

PC93 .1U/X7R/50V_8
6251B_1

UGATE

MTEMP <31>
CN15

PR83 2.7
6251B_2
16

ISL6251_UGATE

DCIN

4.7U/X5R/10V_8
2
PD10
RB500V

VDDP

1
VDD

CSIN

CSOP

PC8

10U/X6S/25V_1206

PC92

ISL6251_VDDP

PR167

PQ1
2N7002E

1P

21

20

19
20/F

CSIP

PR4

CSOP

PC1

D/C# <31>

PC2

PR90
4.7

PC7
0.1U/X7R/50V_6
CSIN_1

8
9

PR6
10K

2200P/50V_6
PC153

PR166
2

PC97
0.1U/X7R/25V_8

CSIP

10K/F

100P/NPO/50V_6
MBAT+
MTEMP

PR11
33K

PQ2
IMD2AT108

CSIN

ZD12V

ISL6251_VDD

1
2
3
4
5
6
7

PC151
2200P/50V_6

PD4

<17,22,31> ACIN

PD3
RB500V

PR12

PQ32
SUD45P03-15

VIN

2200P/50V_6

PC85
.1U/X7R/50V_8

PC152

2P

LITTLE-7A-1206

POWER_JACK

2P

1
2
3
4

PD9

1P

HI0805R800R-00_8
PL10

PF1

PJ1

PC13
*3300P/X7R-50V_6

PROJECT : ZD1
CELL-SET = Hi ----> Cells = VDD ---->4S
CELL-SET = Low ----> Cells = GND ---->3S
5

Quanta Computer Inc.

Size
Custom

Document Number

Date:

Monday, May 07, 2007

Rev
C

ISL6251 CHARGER
Sheet
1

32

of

38

MAIND

MAIND <36,37>

SUSD

SUSD <37>

PL20

<3> SYS_SHDN#

2
ISL6236_3V

PR146
0_4

HI0805R800R-00_8
PL5

PL18
VIN

VIN

VL

HI0805R800R-00_8

HI0805R800R-00_8

VL

PC78

1
2
3

5V_DL

PC79
0.1U/X7R/50V_6

1
2
3

FDS6690AS

PR75
1/F
1

Add on 9/27

PQ27

PD7

PU7
ISL6236

4
2

PR78

+3VPCU
PL6
2.5uH_7.5A

32
31
30
29
28
27
26
25

PR70
290K/F_4
2

3V_LX
C

DDPWRGD_R
3V5V_EN

3
CHN217
PD6

PR152
1/F
2

PC141
0.1U/X7R/50V_6

PR149
*0

3V_DL

DDPWRGD_R

PC67
0.1U/X7R/50V_6

PC58
0.1U/X7R/50V_6

PR150

HWPG_3/5VPCU

1
3
1
CHN217

+15V_ALWP

15V
22_8

2
PR69
200K/F_4

PC68
0.1U/X7R/50V_6

Iocp=6.25-(2.18/2)=5.16A
Vth=5.16A*28mOhm=145mV
R(Ilim)=(145mV*10)/5uA
~294K

PR68

PR76
39K/F_4

+3VPCU

PC62

+5VPCU

+5VPCU

1
2
5
6

Iocp==OCP-(Delta IL/2)=10-(6/2)=7A
Vth=7A*15mOhm=105mV
R(Ilim)=(105mV*10)/5uA
~210K

L(ripple current)
=(19-3.3)*3.3/(2.5u*0.5M*19)
~2.18A

PD8
BAT54-7-F

+3VPCU

SUSD

+3VPCU

4
MAIND

MAIND

PR160
1M

PQ26
FDC653N_NL

+5V

3
2
1

PQ41
PQ44
2N7002E

+5V_S5

1
2
5
6
S5D

0.1U/X7R/50V_6

+3V_S5

PC60
0.1U/X7R/50V_6

PC61
0.1U/X7R/50V_6

PC142
0.1U/X7R/50V_6

PROJECT : ZD1

modify 0103 2007

5

PC59
0.1U/X7R/50V_6

PQ18
FDC653N_NL

+3V

PC77
0.1U/X7R/50V_6

FDS8884

PQ17
FDC653N_NL

+3VSUS

PC64

0.1U/X7R/50V_6

S5D

PC63

0.1U/X7R/50V_6

<31,37>

PC70

0.1U/X7R/50V_6

1
2
5
6

PR153
1M

1
2
5
6

5
6
7
8

PC146
PR159
1M

0.1U/X7R/50V_6
PQ16
FDC653N_NL

15V

PDTC143TT

<31>

OCP:6.25A

2
2

Delta IL(ripple current)=(Vin-Vout)*Vout/(L*f*Vin)

=(19-5)*5/(1.5u*0.4M*19)
~6A

S5_ON

330U/6.3V_6X5.7

OCP:10A

PQ43

PC76
+

PC66
1U/16V_6

VIN

PC65

PR147
0

0.1U/X7R/50V_6

VL

OCP : 6.25A
3V_DH

REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
EN2
DH2
LX2

PC137
0.1U/X7R/50V_6

LDOREFIN
LDO
VIN
RTC
ONLDO
VCC
TON
REF

8
7
6
5
4
3
2
1

PC75
0.1U/X7R/50V_6

PR144
0_4

35
34
33

PC143
10U/X6S/25V_1206

330U/6.3V_6X5.7

1
PR151

8
7
6
5

5V_LX
PR148
*0_4

BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD
PAD
PAD
PAD

9
10
11
12
2
210K/F_4 DDPWRGD_R 13
3V5V_EN
14
15
16
37
36

17
18
19
20
21
22
23
24

+5VPCU

PL7
1.5uH_10A

3V_DH

PR141
*0_4

BST1
DL1
VDD
SECFB
GND
PGND
DL2
BST2

FDS8884

+5VPCU

PR143
*0_4

8
7
6
5

150K/F_4

PQ23
FDS6900AS
G1

OCP: 10A

5V_DH

PC144
10U/X6S/25V_1206
PC80
PC145
2200P/X7R/50V_6
10U/X6S/25V_1206

1
S1/D2

PR138
4

PQ25

3V5V_EN

PC81
0.1U/X7R/50V_6

PC140
0.1U/X7R/50V_6

PC139
.01U/25V_6

D1

PC136
0.1U/X7R/50V_6

3V_DL
PR139
0_4

PC135
1U/16V_6

G2

PR140
0_4

D1

PC72
PC74
2200P/X7R/50V_6
10U/X6S/25V_1206

PC138
4.7U/X5R/10V_8

S2

PC73
0.1U/X7R/50V_6

PR145
39K/F_4

PR142
390K_4

Quanta Computer Inc.

Size
Custom

Document Number

Date:

Monday, May 07, 2007

Rev
B

ISL6251 CHARGER
Sheet
1

33

of

38

PL2
HI0805R800R-00_8
VIN_6262
PL1
HI0805R800R-00_8

PR99
*0
DELAY_VR_PWRGOOD

H_VID1

H_VID0

+5V_S5

PC114
0.1U/X7R/50V_6

6262_LG1

PC100 0.1U/X7R/50V_6

PC157

RBIAS

VR_TT#

NTC

VID1

UGATE2

39

VID2

BOOT2

H_VID3

40

VID3

41

VID4

<7,14> PM_DPRSLPVR
<3,7,12> ICH_DPRSTP#
<14> VR_PWRGD_CK410#

43

VID6

44

VR_ON

PR18

499/F_4

DPRSLPVR

45

DPRSLPVR

PR104

0_4

46

DPRSTP#

PR103

0_4

47

CLK_EN#

13

29

ISEN2

23

PC15

OCSET
VSUM

19

1
2
3
2

+ PC119

330U/2V_7

330U/2V_7

*2200P/100V_6

PR124

PR125

VSUM
ED8-B -0623-33nf to 68nf
PR28
PR27
2.7K/F_4
11K/F_4

FB2

FB

68N/X7R/25V_6

10

PR84

Panasonic
ERT-J1VR103J

COMP
VO

6.81K/F_4

PC110
.01U/16V_4

10K/F

PR127

1/F

PR126

*0

18

1K/F_4

DFB

ISEN1
PR123

PR119
3.48K/F_4

PC19
0.22U/X5R/25V_6

Close to Phase 1 Inductor

ED8-B -0623-3.9k to 3.48k

PC117
180P/NPO/50V_4
ISL6262_VO
2
1

17

1000P/X7R/50V_6

DROOP

RTN
15

PC107
1
2

3.65K/F

PR128

10K _6 NTC

16

VW

VSEN

PR129
VSUM

PC20

PC113
.01U/16V_4

+ PC120
PC160

1000P/X7R/50V_4
PR112
13.3K/F_4

0.22U/X7R/10V_6

470P/X7R-50V_4

PR113

PQ36
AOL1412

VDIFF

PC18
1

ED8-B -0623-390p to330p

*2.2

25
8

0.36uH
2

ISEN2

220P/X7R/50V_4

PL15
1
PR164

PC105

14

*2200P/50V_6

PC22
11

PC159

PGND2

1K/F_4

97.6K/F_4

6262_LG2

PR118

PR25

PC108
0.1U/X7R/50V_6

6262_PH2

PC115
0.22U/X5R/25V_6

1000P/X7R/50V_6
12

PC118
10U/X6S/25V_1206 PC112
10U/X6S/25V_1206

LGATE2

30

NC

PC109
1
2

255/F_4

PHASE2

1K/F_4

PR115

6262_UG2

27
PR116 2.2
26 1
2

28

VID5

VR_ON

CLKEN#

AOL1414

PC106
0.22U/X5R/25V_8

0_4

PR117

H_VID6

31

PC158
2200P/50V_6

4.7U/X6S/25V_8

PR17

<4> H_VID6
<31> VRON

42

PGOOD

48
3V3

38

H_VID2

H_VID5

<4> H_VID5

PVCC

H_VID1

H_VID4

<4> H_VID4

PQ37

<4> H_VID3

*2.2

PC116
+5V_S5 0.22U/X5R/25V_6
PC104

VID0

PR163

<4> H_VID2

ISEN1

SOFT

37

<4> H_VID0
<4> H_VID1

24

1
2
3

H_VID0

33

ISEN1

7
1 PC17
0.022U/X7R/50V_6

2
2

PGND1

VIN_6262

PR24
4.02K/F_4

PC16 1
.01U/16V_4

*0

ISEN2

147K/F

32

PR101

LGATE1

PGD_IN

34

PSI#

1/F

PR29

PR89

PGD_IN

PHASE1

PSI#_1

*0_4

10K/F

PR30

0_4

PR23

PR31

35
PR107 2.2
36 1
2

PR106

PR109
470K_4 NTC

DPRSLPVR

BOOT1

PC103
0.22U/X5R/25V_8

VR_ON

ED8-B -0623-add

PR20
*0

UGATE1

PSI#

*10K/F_4

PSI#_1

GND_T

Throttling temp.
105 degree C

<3> H_PROCHOT#

Panasonic
ERT-J0EV474J

GND

49

3.65K/F

PR108

21

PR32

PR88

VSUM

Close to Phase 1 Inductor

+3VSUS

+ PC99
*330U/2V_7

PQ33
AOL1412

2
20

22

PU8

ISL6262A

0.36uH
2

*2200P/100V_6

VIN

PC21
1U/X7R/25V_8

VCC

0_8

PR114

PR162
*2.2

PR121
10/F

VCC_CORE

PR21

PSI#

PSI#

Yonah: VCC_CORE/ 36A

1.91K/F_4

<3>

PL14
1

6262_PH1

PR19
10_4

PR120
10/F

for ISL6262A

PC14
0.1U/X7R/50V_6

+3V

VIN_6262

1
2
3

PWR_MON

4.99K/F
PGD_IN
1

PR22

Merom: VCC_CORE/ 44A

PC88
PC10
PC4 10U/X6S/25V_1206 PC5
470U/25V_10*10.2
0.1U/X7R/50V_6
PC156
10U/X6S/25V_1206
*2200P/50V_6

1
2
3

6262_UG1

H_VID2

H_VID3

PR161
*2.2

H_VID4

PQ30
AOL1414

H_VID5

<3,7,14>

H_VID6

VIN
+
2

PR98
*0

PR97
*0

PR96
*0

PR95
*0

PR94
*0

PR93
*0

PC155
2200P/50V_6

+1.05V

PC111
.01U/16V_4

Parallel
PR26

0_4

PR122

0_4

VCCSENSE <4>
VSSSENSE <4>

PROJECT : ZD1
Size
Custom
Date:
5

Quanta Computer Inc.

Document Number

Rev
C

CPU CORE(ISL6262)
Sheet

Monday, May 07, 2007

1

34

of

38

VIN-1.5V

PL4
VIN

+5V_S5

HI0805R800R-00_8

PR53
5
6
7
8

PC56

2
LX

11

FBK

PGOOD

ILIM

13

10

VDDP

DL

VSSA

PGND

NC

TPAD

17

14

NC

PL3

+1.05V
PR55

13.3K/F

1R5UH-3.8mR

DL-1.5V

PR56

+
11K/F

3
2
1

PC47
560U/2.5V_6X5.7

FDS6690AS

0.1U/50V_6

PC52
33P/NPO/50V_6
1.5V_FB

PQ46

21

20

16A

DH-1.5V

GND

VCCA

18

1000P/X7R/50V_6

PC53

0.1U/X7R/50V_6

PC54

PC48

<31> HWPG_1.05V

FDS8884

12

VOUT

PQ45

DH

BST

GND

PR136
*10K

4.7U/Y5V/10V_8

3
2
1

VIN

PC57

5
6
7
8

EN/PSV

16
1

PC49

PC51
.1U/X7R/50V_8

15

GND

47K

+3V

GND

PR57

SW1010C

PU6
SC411MLTRT

19

<31,36,37> MAINON

PD5

*.1U_6
1

PC50

PR58
1M

PC55

.1U/X7R/50V_8 10U/X6S/25V_1206 10U/X6S/25V_1206

10

PC44
10U/Y5U/10V_8

PR54
10K/F

VOUT=(1+R2/R3)*0.5

Rdson*Iocp=PR55*10u

Rdson=15m ohm

PROJECT : ZD1
Quanta Computer Inc.
Size

Document Number

Rev
C

VTT +1.05V
Date:
1

Monday, May 07, 2007

Sheet
5

35

of

38

PL17
VIN
HI0805R800R-00_8

+1.8VSUS
5
6
7
8

PC126
PR33

PC127
4

PU9
TPS51116

PR135
+SMDDR_VREF
0

5VIN
PC129
0.033U/50V_6

PR38

5VIN

VBST

20

VTTSNS

LL

18

GND

DRVL

17

VTTGND

PGND

16
S3_1.8V

PR134

PR133

MODE

S3

11

VTTREF

S5

12

S5_1.8V
5VIN

COMP

VDDSNS

10

*0

V5IN

14

PGOOD

13

CS

15

VDDQSET

21
22
23
24
25
26
27

DIS_MODE

PR35
14K/F

PR37

R2
R1

+1.8VSUS

PR130

MAINON <31,35,37>

MAX Current 10A

PC23
10U/X5R/10V_8

560U/2.5V_6X5.7

*2.2/F

SUSON <31,37>

+3VPCU

PQ4
FDS6690AS

+3VPCU

PC121
*2200P/50V_6

PQ3
*FDS6690AS

(10u*PR35)/Rdson+Delta_I/2=Iocp

5VIN

HWPG_1.8V <31>

PL16
1R5UH-3.8mR

100K/F

PC32

0
+1.8VSUS PR41

PR132

*1000P/50V_6

+5VPCU

0.1U/X7R/50V_6

PC24
PC124
10U/X6S/25V_1206 10U/X6S/25V_1206

PC123 +

*0
FOR DDR II

PR40

PC29

5
6
7
8

VTT

3
2
1

PC25
*2200P/50V_6

FDS8884

5
6
7
8

19

3
2
1

DIS_MODE

DRVH

PQ39

3
2
1

10U/X6S/25V_1206

VLDOIN

10U/X6S/25V_1206

PC130

GND
GND
GND
GND
GND
GND
GND

+SMDDR_VTERM
PC131

2200P/X7R/50V_6

*2.2/F

10U/X6S/25V_1206

PC128
4.7U/X5R/6.3V_6

PR156
110k

PR165
76.8k
+1.8VSUS
B

1
2
5
6

if tune Vout PR38 un-mount, PR156 PR165 mount

*0.47U/10V_6

PQ38
FDC653N_NL

PC122

PR131

R1=(100*Vout-R2)K

+1.8V

+1.8V_MXM
PL19

<33,37> MAIND

PC161 HI0805R800R-10_6
PC125
0.1U/X7R/50V_6

0.01u/16v_6

MAX Current 3.5A

PC162
0.01u/16v_6

PC161 ,PL19 & PC162 near CN27

<OrgName>
<OrgAddr1>
<OrgAddr2>
<OrgAddr3>
<OrgAddr4>

PROJECT : ZD1
Quanta Computer Inc.

Size

Document Number

Date:

Monday, May 07, 2007

Rev
B

DDR 1.8V(TPS51116)
5

Sheet
1

36

of

38

PR34
MAINON
PQ5

+1.8VSUS

1
2
3

VO1

EN

VO2

+2.5V

VIN1

GND1

0.5A

VIN2

GND2

PU2
AT818

0.1U/X7R/50V_6 10U/X5R/6.3V_6
9338DRV
4

*560U/2.5V_6X5.7

100K_4

0_4

PGD

ADJ

0.01U/X7R/50V_6

Rg

9338EN 4

EN

+5VPCU

DRV

VCC

PC41

GND

PR49

PR44
634K/F_4

PC37
22U/Y5U/6.3V_8 PC35
0.1U/X7R/50V_6

R2

Vout=0.8*[1+(R1/R2)]

PC46

REV:3A MODIFY
MAINON

PR43
294K/F_4

+1.5V <4,10,13,15,22,23,26,29,30>

PR48

<31> HWPG_CPUIO

PC28
0.1U/X7R/50V_6

3A

+1.5V

0
+3V

PC26
PC27
10U/Y5U/10V_8 1U/16V_6

R1

VTT-ADJ

0.8V

PR52

PR50
20K/F

PC133
+

Vout1 = (1+Rg/Rh)*0.5
PU5
G9338 ADJ

PR51
10K/F

+5V
0.1U/X7R/50V_6

Rh

PU4
G966

PC36
0.1U/X7R/50V_6

PC132
560U/2.5V_6X5.7
PC134
10U/X5R/6.3V_6

0.1U/X7R/50V/_6

PR45

MAINON

10K/F

+1.8VSUS

VPP PGOOD

VEN

3
8
9

VIN
GND
GND

+1.25V

2A
NC

PR46

PC39

VO
ADJ

PC45

8
7
6
5

PC42

GND0

PC43

+3VSUS

0/F_6

FDS8884

ADJ

19.6K/F

PC40
10U/Y5U/10V_8

0.8V

200mA

34K/F

PR154
*0_4

Vout =0.8(1+R1/R2)
=1.25V

PC147
*1U/X7R-25V_8

PC150
*10U/X6S-25V_1206

<31,33> S5_ON

PR155
*0_4

+5V
PU3
*G966

PC31
*0.1U/Y5V/16V_4
PR39
MAINON
VIN

+SMDDR_VREF

+1.8VSUS

+3VSUS

15V

*10K/F

+1.8VSUS

PC33
PR77
1M

PR74
22

PR73
22

PR80
22

PR71
1M

3
8
9

VIN
GND
GND

+1.2V

1A
NC

PR36
*17.4K/F

PC30
*10U/Y5U/10V_8

PC34
*10U/X5R/6.3V_6

VO

0.8V
SUSD <33>

*34K/F

2
PQ24
2N7002E

PC69
*2200p_4

PQ19
2N7002E

PQ20
2N7002E
1

PQ22
2N7002E
1

PR79
1M

Vout =0.8(1+R1/R2)
=1.2V

PQ28
DTC144EU

VEN

PR42

<31,36> SUSON

VPP PGOOD

*0.1U/Y5V/16V_4

SUSD
3

SUS_ON_G

ADJ

PC149
*470P/X7R-50V_4

BP

SH

GND

PC148
*1U/X7R-25V_8

PR47

VOUT

VIN

0.1U/X7R/50V_6

PC38
10U/X5R/6.3V_6

+1.5V_S5

SOT23-5-2_8-95
PU10 *AT5206G-1.5V

+3VPCU

Add by power on 10/19

VIN

+1.8V_MXM

+1.05V

PR60

PR65

1M

22

+2.5V

PR59
22

+3V

PR66
22

+5V

PR62
22

+SMDDR_VTERM

PR63
22

+1.5V

PR64
22

+1.25V

PR137
22

15V

PR67
22

PR72
1M

MAIND <33,36>

MAIND
3

RUN_ON_G

<OrgName>

PQ40
2N7002E

PQ15
2N7002E

PQ21
2N7002E

PC71
*2200p_4

2
PQ12
2N7002E

2
PQ11
2N7002E

2
PQ10
2N7002E

2
PQ14
2N7002E

2
PQ8
2N7002E

2
PQ13
2N7002E
1

PQ9
DTC144EU

2
PR61
1M

<31,35,36> MAINON

<OrgAddr1>
<OrgAddr2>
<OrgAddr3>
<OrgAddr4>

PROJECT : ZD1
Quanta Computer Inc.

Size

Document Number

Date:

Monday, May 07, 2007

Rev
C

Discharge (1.5V/2.5V)
5

Sheet
1

37

of

38

Model

ZY3

MODEL

CHANGE LIST

REV

FROM

1A

1A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

Page22 : TV card change support to +1.5V.

1A

2A

Page18 : Install R5, depop R7,: Follow customer request use EC to control backlight ON/OFF function.

1A

2A

Page14 : GPIO10: Reserve PU, 10K +> It is GPO and OD;

GPIO14: Reserve PD, 10K => It is GPI as AC present and active high;
Page6 : TV_DCONSEL[0:1], UMA =>NC, External VGA tie to GND.

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

Page10 : Depop R153 & pop

L23 for system can not boot

Page14 : U36 package didn't math footprint, change P/N.

D

Page26 : Remove R275, install R276; remove R4, install R16; Change R245, R247 power source from +1.5V_S5/+1.5V to +3V_S5/+3V ,
Follow customer request modem change support to +3VSUS.
Page22 : MMB(CN8) PIN define error.

2A

Page31 : 2nd FAN change design

Page23 : New card power SW (location: U33) change same as ZO1
Page31 : add 2 capacity 0.1uF(C634,C636) in DIGVOL_UP / DIGVOL_DN pins
Page26 : Co-layout ALC268 and 888S
Page28 : SD card can not be detected , U32(ES2) sample will fix this issue.
Page28 : MMC card can not be detected , U32(ES2) sample will fix this issue.
Page14 : The CLPWROK pin of ICH8 connect with HWPG signal
Page22 : change CN7 pin definition for T/P no function.
Page24 : change CN8 pin definition MMB no function.
Page14 : The signal of KBSMI#_ICH add diode , and it PU to +3V_S5
The signal of LID591#_ICH add diode , and it PU to +3V_S5 for ICH8 electric leakage issue.
Page26 : Change subwoofer from 4pin to 5pin connector.

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

1A

2A

2A

2B

2A

2B

2A

2B

2A

2B

2A

2B

Page17 : Adding (Q52 & R541 & Q53) extra circuitry to prevent power leakage from system into MXM

2A

2B

Page21 : Change power of CIR from +3VPCU and +5VPCU.

2A

2B

Page31 : AEC pin24 is multi function pin, when EC power up, pin17 will change to JTAG/TCK function not GPIO.
So,need to change from pin24 (GPIO47) to pin27 (GPIO52).
Page22: Power/B connector add two LED control signal and change to 16 pin from 14-pin for meet ACER LED spec .

2A

2B

2B

3A

2B

3A

2B

3A

2B

3A

2B

3A

Page 2 : Add C645 for EMI solution

Page31 : Follow customer request 2nd FAN is controlled by EC

Page19 : Floating CN13.16 & CN13.17 ,CN14.15 & CN14.16 for ESD test
Page07 : DPLL_REF_CLK, DPLL_REF_CLK#, DPLL_REF_SSCLK and DPLL_REF_SSCLK#. To GND

2B

Page36 : Add PI filter to reduce the power ripple of +1.8V.

Page16 : Modify SMbus address A2 , The signal of B_SA1 need to PU and B_SA0 need to PD
Page26 : add 2 capacity 1uF(C639,C640) for subwoofer
Page30 : add capacity 2.2uF(C638)

2C

To

FIRST RELEASED: E200610-3793 (PCB: DA0ZD1MB6A0)

1A

ZD1 MB

Page22:

Q35 change to AO3413 form DTA114 for increase LED driving power.

Page23:

BL_ON pull up resistor from 10kohm to 100Khom(R194 ).+3V pull up will cause power on leakage on BL_ON signal due to our
VGA have 10kohm pull low.

Page19 : Connect CRT of CN13.16 & 17 to GND for ESD

2B

3A

2B

3A

Page17 : Add capacity 330uF(C647) & Remove R541

2D

Page22 & 25:

Combine USB/B (CN17) and TV/B(CN30) connector, Connector change to 16 pin. and +5_S5 from 1pin to 2pin.

Page25 : Connect HOLE 28 & 29 to GND for ESD

Page32~37 : Update power circuit
Page37 : Remove 1.2V circuit
Page26 : Add 1000pF and 10pF total 4 PCS Location: C648 , C649, C650, C652 (between +5V_ADOand AGND).
Page22 : CN8.8 remove +5V & R540 & connect to +3V (K)
Page27 : Modify and ADD. AGND bridge (R337,R284,C459 and C472 = 0 Ohm).
Page34 : Remove PR161, PR163, PC156, PC159
Page22 : Add D45~D51 for ESD
Page28 :

3A

Change CN36.37 & 38 ,CN37.37 & 38 ,CN38.42 & 43

from ADOGND and GND.

Page32 : PD9 Change footprint

Page25 : Add EMI Spring
Page27 : Add GND & AGND bridge (R546,R540,R408)
Page22 : Modify pin define (TV/B(CN30) connector)

Page23 & 17 : HDMI circuits modify:

R297, R410 & R602) .

Add level-shifter for MXM_HDMI_DDCCLK and MXM_HDMI_DDCDATA.( Location: Q54 ,Q55 , R75, R63,
A

PROJECT : ZD1

Quanta Computer Inc.

DOC NO.
Size

Document Number

Rev
1A

Change list
Date:

Sheet

Monday, May 07, 2007

5

38

of

PROJECT MODEL :

ZD1

PART NUMBER:

38
4

APPROVED BY:
DRAWING BY:

2007/ 2/15

DATE:
REVISON:
2

3A
1